JP2012510712A5 - - Google Patents

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Publication number
JP2012510712A5
JP2012510712A5 JP2011524261A JP2011524261A JP2012510712A5 JP 2012510712 A5 JP2012510712 A5 JP 2012510712A5 JP 2011524261 A JP2011524261 A JP 2011524261A JP 2011524261 A JP2011524261 A JP 2011524261A JP 2012510712 A5 JP2012510712 A5 JP 2012510712A5
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JP
Japan
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JP2011524261A
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JP2012510712A (ja
JP5926559B2 (ja
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Priority claimed from DE102008045034A external-priority patent/DE102008045034B4/de
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Priority claimed from PCT/EP2009/006259 external-priority patent/WO2010022971A1/en
Publication of JP2012510712A publication Critical patent/JP2012510712A/ja
Publication of JP2012510712A5 publication Critical patent/JP2012510712A5/ja
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JP2011524261A 2008-08-29 2009-08-28 同一の能動領域内に形成されるトランジスタにおいて能動領域内に局所的に埋め込み歪誘起半導体材質を設けることによる駆動電流調節 Active JP5926559B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
DE102008045034A DE102008045034B4 (de) 2008-08-29 2008-08-29 Durchlassstromeinstellung für Transistoren, die im gleichen aktiven Gebiet hergestellt sind, durch lokales Vorsehen eines eingebetteten verformungsinduzierenden Halbleitermaterials in dem aktiven Gebiet
DE102008045034.0 2008-08-29
US12/507,544 2009-07-22
US12/507,544 US8034669B2 (en) 2008-08-29 2009-07-22 Drive current adjustment for transistors formed in the same active region by locally providing embedded strain-inducing semiconductor material in the active region
PCT/EP2009/006259 WO2010022971A1 (en) 2008-08-29 2009-08-28 Drive current adjustment for transistors formed in the same active region by locally providing embedded strain inducing semiconductor material in the active region

Publications (3)

Publication Number Publication Date
JP2012510712A JP2012510712A (ja) 2012-05-10
JP2012510712A5 true JP2012510712A5 (ja) 2012-09-06
JP5926559B2 JP5926559B2 (ja) 2016-05-25

Family

ID=41724039

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2011524261A Active JP5926559B2 (ja) 2008-08-29 2009-08-28 同一の能動領域内に形成されるトランジスタにおいて能動領域内に局所的に埋め込み歪誘起半導体材質を設けることによる駆動電流調節

Country Status (6)

Country Link
US (1) US8034669B2 (ja)
JP (1) JP5926559B2 (ja)
KR (1) KR101520441B1 (ja)
CN (1) CN102203937B (ja)
DE (1) DE102008045034B4 (ja)
GB (1) GB2475208B (ja)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102008054075B4 (de) * 2008-10-31 2010-09-23 Advanced Micro Devices, Inc., Sunnyvale Halbleiterbauelement mit Abgesenktem Drain- und Sourcebereich in Verbindung mit einem Verfahren zur komplexen Silizidherstellung in Transistoren
US8466018B2 (en) 2011-07-26 2013-06-18 Globalfoundries Inc. Methods of forming a PMOS device with in situ doped epitaxial source/drain regions
CN102280379B (zh) * 2011-09-05 2016-06-01 上海集成电路研发中心有限公司 一种应变硅nmos器件的制造方法
CN102738084B (zh) * 2012-05-04 2014-09-03 上海华力微电子有限公司 一种提高静态随机存储器写入冗余度的方法
CN102683288B (zh) * 2012-05-04 2014-08-20 上海华力微电子有限公司 一种提高静态随机存储器读出冗余度的方法
CN103579244B (zh) * 2013-10-18 2016-08-17 上海华力微电子有限公司 静态随机存储器及其写入冗余度改善的方法
US20190259618A1 (en) * 2018-02-19 2019-08-22 Stmicroelectronics (Crolles 2) Sas Process for forming a layer of a work function metal for a mosfet gate having a uniaxial grain orientation

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US6962039B2 (en) * 2002-03-11 2005-11-08 Robert Greenhoe Lawn striping assembly
US7307273B2 (en) * 2002-06-07 2007-12-11 Amberwave Systems Corporation Control of strain in device layers by selective relaxation
JP2005079194A (ja) * 2003-08-28 2005-03-24 Sony Corp 半導体素子及び半導体装置の製造方法
JP4763967B2 (ja) * 2004-01-29 2011-08-31 富士通セミコンダクター株式会社 半導体記憶装置の製造方法
JP2005286341A (ja) * 2004-03-30 2005-10-13 Samsung Electronics Co Ltd 低ノイズ及び高性能のｌｓｉ素子、レイアウト及びその製造方法
US7023018B2 (en) 2004-04-06 2006-04-04 Texas Instruments Incorporated SiGe transistor with strained layers
US6984564B1 (en) 2004-06-24 2006-01-10 International Business Machines Corporation Structure and method to improve SRAM stability without increasing cell area or off current
JP2007027194A (ja) 2005-07-12 2007-02-01 Renesas Technology Corp 半導体装置
JP2007027461A (ja) * 2005-07-19 2007-02-01 Sumida Corporation コアおよびコアを備えたインダクタ
DE102005041225B3 (de) * 2005-08-31 2007-04-26 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung vertiefter verformter Drain/Source-Gebiete in NMOS- und PMOS-Transistoren
US7605447B2 (en) 2005-09-22 2009-10-20 International Business Machines Corporation Highly manufacturable SRAM cells in substrates with hybrid crystal orientation
JP4410195B2 (ja) 2006-01-06 2010-02-03 株式会社東芝 半導体装置及びその製造方法
KR100714479B1 (ko) * 2006-02-13 2007-05-04 삼성전자주식회사 반도체 집적 회로 장치 및 그 제조 방법
US7362606B2 (en) * 2006-03-29 2008-04-22 International Business Machines Corporation Asymmetrical memory cells and memories using the cells
DE102006015090B4 (de) * 2006-03-31 2008-03-13 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung unterschiedlicher eingebetteter Verformungsschichten in Transistoren
US7449753B2 (en) * 2006-04-10 2008-11-11 Taiwan Semiconductor Manufacturing Company, Ltd. Write margin improvement for SRAM cells with SiGe stressors
US7436696B2 (en) * 2006-04-28 2008-10-14 Taiwan Semiconductor Manufacturing Company, Ltd. Read-preferred SRAM cell design
JP5341510B2 (ja) * 2006-05-31 2013-11-13 東京エレクトロン株式会社 窒化珪素膜の形成方法、半導体装置の製造方法およびプラズマｃｖｄ装置
US8384138B2 (en) 2006-06-14 2013-02-26 Texas Instruments Incorporated Defect prevention on SRAM cells that incorporate selective epitaxial regions
JP2008060408A (ja) * 2006-08-31 2008-03-13 Toshiba Corp 半導体装置
JP4896789B2 (ja) * 2007-03-29 2012-03-14 株式会社東芝 半導体装置の製造方法
US20090189227A1 (en) * 2008-01-25 2009-07-30 Toshiba America Electronic Components, Inc. Structures of sram bit cells
US8624295B2 (en) * 2008-03-20 2014-01-07 Taiwan Semiconductor Manufacturing Company, Ltd. SRAM devices utilizing strained-channel transistors and methods of manufacture
US7838372B2 (en) * 2008-05-22 2010-11-23 Infineon Technologies Ag Methods of manufacturing semiconductor devices and structures thereof

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