JP2012222364A - ナノ結晶を有する半導体デバイスを形成する方法 - Google Patents

ナノ結晶を有する半導体デバイスを形成する方法 Download PDF

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Publication number
JP2012222364A
JP2012222364A JP2012090521A JP2012090521A JP2012222364A JP 2012222364 A JP2012222364 A JP 2012222364A JP 2012090521 A JP2012090521 A JP 2012090521A JP 2012090521 A JP2012090521 A JP 2012090521A JP 2012222364 A JP2012222364 A JP 2012222364A
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Prior art keywords
nanocrystals
insulating layer
annealing
forming
semiconductor device
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Japanese (ja)
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JP2012222364A5 (enExample
Inventor
Sung-Taeg Kang
カン ソン−タン
A Yater Jane
エー イェーター ジェーン
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NXP USA Inc
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Freescale Semiconductor Inc
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Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of JP2012222364A publication Critical patent/JP2012222364A/ja
Publication of JP2012222364A5 publication Critical patent/JP2012222364A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H10D30/694—IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/697—IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes having trapping at multiple separated sites, e.g. multi-particles trapping sites
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0413—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having charge-trapping gate insulators, e.g. MNOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/031—Manufacture or treatment of data-storage electrodes
    • H10D64/035—Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
JP2012090521A 2011-04-12 2012-04-11 ナノ結晶を有する半導体デバイスを形成する方法 Pending JP2012222364A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/085,230 US8329543B2 (en) 2011-04-12 2011-04-12 Method for forming a semiconductor device having nanocrystals
US13/085,230 2011-04-12

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JP2012222364A true JP2012222364A (ja) 2012-11-12
JP2012222364A5 JP2012222364A5 (enExample) 2015-05-28

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JP2012090521A Pending JP2012222364A (ja) 2011-04-12 2012-04-11 ナノ結晶を有する半導体デバイスを形成する方法

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US (1) US8329543B2 (enExample)
JP (1) JP2012222364A (enExample)
CN (1) CN102738005B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020074392A (ja) * 2019-10-28 2020-05-14 キオクシア株式会社 不揮発性半導体記憶装置及びその製造方法

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8679912B2 (en) * 2012-01-31 2014-03-25 Freescale Semiconductor, Inc. Semiconductor device having different non-volatile memories having nanocrystals of differing densities and method therefor
CN104299904B (zh) * 2013-07-16 2017-09-26 中芯国际集成电路制造(上海)有限公司 闪存单元的形成方法
US11173235B2 (en) 2016-07-15 2021-11-16 Cook Regentec Llc Nitrite eluting devices and methods of use thereof

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JP2005079186A (ja) * 2003-08-28 2005-03-24 Sharp Corp 微粒子含有体およびその製造方法、メモリ機能体、メモリ素子並びに電子機器
JP2005129708A (ja) * 2003-10-23 2005-05-19 Univ Nagoya シリコンナノ結晶の作製方法、シリコンナノ結晶、フローティングゲート型メモリキャパシタ構造の作製方法、及びフローティングゲート型メモリキャパシタ構造
US20080246077A1 (en) * 2007-02-02 2008-10-09 Samsung Electronics Co., Ltd. Method of fabricating semiconductor memory device and semiconductor memory device fabricated by the method
JP2010541296A (ja) * 2007-10-12 2010-12-24 マイクロン テクノロジー， インク． メモリセル、電子システム、メモリセルの形成方法、およびメモリセルのプログラミング方法
WO2011036775A1 (ja) * 2009-09-25 2011-03-31 株式会社 東芝 不揮発性半導体メモリ

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US5714766A (en) 1995-09-29 1998-02-03 International Business Machines Corporation Nano-structure memory device
US6060743A (en) 1997-05-21 2000-05-09 Kabushiki Kaisha Toshiba Semiconductor memory device having multilayer group IV nanocrystal quantum dot floating gate and method of manufacturing the same
JP4056817B2 (ja) 2002-07-23 2008-03-05 光正 小柳 不揮発性半導体記憶素子の製造方法
US6808986B2 (en) 2002-08-30 2004-10-26 Freescale Semiconductor, Inc. Method of forming nanocrystals in a memory device
US20060189079A1 (en) * 2005-02-24 2006-08-24 Merchant Tushar P Method of forming nanoclusters
KR100735534B1 (ko) * 2006-04-04 2007-07-04 삼성전자주식회사 나노 크리스탈 비휘발성 반도체 집적 회로 장치 및 그 제조방법
CN101330008A (zh) * 2007-06-20 2008-12-24 中国科学院微电子研究所 一种制作金属纳米晶非挥发性存储器的方法
US7799634B2 (en) 2008-12-19 2010-09-21 Freescale Semiconductor, Inc. Method of forming nanocrystals
CN101807576A (zh) * 2009-02-13 2010-08-18 中国科学院微电子研究所 纳米晶浮栅非易失存储器及其制作方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005079186A (ja) * 2003-08-28 2005-03-24 Sharp Corp 微粒子含有体およびその製造方法、メモリ機能体、メモリ素子並びに電子機器
JP2005129708A (ja) * 2003-10-23 2005-05-19 Univ Nagoya シリコンナノ結晶の作製方法、シリコンナノ結晶、フローティングゲート型メモリキャパシタ構造の作製方法、及びフローティングゲート型メモリキャパシタ構造
US20080246077A1 (en) * 2007-02-02 2008-10-09 Samsung Electronics Co., Ltd. Method of fabricating semiconductor memory device and semiconductor memory device fabricated by the method
JP2010541296A (ja) * 2007-10-12 2010-12-24 マイクロン テクノロジー， インク． メモリセル、電子システム、メモリセルの形成方法、およびメモリセルのプログラミング方法
WO2011036775A1 (ja) * 2009-09-25 2011-03-31 株式会社 東芝 不揮発性半導体メモリ

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020074392A (ja) * 2019-10-28 2020-05-14 キオクシア株式会社 不揮発性半導体記憶装置及びその製造方法
JP7079762B2 (ja) 2019-10-28 2022-06-02 キオクシア株式会社 不揮発性半導体記憶装置及びその製造方法

Also Published As

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US8329543B2 (en) 2012-12-11
CN102738005B (zh) 2016-08-31
CN102738005A (zh) 2012-10-17
US20120264277A1 (en) 2012-10-18

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