JP2012222109A - Evaluation method for silicon single-crystal wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an evaluation method for a silicon single-crystal wafer allowing the prediction of a breakdown voltage defect caused by the wafer quality after the completion of device manufacturing process by obtaining in advance in the stage of the wafer the evaluation result of a GOI characteristic which is close to the GOI characteristic obtained after the completion of the device manufacturing process (device product).SOLUTION: An evaluation method for a silicon single-crystal wafer used in device manufacturing comprises: forming a gate oxide film on at least a surface of a silicon single-crystal wafer; performing device manufacture simulation heat treatment; and then evaluating a GOI characteristic of the gate oxide film.

Description

  The present invention relates to a method for evaluating an oxide film breakdown voltage characteristic of a silicon single crystal wafer for use in manufacturing a device.

  In manufacturing an IC device, a silicon oxide film formed on a silicon single crystal wafer is used as a gate oxide film for an FET transistor or the like because it is easy to manufacture and has excellent characteristics. Since a high voltage is applied to the gate oxide film, a high breakdown voltage is desired.

The reliability evaluation of the gate oxide integrity (GOI) characteristics of the gate oxide film is performed in the following procedure.
A silicon oxide film serving as an insulating film is formed on the main surface of the semiconductor wafer, a polysilicon layer is grown directly on the silicon oxide film, and etching is performed so as to leave the polysilicon layer in an island shape. Thereby, a capacitor having a MOS structure is formed, and the island-like polysilicon layer is utilized as an electrode. The breakdown voltage of the oxide film is evaluated through the polysilicon electrode of the MOS capacitor. For this evaluation, TZDB (Time Zero Dielectric Breakdown) characteristic evaluation and TDDB (Time Dependent Dielectric Breakdown) characteristic evaluation are generally used ( In the present invention, these are collectively referred to as GOI characteristics).

  A process for forming an oxide film (a gate oxidation process) that is a target for measuring GOI characteristics of a device product is performed by a device manufacturer. However, since the GOI characteristics largely depend on the wafer quality, the wafer manufacturers are making efforts to improve the quality.

In recent years, mass production of defect-free crystals (NPC: Nearly Perfect Crystal) has become possible, and the non-defective product rate by the GOI characteristic evaluation at the stage of wafer shipment is almost 100%. However, the GOI characteristic defect after completion of the device manufacturing process has not disappeared.
Some of these defects are thought to be due to the device manufacturing process, and it is unlikely that all defects are due to wafer quality, but the defect rate may vary from wafer to wafer. There is a need for new analysis methods for silicon single crystal wafers.

  In Patent Document 1, after performing a heat treatment for forming a thermal oxide film on the surface of the silicon wafer, the crystal defects in the silicon wafer are formed as pits on the thermal oxide film by performing a heat treatment in an atmosphere containing hydrogen. A method for generating and detecting crystal defects is described. Patent Document 2 discloses that after heat treatment for forming an oxide film on the surface of the silicon wafer is performed, heat treatment is performed in an atmosphere containing argon to form an oxide film hole on the surface of the silicon wafer, and the oxide film hole is detected. Describes a method for evaluating crystal defects existing on the surface of a silicon wafer. That is, these are methods for finding As-Grown crystal defects. In Patent Document 2, when a void (void) present in an As-Grown crystal is included in an oxide film, the oxide film is weaker than the periphery, so that the etching proceeds faster by argon heat treatment, and as a result, a weak place is recognized. This is a method in which heat treatment is performed for measurement.

  Conventionally, in the measurement of GOI characteristics after a heat treatment simulation performed by a wafer maker, a method of measuring the GOI characteristics by forming a gate oxide film after the device manufacturing simulation heat treatment has been performed. However, this method measures GOI characteristics affected by BMD formed on the surface layer by simulation heat treatment. That is, there is a problem that the evaluation result of the GOI characteristic obtained by this method is different from the evaluation result of the GOI characteristic of the final device product.

  As described above, a new silicon single crystal wafer can be obtained in advance at the wafer manufacturing stage (before entering the device manufacturing process) with a GOI characteristic evaluation result close to the GOI characteristic evaluation result at the end of the device manufacturing process. An evaluation method is required.

JP 2000-269288 A JP 2006-203089 A

  The present invention has been made in view of the above problems, and can obtain an evaluation result of GOI characteristics close to the evaluation result of GOI characteristics after completion of the device manufacturing process (device product) in advance at the wafer stage, An object of the present invention is to provide a method for evaluating a silicon single crystal wafer that can predict a breakdown voltage due to wafer quality after the device manufacturing process is completed.

  In order to solve the above problems, in the present invention, a method for evaluating a silicon single crystal wafer used for device manufacture, at least after forming a gate oxide film on the surface of the silicon single crystal wafer, performing a device manufacturing simulation heat treatment, Thereafter, a method for evaluating a silicon single crystal wafer is provided, wherein GOI characteristics of the gate oxide film are evaluated.

  With such an evaluation method for a silicon single crystal wafer, an evaluation result of GOI characteristics close to the evaluation result of GOI characteristics after completion of the device manufacturing process can be obtained in advance at the wafer stage. It becomes possible to predict a breakdown voltage due to wafer quality.

  At this time, the device manufacturing simulation heat treatment can be performed in an atmosphere containing oxygen.

  Specifically, the device manufacturing simulation heat treatment may be performed in an atmosphere containing oxygen, for example, depending on a device manufacturer that actually manufactures the device.

  Also, at this time, after forming the gate oxide film, a polysilicon film is formed, and then after the device manufacturing simulation heat treatment, an electrode pattern is formed on the polysilicon film by a photolithography technique, and the gate oxide film is formed through the electrode. It is preferable to evaluate the GOI characteristics.

  As described above, it is preferable to form a polysilicon film to be an electrode after forming the gate oxide film because the polysilicon film also functions as a protective film for the gate oxide film. In addition, since the electrode pattern is formed on the polysilicon film by the photolithography technique after the device manufacturing simulation heat treatment, the contamination of the furnace can be reduced as compared with the case where the heat treatment is performed after the wafer with the electrode pattern is manufactured. Above preferred.

  As described above, according to the silicon single crystal evaluation method of the present invention, a GOI characteristic evaluation result close to the GOI characteristic evaluation result after completion of the device manufacturing process (device product) can be obtained in advance at the wafer stage. In addition, it is possible to predict a breakdown voltage failure due to wafer quality after the device manufacturing process is completed with higher accuracy than before.

The process flowchart which showed an example of the evaluation method of the silicon single crystal wafer of this invention is shown. (A) It is explanatory drawing inside the wafer in the GOI characteristic evaluation method of the conventional silicon single crystal wafer, (B) It is explanatory drawing inside the wafer in the GOI characteristic evaluation method of the silicon single crystal wafer of this invention. An example of device manufacture simulation heat processing in the evaluation method of the silicon single crystal wafer of the present invention is shown. It is a figure which shows the condition of the stress application in the TDDB characteristic evaluation performed in the Example and the comparative example.

Hereinafter, the present invention will be described in more detail.
The GOI characteristic at a wafer manufacturer is a breakdown voltage measured at the shipping stage. However, the GOI characteristic that is a problem for device manufacturers is the GOI characteristic of the device product after the device manufacturing process is completed. That is, in the device manufacturer, the gate oxide film is made relatively early in the device manufacturing process, but the withstand voltage measurement is performed on the final device product that has been damaged by heat treatment, electric field, ion implantation, or the like.
The inventors focused on this point and studied a new evaluation method.

Conventionally, in a method for measuring GOI characteristics performed by a wafer manufacturer, a gate oxide film is formed after simulation heat treatment to measure GOI characteristics.
As shown in FIG. 2A, this method is a method in which, after the simulation heat treatment, the oxide film formed by the simulation is removed, and then a new gate oxide film is formed and its breakdown voltage is measured. However, this method has a problem that the result is different from the withstand voltage result of an actual device product in which a gate oxide film is formed in the initial stage of the device manufacturing process. This is because, as shown in FIG. 2A, the conventional evaluation method of GOI characteristics is a method of measuring the GOI characteristics affected by the BMD formed on the surface layer by simulation heat treatment. It is.

Therefore, in the present invention, in order to approximate the actual device manufacturing process, the process order is changed so that the gate oxide film is formed before the device manufacturing simulation heat treatment.
That is, the device manufacturing simulation heat treatment and the gate oxidation order are changed as shown in FIG. 2B in contrast to the conventional GOI characteristic evaluation method in the process order of device manufacturing simulation heat treatment, gate oxidation, and GOI characteristic measurement. The evaluation method of GOI characteristics was in the order of processes of gate oxidation, device manufacturing simulation heat treatment, and measurement of GOI characteristics. As a result, it was found that the evaluation results of the conventional GOI characteristics are greatly different. Moreover, it has been found that this result is close to the result of the breakdown voltage failure in the device product.

The present invention will be described in detail below.
FIG. 1 is a process flow diagram showing an example of a silicon single crystal wafer evaluation method of the present invention.
In the present invention, a silicon single crystal wafer 1 to be evaluated for GOI characteristics is prepared (FIG. 1A), and then a gate oxide film 2 is formed on the surface of the silicon single crystal wafer 1 (FIG. 1B). Thereafter, a device manufacturing simulation heat treatment is performed (FIG. 1D), and the GOI characteristics of the gate oxide film 2 are evaluated (FIG. 1F).

  As described above, by changing the order of the gate oxide film formation and the device manufacturing simulation heat treatment to the conventional GOI characteristic evaluation method, the evaluation result close to the breakdown voltage characteristic evaluation result of the device product after the device manufacturing process is completed. Can be obtained.

  That is, according to the evaluation method of this method, the gate oxide film containing the As-Grown defect is not found in the initial stage of the device manufacturing process, instead of finding the As-Grown defect as in Patent Documents 1 and 2. It becomes possible to predict in advance what will happen after finishing all the heat treatments in the device manufacturing process.

  In addition, the method of measuring the GOI characteristics by forming a gate oxide film after the simulation heat treatment performed by a conventional wafer maker results in the GOI characteristics affected by the BMD formed on the surface layer by the device simulation heat treatment. In contrast to the method of measuring (FIG. 2A), the evaluation method of the present invention forms the gate oxide film before the device manufacturing simulation heat treatment. It is possible to evaluate whether it is strong or weak against heat treatment that will be performed in the process, that is, an evaluation method close to the evaluation of the withstand voltage characteristics of the device product after the device manufacturing process is completed, and the evaluation result can be obtained in advance. Yes (FIG. 2B).

Here, the present invention will be described in more detail.
As shown in FIG. 1A, a silicon single crystal wafer 1 to be evaluated is prepared. The silicon single crystal wafer 1 to be prepared is pulled up by, for example, the Czochralski (CZ) method, and a wafer having a diameter of 300 mm can be used, but its manufacturing method, size, conductivity type, crystal orientation, oxygen concentration, etc. It is not limited. All silicon single crystal wafers that are used in device manufacturing and require GOI characterization can be targeted.

  Next, as shown in FIG. 1B, gate oxidation is performed on the surface of the silicon single crystal wafer to form a gate oxide film 2. A method for forming the gate oxide film 2 is not particularly limited. For example, a thermal oxide film can be formed by heating in an oxygen atmosphere.

Next, as shown in FIG. 1C, for example, a polysilicon film 3 can be formed in order to measure the breakdown voltage of the gate oxide film.
As a method for forming the polysilicon film 3, for example, SiH ₄ can be thermally decomposed by a CVD (Chemical Vapor Deposition) method. Since this polysilicon film 3 is used as an electrode, it is preferable to lower the resistivity by doping with a dopant such as phosphorus or boron at the time of formation. The polysilicon film 3 serving as an electrode also serves as a protective film for the gate oxide film 2.

Next, as shown in FIG. 1D, a device manufacturing simulation heat treatment is performed. In the present invention, “device manufacturing simulation heat treatment” is a simulation of heat treatment performed in the device manufacturing process, and varies depending on the specifications of the device actually manufactured, the device manufacturer, and the like.
For example, a device manufacturing simulation heat treatment as shown in FIG. 3 can be performed. The oxide film 4 can be formed after the device manufacturing simulation heat treatment is performed in an atmosphere containing oxygen.

Next, as shown in FIG. 1E, an electrode pattern 3 ′ can be formed on the polysilicon film 3 by photolithography.
The formation of the electrode pattern 3 ′ can be performed as shown in the right side of FIG. That is, after the oxide film 4 formed by the device manufacturing simulation heat treatment is removed, a pattern 5 made of a photoresist is formed (FIG. 1 (E) -1). Next, the polysilicon film is etched by using the pattern 5 to obtain an electrode pattern 3 ′ (FIG. 1 (E) -2). Thereafter, the electrode pattern 3 ′ made of the polysilicon film is protected by the resist composition 6 and the back surface is etched (FIG. 1E) -3, and the resist composition 6 is removed (FIG. 1E-4). ).

  Thus, after the device manufacturing simulation heat treatment, obtaining the electrode pattern 3 ′ by photolithography technology is preferable in terms of apparatus management since the contamination of the furnace can be reduced as compared with the case where the wafer with the electrode pattern is heat treated.

  Thereafter, as shown in FIG. 1F, the GOI characteristics of the gate oxide film 2 are evaluated. The GOI characteristic evaluation is not particularly limited, and TZDB characteristic evaluation and TDDB characteristic evaluation can be performed using a known method.

  EXAMPLES The present invention will be described in more detail below with reference to examples and comparative examples of the present invention, but these do not limit the present invention.

Lots of different varieties were extracted from product wafers actually flowing through the device manufacturing process, and the GOI characteristics were measured in the respective evaluation methods of Example 1 and Comparative Example 2 below. Of course, a large yield difference in device products was not recognized in the flow products. Moreover, the measurement result of GOI characteristic was also the same.
Therefore, the GOI characteristics of the samples A to C are measured by the evaluation methods of Example 1, Comparative Example 1 and Comparative Example 2 in accordance with the timing when a new type of wafer is introduced into the manufacture of the device. Comparison was made with the evaluation results. The wafer was a silicon single crystal having a diameter of 300 mm, and the number of GOI characteristic measurement points was 3000.

Example 1
On the surface of the target silicon single crystal wafer, gate oxidation was performed to form a gate oxide film, and after forming a polysilicon film on the gate oxide film, a device manufacturing simulation heat treatment was performed. The surface oxide film on the polysilicon film was removed, an electrode pattern was formed on the polysilicon film by a photolithography technique, and GOI characteristics were measured through the electrode. The GOI characteristics were measured by applying an electric field stress to the gate oxide film using a constant current TDDB method in which a constant current was applied to the silicon single crystal wafer subjected to the above-described treatment until the gate oxide film was destroyed. FIG. 4 shows the state of stress application. Stress is applied at a constant current density (FIG. 4A), and the voltage at that time is monitored (FIG. 4B). When dielectric breakdown occurs, a rapid voltage change occurs and the breakdown can be known. The applied current stress was 0.01 A / cm ² and the measurement temperature was 100 ° C. The electrode area was 4 mm ² . The non-defective product rate (%) obtained from the evaluation results of the TDDB characteristics is shown in Table 1 below.
The evaluation result (the sample C is bad) by the evaluation method of Example 1 is the same as the evaluation result of the device product (the sample C is bad). Further, since the device manufacturing simulation heat treatment was performed before pattern formation by lithography, the heat treatment could be performed without contamination of the apparatus.

(Comparative Example 1)
On the surface of the target silicon single crystal wafer, gate oxidation was performed to form a gate oxide film, a polysilicon film was formed, and an electrode pattern was formed on the polysilicon film by photolithography. GOI characteristics were measured through the polysilicon electrode in the same manner as in Example 1. Table 1 shows the yield rate (%) obtained from the evaluation results of the TDDB characteristics.
The evaluation result by the evaluation method of the GOI characteristic without performing the device manufacturing simulation heat treatment of Comparative Example 1 is almost the same for Sample A to Sample C, and is different from the evaluation result for the device (Sample C is bad). It was.

(Comparative Example 2)
A simulation heat treatment was performed on the target silicon single crystal wafer. There was a heat treatment with oxygen during the simulation heat treatment, and an oxide film was formed on the silicon single crystal wafer on the surface. The oxide film was removed using hydrofluoric acid (HF). Thereafter, gate oxidation is performed to form a gate oxide film, a polysilicon film is formed, an electrode pattern is formed on the polysilicon film by a photolithography technique, and GOI characteristics are passed through the polysilicon electrode in the same manner as in the first embodiment. Was measured. Table 1 shows the yield rate (%) obtained from the evaluation results of the TDDB characteristics.
According to the evaluation method of Comparative Example 2, the result that the sample A was bad was obtained, but this was different from the evaluation result in the device product (the sample C was bad).
The evaluation method of Comparative Example 2 is considered to be different from the evaluation result of the device product because it results in the evaluation of the surface layer defect generated by the simulation heat treatment.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.

DESCRIPTION OF SYMBOLS 1 ... Silicon single crystal wafer, 2 ... Gate oxide film, 3 ... Polysilicon film, 3 '... Electrode pattern 4 ... Oxide film formed by device manufacturing simulation heat treatment, 5 ... Pattern consisting of photoresist, 6 ... Resist composition .

Claims (3)

  A method for evaluating a silicon single crystal wafer used for device manufacturing, wherein at least a gate oxide film is formed on the surface of the silicon single crystal wafer, and then a device manufacturing simulation heat treatment is performed, and then the GOI characteristics of the gate oxide film are evaluated. A method for evaluating a silicon single crystal wafer, comprising:   The method for evaluating a silicon single crystal wafer according to claim 1, wherein the device manufacturing simulation heat treatment is performed in an atmosphere containing oxygen.   After the gate oxide film is formed, a polysilicon film is formed, and after the device manufacturing simulation heat treatment, an electrode pattern is formed on the polysilicon film by photolithography, and the GOI characteristic of the gate oxide film is evaluated through the electrode. The method for evaluating a silicon single crystal wafer according to claim 1, wherein:

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