JP2012134432A - Component incorporating wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To thin a component incorporating wiring board in which components are embedded and mounted in an insulating plate.SOLUTION: The component incorporating wiring board includes: a first insulation layer 11; a second insulation layer 12 positioned in the shape of being laminated on the first insulation layer; a passive element component 41 embedded in the second insulation layer and provided with a plurality of terminals; a wiring pattern held between the first insulation layer and the second insulation layer and including a connection land for the passive element component; and a connection member 51 for electrically connecting the plurality of terminals of the passive element component and the connection land of the wiring pattern. The passive element component includes a planar inorganic material substrate and a passive element formed in a layer shape on one surface of the inorganic material substrate. A lead part of the passive element is formed by a copper pattern, and a film of an organic insulation material is provided in contact with at least a part of the passive element on one surface of the inorganic material substrate.

Description

  The present invention relates to a component built-in wiring board in which components are embedded and mounted in an insulating plate, and more particularly, to a component built-in wiring board having a configuration aimed at thinning.

  An example of a component built-in wiring board is described in Japanese Patent Application Laid-Open No. 2003-197849. In the wiring board disclosed in this document, in addition to passive element components such as a chip capacitor (chip capacitor), a semiconductor chip (active element component) is a target component to be embedded.

  In the wiring board in which the semiconductor chip and the passive element component are mixedly mounted as described above, focusing on the thickness of the built-in component, the semiconductor chip usually has a thickness of about 0.5 mm, but the back grinding method The thickness can be reduced by, for example, a thin film having a thickness of about 50 μm can be used. On the other hand, the size of the passive element component is standardized. For example, in the case of relatively small 0603 size and 0402 size, the width is 0.6 mm × length 0.3 mm × thickness 0.3 mm, respectively. Width 0.4 mm × length 0.2 mm × thickness 0.2 mm. Therefore, the thickness is several times that of a thin semiconductor chip.

  Therefore, it is essential to prepare a built-in area in the thickness direction corresponding to the thickness of the passive element component, at least for the component built-in wiring board that incorporates the passive element component. It is a factor of.

JP 2003-197849 A

  The present invention has been made in consideration of the above-described circumstances, and an object of the present invention is to provide a component built-in wiring board that can be thinned in a component built-in wiring board in which components are embedded and mounted in an insulating plate. .

  In order to solve the above-described problem, a component built-in wiring board according to an aspect of the present invention includes a first insulating layer, a second insulating layer positioned in a stacked manner with respect to the first insulating layer, A passive element component having a plurality of terminals embedded in a second insulating layer, and a connection land for the passive element component provided between the first insulating layer and the second insulating layer And a connection member that electrically connects the plurality of terminals of the passive element component and the connection land of the wiring pattern, wherein the passive element component is a plate-like inorganic material substrate And a passive element formed in a layer on one surface of the inorganic material substrate, wherein the lead portion of the passive element is formed in a copper pattern, and the one of the inorganic material substrates A film of organic insulating material in contact with at least a portion of the passive element Vignetting wherein the are.

  That is, in this component built-in wiring board, at least a passive element component having a terminal is embedded, and this passive element component is composed of a plate-like inorganic material substrate and one surface of the inorganic material substrate. And a passive element formed in a layered manner thereon. A lead portion of the passive element is formed in a copper pattern, and an organic insulating material film is provided on one surface of the inorganic material base material so as to be in contact with at least a part of the passive element. That is, the passive element component has a plate-like inorganic material base material like a semiconductor chip, and the passive element is formed in layers on one surface of the inorganic material base material. ing. Furthermore, the lead portion of the passive element is formed in a copper pattern, and an organic insulating material film is provided on one surface of the inorganic material substrate so as to be in contact with at least a part of the passive element. .

  Therefore, the built-in passive element component can be made as thin as a component having a semiconductor chip, and the preparation of a built-in region in the thickness direction corresponding to the thickness of the passive element component is thin as a component built-in wiring board. Things are enough. Therefore, it is possible to reduce the thickness of the component built-in wiring board. In addition, in the passive element component, the lead part of the passive element is formed in a copper pattern, and an organic insulating material film is provided in contact with at least a part of the passive element. A passive element with good characteristics can be easily built.

  According to the present invention, it is possible to reduce the thickness of a component built-in wiring board in which components are embedded and mounted in an insulating plate.

Sectional drawing which shows typically the structure of the component built-in wiring board which concerns on one Embodiment of this invention. Sectional drawing which shows typically the structural example of the passive element components incorporated in the component built-in wiring board shown in FIG. Process drawing which shows a part of manufacturing process of the component built-in wiring board shown in FIG. Process drawing which shows another part of manufacturing process of the component built-in wiring board shown in FIG. FIG. 9 is a process diagram schematically showing still another part of the manufacturing process of the component built-in wiring board shown in FIG. 1. Sectional drawing which shows typically the modification of the passive element component shown in FIG. Process drawing which shows a part of manufacturing process of the component built-in wiring board in the case of using the passive element component shown in FIG. Sectional drawing which shows typically the modification of the passive element components shown in FIG. 2 different from what was shown in FIG.

  As an embodiment of the present invention, the organic insulating material of the passive element component may be benzocyclobutene (BCB) or polyimide. Since the BCB film has low hygroscopicity and low dielectric constant, it is very suitable as an insulating film (interlayer insulating film) located between a plurality of passive elements and insulating between them. A polyimide having similar properties but not as much as BCB may be used in place of BCB.

  As an embodiment, the inorganic material substrate of the passive element component may be a kind of semiconductor substrate or non-conductive substrate selected from the group consisting of silicon, ceramic, and glass. . These substrates are suitable as the inorganic material substrate used for the passive element component. One is that even if it is thin (for example, several tens of μm thick), it can maintain rigidity as a component, has good availability, and there are many known techniques for forming passive elements in layers on the surface. It is also relatively easy to process thinly by a back grinding method.

  As an embodiment, the inorganic material substrate of the passive element component is a silicon substrate, and the passive element of the passive component component is one type selected from the group consisting of a capacitor, a resistor, and an inductor Or it can be set as 2 or more types. When the inorganic material substrate is silicon, these passive elements can be formed on the silicon plate by diverting a process used in a semiconductor manufacturing process, for example. By diverting the semiconductor manufacturing process, many advantages such as cost reduction and productivity improvement can be expected. If two or more kinds of passive elements are made, a passive network can be formed, and the added value is improved as a passive element component.

  Further, as an embodiment, the inorganic material substrate of the passive element component is a silicon substrate on which a silicon oxide insulating layer is formed, and the passive element of the passive component component is a capacitor The capacitor includes a lower electrode layer provided on the insulating layer of the silicon base material, and a dielectric layer of tantalum oxide or benzocyclobutene (BCB) provided on the lower electrode layer; An upper electrode layer provided on the dielectric layer, and the film of the organic insulating material is provided on the upper electrode layer in contact with the lower electrode layer and the upper electrode layer, respectively. The lead portion may be extended.

  This is a structural example when the passive element included in the passive element component is a capacitor. When tantalum oxide is used as the dielectric layer, a capacitor having a large capacitance can be obtained. Similarly, when BCB is used, an inexpensive process can be achieved by using BCB as an interlayer insulating film which is a film of an organic insulating material.

  Moreover, as an embodiment, the inorganic material base material of the passive element component is a silicon base material on which a silicon oxide insulating layer is formed, and the silicon base material is formed on the insulating layer of the silicon base material. A film of the organic insulating material is provided, the passive element of the passive element component is a resistor, and the resistor is a titanium or chromium resistor provided on the film in contact with the film of the organic insulating material It is possible to include a film, and the resistance film extends below the copper pattern which is a lead portion of the resistance and also on a region on the film of the organic insulating material.

  This is a structural example when the passive element of the passive element component is a resistor. If a titanium or chromium film is used as the resistive film, a resistance with good characteristics can be easily made using a thin film formation process. The resistance film including the wiring pattern can be efficiently formed by providing the resistance film on the lower side of the copper pattern as the lead portion of the resistor and also on the film of the organic insulating material.

  As an embodiment, the plurality of terminals of the passive element component may be electrically connected to the passive element and provided on the one surface of the inorganic material substrate. . This is an aspect in which a plurality of terminals of the passive element component are provided on the surface on which the passive element is formed. According to this, it is possible to carry out a series of processes up to the formation of terminals on one surface, and efficient component formation is possible.

  Further, as an embodiment, the inorganic material substrate of the passive element component is a silicon substrate, and the passive element component further includes a plurality of copper conductive vias provided through the silicon substrate. A surface on the side opposite to the one surface of the inorganic material base so that the plurality of terminals of the passive element component are electrically connected to the passive element via the plurality of copper conductive vias. It is possible to be provided above. This is an aspect in which the plurality of terminals of the passive element component are provided on the surface opposite to the surface on which the passive element is formed. According to this, it is necessary to form a via penetrating through the silicon base material, but it is considered that this is suitable when the number of terminals is high, especially when the number of terminals is large.

  As an embodiment, the connecting member can be solder. In this case, surface mounting technology can be used for mounting passive element components, and in particular, the cost can be reduced.

  As an embodiment, the connection member may be gold. In this case, the passive element component can be mounted by flip connection. In the case of flip connection, a passive element component having a terminal with a narrower pitch can be used as a built-in element, thereby achieving high density of the built-in component.

  Based on the above, embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a cross-sectional view schematically showing a configuration of a component built-in wiring board according to an embodiment of the present invention. As shown in FIG. 1, this component built-in wiring board has insulating layers 11, 12, 13, and 14, wiring layers (wiring patterns) 21, 22, 23, and 24 (= four layers in total, Among them, the wiring layers 22 and 23 are inner wiring layers), an interlayer connector 31, 32 and 33, a plate-like passive element component 41, and a connecting member (solder) 51.

  That is, this wiring board has a passive element component 41 configured in a plate shape as a built-in component, and this passive element component 41 has a terminal 41a on one surface of the plate configuration, 41a is located opposite to the connection land formed by the inner wiring layer 22. The terminal 41 a of the passive element component 41 and the connection land of the wiring layer 22 are electrically and mechanically connected by a connection member (solder) 51. A more specific configuration of the passive element component 41 is, for example, as described below with reference to FIG.

  FIG. 2 is a cross-sectional view schematically showing a configuration example of a passive element component built in the component built-in wiring board shown in FIG. As shown in FIG. 2, the passive element component 41 includes a terminal 41a, a plate-like inorganic material substrate (silicon plate) 41b, a silicon oxide layer 41bb, a dielectric layer 41c, a conductor layer (electrode layer) 41d, A via (contact) 41e, an interlayer insulating film 41f, and a conductor layer (electrode layer) 41g are provided.

  The passive element component 41 in this example includes, for example, one capacitor as a passive element (a large number can be arranged in a plane direction), and is formed on the entire surface of the base material using the silicon plate 41b as the base material. A capacitor is formed in layers via a silicon oxide layer 41bb which is an insulator. That is, a conductor layer (electrode layer) 41g is formed on the silicon oxide layer 41bb, a dielectric layer 41c having a predetermined area and thickness is formed thereon, and a dielectric layer 41c is formed on the dielectric layer 41c. A conductor layer (electrode layer) 41d is formed so as to cover the entire region on the body layer 41c. The conductor layer 41g may include a portion that functions as a wiring in addition to a portion that functions as an electrode layer.

  An interlayer insulating film 41f of an organic insulating material is formed on the entire region on the conductor layer 41d and on each side surface of the conductor layer 41g, the dielectric layer 41c, and the conductor layer 41d so as to contact and cover them. ing. Conductive vias 41e and 41e are provided through the interlayer insulating film 41f, one of which is in contact with and conductive with the conductor layer 41d, and the other is in contact with and conductive with the conductor layer 41g. Further, terminals 41a and 41a are provided on and in contact with the via 41e. The via 41e can be regarded as a lead portion of the capacitor.

  The conductor layer 41g, the conductor layer 41d, and the via 41e can be formed of copper, for example. The dielectric layer 41c can be formed of, for example, taroloxide or benzocyclobutene (BCB). The interlayer insulating film 41f can be formed of, for example, BCB or polyimide. When both the dielectric layer 41c and the interlayer insulating film 41f are made of BCB, cost reduction due to simplification of the process can be expected. When the dielectric layer 41c is made of tantalum oxide, a capacitor having a relatively large capacitance can be formed. A BCB film is suitable as an interlayer insulating film because of its low hygroscopicity and low dielectric constant. A polyimide having similar properties but not as much as BCB can be used in place of BCB.

  For the formation of the conductor layer 41g and the conductor layer 41d, for example, a thin film formation technique (CVD, sputtering, plating, etc.) similar to the semiconductor manufacturing process can be used. For the formation of the interlayer insulating film 41f, the via 41e, and the terminal 41a, for example, a technique for forming surface mounting terminals in an area arrangement (grid arrangement) similar to the manufacturing technique of a semiconductor component of a wafer level chip scale package is used. Can be used. For the formation of the dielectric layer 41c, a thin film forming technique corresponding to the material can be used. In this passive element component 41, the formation of the terminal 41a can be performed in series on one surface, and efficient component formation is possible.

  The passive element component 41 can be manufactured as follows, for example, by preparing a silicon wafer plate having a general thickness (for example, about 0.5 mm). That is, a silicon oxide layer 41bb is formed on one surface of the silicon wafer plate by, for example, thermal oxidation, and subsequently, a conductor layer 41g, a dielectric layer 41c, a conductor layer 41d, and an interlayer insulating film 41f are formed in their total thickness. As a capacitor, it is formed with a thickness of, for example, several μm, which is satisfactory for functioning as a capacitor. Thereafter, the chip cut out from the silicon wafer plate is back-ground to a thickness sufficient to ensure rigidity, for example, about 70 μm. That is, the passive element component 41A can be configured to have a thickness of 75 μm or less including the terminal 41a.

  Therefore, the passive element component 41 is significantly thinner than the 0603 size and 0402 size, which are general surface mount passive element components, and is as thin as a component having a semiconductor chip. Therefore, thinning is achieved as the component built-in wiring board shown in FIG. In other words, the built-in passive element component 41 can be positioned between the wiring layers 22 and 23 adjacent to each other in the layer direction in which the interlayer connection body 32 derived from the screen printing (described later) is conducted. That is, it can be mentioned that the component 41 can be built in between the two adjacent wiring layers 22 and 23.

  In addition, the form using the silicon plate 41b as a plate-like inorganic material base as shown in FIG. 2 can divert the process used to manufacture the element on the surface to the process used in semiconductor manufacturing. It is easy to build a large number of various passive elements (to be described later), and to form a passive network using these elements. By using the semiconductor manufacturing process, many advantages such as cost reduction and productivity improvement can be expected.

  In FIG. 2, the case where a silicon plate as a semiconductor substrate is used as the plate-like inorganic material substrate 41b has been described, but a ceramic or glass plate as a non-conductive substrate can be used instead. In these cases, even if it is thin (for example, several tens of μm thick), it can maintain rigidity as a component, has good availability, and there are many known techniques for forming passive elements in layers on the surface.

  Returning to the description with reference to FIG. 1, the other structure as the component built-in wiring board is as follows. First, the wiring layers 21 and 24 are wiring layers on both main surfaces as a wiring board, and various components (not shown) can be mounted thereon. On both main surfaces except for the land portions of the wiring layers 21 and 24 on which solder (not shown) is to be mounted, solder melted at the time of solder connection is retained on the land portions and solder resists functioning as protective layers thereafter. A layer can be formed (thickness is, for example, about 20 μm). A Ni / Au plating layer (not shown) having high corrosion resistance may be formed on the surface layer of the land portion.

  Each of the wiring layers 22 and 23 is an inner wiring layer, and in order, the insulating layer 11 is between the wiring layer 21 and the wiring layer 22, and the insulating layers 12 and 13 are between the wiring layer 22 and the wiring layer 23. The insulating layer 14 is located between the wiring layer 23 and the wiring layer 24 and separates the wiring layers 21 to 24. Each of the wiring layers 21 to 24 is made of a metal (copper) foil having a thickness of about 9 μm to 18 μm, for example. On the land formed by the wiring layer 22, the passive element component 41 is mounted via the solder 51 as described above.

  As shown in the drawing, each of the insulating layers 11 to 14 is composed of a rigid insulating resin (for example, epoxy resin) and a reinforcing material (for example, glass cloth) that reinforces the resin. However, the reinforcing material of the insulating layer 12 does not exist in the region where the passive element component 41 is embedded. This is because the position corresponding to the built-in passive element component 41 is originally an opening of the insulating layer 12 and provides a space for embedding the passive element component 41. Thereafter, the insulating layers 12 and 13 are deformed or entered so as to fill the opening for the built-in passive element component 41, and there is no space that becomes a void inside. By providing a reinforcing material to each of the insulating layers 11 to 14, it is possible to obtain sufficient rigidity even though it is thinned as a component built-in wiring board.

  The thicknesses of the insulating layers 11 to 14 are, for example, about 30 μm to 70 μm for the insulating layer 11, about 70 μm to 100 μm for the insulating layer 12, about 40 μm to 50 μm for the insulating layer 13, and about 30 μm to 70 μm for the insulating layer 14. It can be. With the thickness of each of the insulating layers 11 to 14 as described above, the total thickness of the component built-in wiring board in which the passive element component 41 is embedded can be realized to about 250 μm.

  The wiring layer 21 and the wiring layer 22 can be conducted by an interlayer connector 31 that is sandwiched between the surfaces of the patterns and penetrates the insulating layer 11. Similarly, the wiring layer 22 and the wiring layer 23 can be conducted by an interlayer connector 32 that is sandwiched between the surfaces of the patterns and penetrates the insulating layers 12 and 13. The wiring layer 23 and the wiring layer 24 can be conducted by an interlayer connector 33 that is sandwiched between the surfaces of the patterns and penetrates the insulating layer 14.

  The interlayer connectors 31, 32, and 33 are derived from conductive bumps formed by screen printing of a conductive composition, and depend on the manufacturing process in the axial direction (up and down in the illustration of FIG. 1). The diameter changes in the direction of stacking. The diameter is thick, for example, 150 μm for the interlayer connectors 31 and 33 and 220 μm for the interlayer connector 32. These interlayer connectors 31, 32, and 33 can be provided in a small area with high density, and can contribute to finer wiring boards.

  As described above, this wiring board has a passive element component 41 configured in a plate shape as a built-in component. Can be used. In the characteristic inspection, an inspection performed on a semiconductor chip can be used. By selecting a product with good characteristics in advance and using it as a component built in the wiring board, the yield can be improved as a completed component built-in wiring board.

  Next, the manufacturing process of the component built-in wiring board shown in FIG. 1 will be described with reference to FIGS. 3 to 5 are process diagrams schematically showing a part of the manufacturing process of the component built-in wiring board shown in FIG. In these figures, the same or equivalent components as those shown in FIG.

  It demonstrates from FIG. FIG. 3 shows a manufacturing process of a portion centering on the insulating layer 11 in each configuration shown in FIG. First, as shown in FIG. 3 (a), a paste-like conductive composition to be the interlayer connector 31 is formed on a metal foil (electrolytic copper foil) 22A having a thickness of, for example, 9 μm (˜18 μm) by screen printing, for example. It is formed in a substantially conical bump shape (bottom diameter, for example, 150 μm, height, for example, 160 μm). This conductive composition is obtained by dispersing fine metal particles such as silver, gold and copper or fine carbon particles in a paste-like resin. Although printed on the lower surface of the metal foil 22A for convenience of explanation, the upper surface may be used. After the interlayer connector 31 is printed, it is dried and cured.

  Next, as shown in FIG. 3B, a prepreg 11A of FR-4 having a thickness of, for example, 70 μm (˜30 μm) is laminated on the metal foil 22A to penetrate the interlayer connector 31, and the head is Make it exposed. At the time of exposure or thereafter, the tip thereof may be crushed by plastic deformation (in any case, the shape of the interlayer connection body 31 has an axis that coincides with the stacking direction, and the diameter changes in the axial direction). Subsequently, as shown in FIG. 3C, a metal foil (electrolytic copper foil) 21A is laminated on the prepreg 11A, and the whole is integrated by pressing and heating. At this time, the metal foil 21A is in electrical continuity with the interlayer connector 31, and the prepreg 11A is completely cured to become the insulating layer 11.

  Next, as shown in FIG. 3D, patterning by, for example, well-known photolithography is performed on the metal foil 22A on one side, and this is processed into a wiring pattern 22 including connection lands. Then, as shown in FIG. 3E, a cream solder 51A is applied onto the connection lands obtained by processing, for example, by screen printing. Screen printing can be easily and efficiently printed in a predetermined pattern. It can also be applied by a dispenser instead of screen printing.

  Subsequently, the passive element component 41 having the terminal 41a is placed on the connection land via the cream solder 51A by, for example, a mounter. Then, for example, the solder paste 51A is reflowed by heating in a reflow furnace. Such mounting of the passive element component 41 is based on surface mounting technology and is low in cost. As described above, as shown in FIG. 3F, the laminated member 1 in a state where the passive element component 41 is connected to the connection land of the wiring layer 22 by the solder 51 is obtained. The subsequent steps using the laminated member 1 will be described with reference to FIG.

  Next, a description will be given with reference to FIG. FIG. 4 shows a manufacturing process of a portion around each of the insulating layers 12, 13, and 14 in each configuration shown in FIG. First, what is shown in FIG. 4A is a member obtained by a process similar to that shown in FIGS. 3A to 3D. That is, the metal foil (electrolytic copper foil) 24A, the insulating layer 14, the interlayer connector 33, and the wiring layer 23 correspond to the metal foil 21A, the insulating layer 11, the interlayer connector 31, and the wiring layer 22 in FIG. .

  Next, as shown in FIG. 4B, a paste-like conductive composition that becomes the interlayer connector 32 is formed into a substantially conical bump shape (bottom diameter, for example, bottom surface) 220 μm and a height of, for example, 200 μm). This conductive composition may be the same as that used in the interlayer connector 31. After the interlayer connector 32 is printed, it is dried and cured.

  Next, as shown in FIG. 4C, a prepreg 13A of FR-4 with a nominal thickness of 40 μm (˜50 μm) and a prepreg 12A of FR-4 with a nominal 70 μm (˜100 μm) are laminated on the wiring layer 23. Then, the interlayer connector 32 is penetrated so that its head is exposed. At the time of exposure or thereafter, the tip thereof may be crushed by plastic deformation (in any case, the shape of the interlayer connector 32 has an axis that coincides with the stacking direction, and the diameter changes in the axial direction). The member obtained as described above is referred to as a laminated member 2.

  In addition, before the prepregs 13A and 12A shown in FIG. 4C are stacked, a component opening 12o having a size to accommodate the passive element component 41 is formed in advance for the prepreg 12A. The reinforcing material included in the prepreg 12A by the formation of the component opening 12o is also removed at the opening 12o as shown in the figure. Such removal of the reinforcing material is preferable in order to avoid the occurrence of stress that would lead to breakage by avoiding hitting when laminating the built-in passive element component 41.

  Next, a description will be given with reference to FIG. FIG. 5 is a diagram showing an arrangement relationship in which the laminated members 1 and 2 obtained above are laminated. The laminated members 1 and 2 are arranged in the arrangement as shown in FIG. 5 and are pressed and heated by a press. Thereby, the prepregs 12A and 13A are completely cured, and the whole is laminated and integrated. At this time, due to the fluidity of the prepregs 12 </ b> A and 13 </ b> A obtained by heating, the prepregs 12 </ b> A and 13 </ b> A are deformed or enter the space around the passive element component 41 and no gap is generated. Further, the interlayer connector 32 is electrically connected to the wiring layer 22.

  After the laminating process shown in FIG. 5, the metal foils 24A and 21A on both the upper and lower surfaces are patterned in a predetermined manner using well-known photolithography, whereby the component built-in wiring board as shown in FIG. 1 can be obtained.

  As a modification, for the interlayer connectors 31, 32, 33, in addition to those derived from the conductive bumps obtained by printing the conductive composition described above, for example, metal bumps formed by metal plate etching, conductive composition filling It is also possible to appropriately select and employ a connection body obtained from the above, a conductor bump formed by plating, or the like. Further, the outer wiring layers 21 and 24 are formed at the stage of each of the laminated members 1 and 2 (for example, at the stage of FIG. 3D), other than being obtained by patterning after the last lamination process. Also good.

  The embodiment of the present invention has been described above. Next, a modified example of the passive element component 41 to be incorporated will be described. First, FIG. 6 is a sectional view schematically showing a modification of the passive element component 41 shown in FIG. In FIG. 6, the same or equivalent parts as those shown in FIG. Unless there is a matter to be added in particular, explanation of that part is omitted.

  A passive element component 41A shown in FIG. 6 has a terminal 41aa which is a pad for flip connection instead of the terminal 41a for surface mounting. Flip connection is generally well known for semiconductor components. For this flip connection, a protruding electrode 52 to be a connecting member is formed in advance on the terminal 41aa. The protruding electrode 52 is made of, for example, Au (gold) as a material, and is previously formed in a stud shape on the pad. In the case of flip connection, a passive element component 41A having terminals 41aa with a narrower pitch can be used as a built-in element. By using the passive element component 41a in which a large number of passive elements are formed and the terminals 41aa having a narrower pitch are used, it is possible to increase the density of the built-in components.

  FIG. 7 is a process diagram schematically showing a part of the manufacturing process of the component built-in wiring board in the case where the passive element component 41A shown in FIG. 6 is used, and corresponds to the stage shown in FIG. It is an illustration. In FIG. 7, the same reference numerals are given to the same or equivalent components as those shown in the already described drawings.

  In the wiring layer 22, lands are formed in a pattern in alignment with the protruding electrodes 52. The land and the protruding electrode 52 are aligned, and the passive element component 41 a is flip-mounted on the insulating layer 11. Between the passive element component 41A and the wiring layer 22 and the insulating layer 11, a layer of an underfill resin 55 is formed so as to be mechanically and chemically protected at the flip connection portion. By using the laminated member 1A obtained as described above in place of the laminated member 1 in FIG. 5, it is possible to obtain a component built-in wiring board having a built-in passive element component different from that shown in FIG. .

  Next, FIG. 8 is a cross-sectional view schematically showing a modified example of the passive element component 41 shown in FIG. 2, which is different from that shown in FIG. In FIG. 8, the same or equivalent parts as those shown in the already described drawings are denoted by the same reference numerals. Unless there is a matter to be added in particular, explanation of that part is omitted.

  The passive element component 41B has a capacitor, a resistor, and an inductor formed in layers as passive elements. The use of the silicon plate 41b as the base material is the same as that shown in FIGS. 2 and 6, except that the terminal 6b as the passive element component 41B is made of copper conductive material formed through the silicon plate 41b. It is provided on the opposite surface of the silicon plate 41b so as to be electrically connected to the passive element via the via 6a.

  Providing the copper conductive via 6a through the silicon plate 41b is a known technique as a semiconductor manufacturing process. According to the terminal 6b on the opposite surface, the degree of freedom of arrangement in the surface is high, and it is considered that it is particularly suitable when the number of terminals is large. In the structure in which the copper conductive via 6a is provided through the silicon plate 41b and the terminal 6b is further provided on the opposite surface, the silicon plate 41b is in contact with the material of the silicon plate 41b in order to ensure insulation. An insulating film (not shown) is provided at the site.

  Various passive elements included in the passive element component 41B can be provided according to the three layers as the wiring layers, that is, the conductor layers 41g (lower layer), 4c (middle layer), and 5b (upper layer).

  A capacitor can be provided in the conductor layer 41g, which is a lower wiring layer, as shown in the figure. The structure of this capacitor is the same as that of the capacitor of the passive element component 41 shown in FIG. 2 (the reference numerals are also the same). It should be noted that an inductor described later can be provided on the conductor layer 41g by forming a conductor pattern in a spiral.

  As shown in the figure, a resistor can be provided on the layer of the conductor layer 4c (for example, a copper layer) which is an intermediate wiring layer. This resistance has, for example, a titanium or chrome resistance film 4b as a resistive main body, and the resistance film 4b includes the entire conductor layer 4c including the lower side of the pattern of the conductor layer 4c which is a lead portion of this resistance. The region extends below the region and also on the interlayer insulating film 41f. If a titanium or chromium film is used as the resistive film, a resistance with good characteristics can be easily made using a thin film formation process.

  By providing the resistance film 4b below the entire region of the conductor layer 4c and also on the film of the interlayer insulating film 41f, there is an advantage that the resistance including the wiring pattern by the conductor layer 4c can be efficiently formed. is there. In the laminated structure of the resistance film 4b and the conductor layer 4c, the resistance film 4b is a film whose resistance does not affect others. This is because the conductive film 4c ensures conductivity in the horizontal direction and the resistance film 4b can be formed very thin in the vertical direction.

  The resistance film 4b and the conductor layer 4c can be formed by applying a thin film formation process similar to that for the conductor layer 41g. The interlayer insulating film 4a in contact with and covering the conductor layer 4c and the resistor can be similarly formed of the same material as the interlayer insulating film 41f. The via 4d penetrating the interlayer insulating film 4a can be formed by the same method as the via 41e by, for example, copper plating.

  In addition to resistance, an inductor can also be formed in the conductor layer 4c, which is an intermediate wiring layer, by forming a wiring pattern having a two-layer structure in a spiral shape. In this inductor, a via 4d is provided in contact with the center of the spiral which is one end of the inductor, and the via 4d is connected to the pattern of the conductor layer 5b which is an upper layer. Further, the outer periphery of the spiral which is the other end is electrically connected to the pattern of the lower conductor layer 41g by a via 41e formed through the interlayer insulating film 41f. The inductor can also be provided by forming it in a spiral on the lower conductor layer 41g.

  It is also possible to form a capacitor having the above-described structure in the conductor layer 4c, which is an intermediate wiring layer. The lower electrode layer of the capacitor has a laminated structure of the resistance film 4b and the conductor layer 4c, but the resistance of the resistance film 4b does not affect the other electrically.

  In addition to the wiring, an inductor can also be provided in the conductor layer 5b (for example, a copper layer), which is the upper wiring layer, by forming a pattern spirally. The conductor layer 5b can be formed by applying a thin film forming process similar to that for the conductor layer 41g. The insulating film 5a in contact with and covering the conductor layer 5b can be similarly formed of the same material as the interlayer insulating film 41f.

  In this passive element component 41B, the resistance is formed only in the layer of the conductor layer 4c, which is an intermediate wiring layer. However, if the resistance film is changed to form a resistance film in another wiring layer, the wiring Resistance can also be formed in the layer.

  In this passive element component 41B, the layer structure part forming the passive element is thicker than that shown in FIG. 2, but the extent is only a few μm, and it was applied as a built-in component of a wiring board. In this case, the passive element component 41B can be incorporated so as to be included in the height of the interlayer connection body 32 derived from screen printing. Further, since two or more kinds of passive elements are built in, a passive network can be formed, and the added value is improved as a passive element component.

  DESCRIPTION OF SYMBOLS 1, 1A ... Laminated member, 2 ... Laminated member, 4a ... Interlayer insulating film, 4b ... Resistance film, 4c ... Conductor (copper) layer, 4d ... Via, 5a ... Insulating film, 5b ... Conductor (copper) layer, 6a ... Copper conductive via, 6b ... Terminal (for surface mounting), 11, 12, 13, 14 ... Insulating layer, 11A, 12A, 13A ... Prepreg, 12o ... Opening for parts, 21, 22, 23, 24 ... Wiring Layer (wiring pattern), 21A, 22A, 24A ... Metal foil (copper foil), 31, 32, 33 ... Interlayer connector (conductive bump by conductive composition printing), 41, 41B ... Passive element parts (solder connection) Parts), 41A ... passive element parts (flip connection parts), 41a ... terminals (for surface mounting), 41aa ... terminals (pads for flip connection), 41b ... a plate-like inorganic material substrate (silicon plate), 41bb ... silicon Oxide layer, 41c ... Dielectric 41d: Conductor (copper) layer (electrode layer), 41e ... Via (contact), 41f ... Interlayer insulating film, 41g ... Conductor (copper) layer (electrode layer), 51 ... Connection member (solder), 51A ... Cream solder, 52 ... Connecting member (projection electrode (gold stud bump)), 55 ... underfill resin.

Claims (10)

A first insulating layer;
A second insulating layer positioned in a stack with respect to the first insulating layer;
A passive element component having a plurality of terminals embedded in the second insulating layer;
A wiring pattern including a connection land for the passive element component provided between the first insulating layer and the second insulating layer;
A connection member for electrically connecting the plurality of terminals of the passive element component and the connection land of the wiring pattern;
The passive element component has a plate-like inorganic material substrate and a passive element formed in a layer on one surface of the inorganic material substrate, and a lead portion of the passive element is a copper pattern. A component built-in wiring board, wherein a film of an organic insulating material is provided on the one surface of the inorganic material substrate so as to be in contact with at least a part of the passive element.   2. The component built-in wiring board according to claim 1, wherein the organic insulating material of the passive element component is benzocyclobutene or polyimide.   3. The component built-in according to claim 2, wherein the inorganic material substrate of the passive element component is a kind of semiconductor substrate or non-conductive substrate selected from the group consisting of silicon, ceramic, and glass. Wiring board. The inorganic material substrate of the passive element component is a silicon substrate;
The component built-in wiring board according to claim 2, wherein the passive element of the passive element component is one or more selected from the group consisting of a capacitor, a resistor, and an inductor. The inorganic material substrate of the passive element component is a silicon substrate in which an insulating layer of silicon oxide is formed on the surface,
The passive element of the passive element component is a capacitor, and the capacitor includes a lower electrode layer provided on the insulating layer of the silicon base material, and a tantalum oxide or a tantalum oxide provided on the lower electrode layer. A dielectric layer of benzocyclobutene and an upper electrode layer provided on the dielectric layer, wherein the film of the organic insulating material is provided on the upper electrode layer in contact with the lower electrode; The component built-in wiring board according to claim 2, wherein the lead portion extends in each of the layer and the upper electrode layer. The inorganic material substrate of the passive element component is a silicon substrate on which a silicon oxide insulating layer is formed on a surface, and the organic insulating material film is formed on the insulating layer of the silicon substrate. Is provided,
The passive element of the passive element component is a resistor, and the resistor has a titanium or chromium resistance film provided on the film in contact with the film of the organic insulating material. 3. The component built-in wiring board according to claim 2, wherein the wiring board is also provided under the copper pattern which is a lead portion of the resistor and also in a region on the film of the organic insulating material.   The built-in component according to claim 2, wherein the plurality of terminals of the passive element component are electrically connected to the passive element and provided on the one surface of the inorganic material base material. Wiring board.   The inorganic material substrate of the passive element component is a silicon substrate, and the passive element component further includes a plurality of copper conductive vias provided through the silicon substrate, the passive element The plurality of terminals of the component are provided on a surface opposite to the one surface of the inorganic material base so as to be electrically connected to the passive element through the plurality of copper conductive vias. The component built-in wiring board according to claim 2, wherein:   The component built-in wiring board according to claim 2, wherein the connection member is solder.   The component built-in wiring board according to claim 2, wherein the connecting member is gold.

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