JP5311162B1 - Manufacturing method of component mounting board - Google Patents

Manufacturing method of component mounting board Download PDF

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JP5311162B1
JP5311162B1 JP2012140083A JP2012140083A JP5311162B1 JP 5311162 B1 JP5311162 B1 JP 5311162B1 JP 2012140083 A JP2012140083 A JP 2012140083A JP 2012140083 A JP2012140083 A JP 2012140083A JP 5311162 B1 JP5311162 B1 JP 5311162B1
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component mounting
printed wiring
conductive paste
adhesive layer
board
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JP2014007197A (en
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啓貴 上田
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Fujikura Ltd
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Fujikura Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Abstract

【課題】リフロー工程やアンダーフィル工程が不要で電子部品や基板への温度負荷を小さくし、実装部分の接続安定性を向上させて基板の接続信頼性を高める。
【解決手段】部品実装基板1は、基板の表層に形成された接着層41と、接着層41上に形成された、電子部品110,120の実装箇所が開口された部品実装部42,43を有するフィルム材40と、接着層41における基板の配線12a,12b上のビア開口45に充填形成された導電性ペーストビア44と、導電性ペーストビア44に電極111,121が接続されるようにフィルム材40の部品実装部42,43内の接着層41上に実装された電子部品110,120とを備え、電子部品110,120の電極111,121と導電性ペーストビア44とが直接接続されている。
【選択図】図1
A reflow process and an underfill process are not required, a temperature load on an electronic component and a substrate is reduced, connection stability of a mounting portion is improved, and connection reliability of the substrate is increased.
A component mounting board 1 includes an adhesive layer 41 formed on a surface layer of the substrate, and component mounting portions 42 and 43 formed on the adhesive layer 41 and having openings for mounting electronic components 110 and 120. A film material 40, a conductive paste via 44 filled in via openings 45 on the wirings 12 a and 12 b of the substrate in the adhesive layer 41, and a film so that the electrodes 111 and 121 are connected to the conductive paste via 44. Electronic components 110 and 120 mounted on the adhesive layer 41 in the component mounting portions 42 and 43 of the material 40, and the electrodes 111 and 121 of the electronic components 110 and 120 and the conductive paste vias 44 are directly connected. Yes.
[Selection] Figure 1

Description

この発明は、電子部品が表面実装された部品実装基板及びその製造方法並びに部品実装基板実装体に関する。   The present invention relates to a component mounting board on which electronic components are surface-mounted, a manufacturing method thereof, and a component mounting board mounting body.

一般的に、電子部品の基板への実装には半田材料が用いられている(例えば、特許文献1参照)。近年は環境面に考慮して、鉛(Pb)フリータイプの半田が主流となっているが、通常、半田は接続信頼性は高いが、融点が200℃以上と高いこと、再加熱時に再溶融することなどを考慮して使用する必要がある。   Generally, a solder material is used for mounting electronic components on a substrate (see, for example, Patent Document 1). In recent years, lead (Pb) -free type solder has become mainstream in consideration of the environment, but usually solder has high connection reliability, but has a high melting point of 200 ° C or higher, and remelts when reheated. It is necessary to use it in consideration of what to do.

特開2010−10671号公報JP 2010-10671 A

しかしながら、現状の半田使用に際しては、部品実装に関して半田接続時やリフロー時、アンダーフィル時などの温度変化が大きく、電子部品や基板への温度負荷が大きいという問題がある。特に、アンダーフィル後の樹脂中にボイド等の不良があると、2次実装のリフロー時に再溶融した半田が流れ込み、実装部分の破損に繋がるおそれがあるという問題がある。   However, when using the current solder, there is a problem in that the temperature change during solder connection, reflow, underfill, etc. is large with respect to component mounting, and the temperature load on the electronic component and the substrate is large. In particular, if there is a defect such as a void in the resin after underfill, there is a problem that the remelted solder flows during reflow of the secondary mounting, which may lead to damage of the mounting portion.

この発明は、上述した従来技術による問題点を解消し、リフロー工程やアンダーフィル工程が不要で電子部品や基板への温度負荷を小さくし、実装部分の接続安定性を向上させて基板の接続信頼性を高めることができる部品実装基板及びその製造方法並びに部品実装基板実装体を提供することを目的とする。   The present invention eliminates the problems caused by the prior art described above, eliminates the need for a reflow process and an underfill process, reduces the temperature load on the electronic components and the board, improves the connection stability of the mounting part, and improves the connection reliability of the board. An object of the present invention is to provide a component mounting board, a method of manufacturing the same, and a component mounting board mounting body that can improve the performance.

本発明に係る部品実装基板の製造方法は、樹脂基材に配線パッドを含む配線パターン及びビアが形成されたプリント配線板を複数積層すると共に電子部品を表面実装してなる部品実装基板の製造方法であって、複数の樹脂基材に前記配線パターン及びビアの少なくとも一つを形成して複数のプリント配線板を形成する工程と、表層となる前記プリント配線板の表面に、前記配線パッドの上にビア開口が形成された接着層を形成する工程と、前記接着層における前記ビア開口に導電性ペーストを充填し、導電性ペーストビアを形成する工程と、前記導電性ペーストビアに電極が直接接続されるように前記電子部品を前記接着層上に実装する工程と、前記電子部品が実装された前記プリント配線板上に副資材を配置して複数の前記プリント配線板を200℃以下の温度で熱圧着して一括積層する工程とを備えたことを特徴とする。   A method for manufacturing a component mounting board according to the present invention is a method for manufacturing a component mounting board, in which a plurality of printed wiring boards each having a wiring pattern including wiring pads and vias formed on a resin base material are stacked and electronic components are surface-mounted. A step of forming a plurality of printed wiring boards by forming at least one of the wiring patterns and vias on a plurality of resin base materials, and a surface of the printed wiring board serving as a surface layer on the wiring pads. Forming an adhesive layer having via openings formed therein, filling the via openings in the adhesive layer with a conductive paste to form conductive paste vias, and connecting electrodes directly to the conductive paste vias A step of mounting the electronic component on the adhesive layer, and arranging a plurality of the printed wiring boards by arranging auxiliary materials on the printed wiring board on which the electronic components are mounted. 200 ° C. and thermocompression bonding at a temperature below characterized by comprising the step of batch lamination.

本発明に係る部品実装基板の製造方法によれば、上記部品実装基板と同様の作用効果を奏すると共に、200℃以下の温度で熱圧着して一括積層するので、電子部品や基板への温度負荷を低減することができる。   According to the method for manufacturing a component mounting board according to the present invention, the same effects as the above component mounting board can be obtained, and thermocompression bonding is performed at a temperature of 200 ° C. or lower, so that the temperature is applied to the electronic component and the board. Can be reduced.

本発明によれば、リフロー工程やアンダーフィル工程が不要で電子部品や基板への温度負荷を小さくし、実装部分の接続安定性を向上させて基板の接続信頼性を高めることができる。   According to the present invention, the reflow process and the underfill process are unnecessary, the temperature load on the electronic component and the substrate is reduced, the connection stability of the mounting portion is improved, and the connection reliability of the substrate can be increased.

本発明の一実施形態に係る部品実装基板を示す断面図である。It is sectional drawing which shows the component mounting board which concerns on one Embodiment of this invention. 同部品実装基板の製造方法による製造工程を示すフローチャートである。It is a flowchart which shows the manufacturing process by the manufacturing method of the component mounting board | substrate. 同部品実装基板の製造方法による製造工程を示すフローチャートである。It is a flowchart which shows the manufacturing process by the manufacturing method of the component mounting board | substrate. 同部品実装基板を製造工程毎に示す断面図である。It is sectional drawing which shows the said component mounting board | substrate for every manufacturing process. 同部品実装基板を製造工程毎に示す断面図である。It is sectional drawing which shows the said component mounting board | substrate for every manufacturing process. 同部品実装基板を製造工程毎に示す断面図である。It is sectional drawing which shows the said component mounting board | substrate for every manufacturing process. 同部品実装基板を製造工程毎に示す断面図である。It is sectional drawing which shows the said component mounting board | substrate for every manufacturing process. 本発明の一実施形態に係る部品実装基板実装体を示す断面図である。It is sectional drawing which shows the component mounting board | substrate mounting body which concerns on one Embodiment of this invention.

以下、添付の図面を参照して、この発明の実施の形態に係る部品実装基板及びその製造方法並びに部品実装基板実装体を詳細に説明する。図1は、本発明の一実施形態に係る部品実装基板を示す断面図である。図1に示すように、部品実装基板1は、第1プリント配線板10と、第2プリント配線板20と、第3プリント配線板30とを備える。   Hereinafter, a component mounting board, a manufacturing method thereof, and a component mounting board mounting body according to embodiments of the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a cross-sectional view showing a component mounting board according to an embodiment of the present invention. As shown in FIG. 1, the component mounting board 1 includes a first printed wiring board 10, a second printed wiring board 20, and a third printed wiring board 30.

また、部品実装基板1は、表層の第1プリント配線板10上に実装された複数の電子部品110,120を備える。部品実装基板1は、第1〜第3プリント配線板10〜30と、電子部品110,120とを熱圧着により一括積層した構造を備えている。電子部品110,120は、第1プリント配線板10の表面上に接着層41を介して配置されたフィルム材40に形成された開口からなる部品実装部42,43において、電極111,121が導電性ペーストビア44と直接接続される状態で接着層41上に実装されている。   The component mounting board 1 includes a plurality of electronic components 110 and 120 mounted on the first printed wiring board 10 on the surface layer. The component mounting board 1 has a structure in which first to third printed wiring boards 10 to 30 and electronic components 110 and 120 are collectively laminated by thermocompression bonding. In the electronic components 110 and 120, the electrodes 111 and 121 are electrically conductive in the component mounting portions 42 and 43 formed of openings formed in the film material 40 disposed on the surface of the first printed wiring board 10 via the adhesive layer 41. It is mounted on the adhesive layer 41 in a state of being directly connected to the conductive paste via 44.

第1、第2及び第3プリント配線板10,20,30は、それぞれ第1、第2及び第3樹脂基材11,21,31と、これら第1〜第3樹脂基材11〜31の少なくとも片面に形成された配線12a,12b,22,32と、例えば第1及び第2樹脂基材11,21に形成されたビアホール2内に充填形成された導電性ペーストからなる層間接続用ビア13,23とを備える。これら第1〜第3プリント配線板10〜30は、片面CCLや両面CCLで構成することができる。   The first, second, and third printed wiring boards 10, 20, and 30 are respectively the first, second, and third resin base materials 11, 21, 31, and the first to third resin base materials 11-31. Wirings 12a, 12b, 22, and 32 formed on at least one side, and an interlayer connection via 13 made of a conductive paste filled in, for example, the via holes 2 formed in the first and second resin base materials 11 and 21. , 23. These 1st-3rd printed wiring boards 10-30 can be comprised by single-sided CCL and double-sided CCL.

第1〜第3樹脂基材11〜31は、それぞれ例えば厚さ25μm程度の樹脂フィルムにより構成されている。樹脂フィルムとしては、例えばポリイミド、ポリオレフィン、液晶ポリマー(LCP)などを用いることができる。配線12a,12b,22,32は、例えばパターン形成された銅箔からなる。なお、第1プリント配線板10の配線12a,12bの図示部分は、電子部品110,120の電極111,121と電気的に接続される配線パッドとして機能する。   The 1st-3rd resin base materials 11-31 are each comprised by the resin film about 25 micrometers thick, for example. As the resin film, for example, polyimide, polyolefin, liquid crystal polymer (LCP), or the like can be used. The wirings 12a, 12b, 22, 32 are made of, for example, a patterned copper foil. The illustrated portions of the wirings 12 a and 12 b of the first printed wiring board 10 function as wiring pads that are electrically connected to the electrodes 111 and 121 of the electronic components 110 and 120.

電子部品110は、例えばトランジスタ、集積回路(IC)、ダイオード等の半導体素子からなる。電子部品120は、抵抗器、コンデンサ、リレー、圧電素子等からなる。図1に示す電子部品110は、例えば再配線を施したWLP(Wafer Level Package)を示している。電子部品110の電極形成面111bには、パッド111c上に形成された複数の電極(再配線電極)111が設けられ、その周囲には絶縁層111dが形成されている。   The electronic component 110 is made of a semiconductor element such as a transistor, an integrated circuit (IC), or a diode. The electronic component 120 includes a resistor, a capacitor, a relay, a piezoelectric element, and the like. The electronic component 110 shown in FIG. 1 is, for example, a WLP (Wafer Level Package) subjected to rewiring. A plurality of electrodes (redistribution electrodes) 111 formed on the pads 111c are provided on the electrode formation surface 111b of the electronic component 110, and an insulating layer 111d is formed around the electrodes.

層間接続用ビア13,23及び導電性ペーストビア44は、ビアホール2及び接着層41の配線12a,12b上に形成されたビア開口45内にそれぞれ充填された導電性ペーストからなる。導電性ペーストは、例えばニッケル、金、銀、銅、アルミニウム、鉄等から選択される少なくとも1種類の低電気抵抗の金属粒子と、錫、ビスマス、インジウム、鉛等から選択される少なくとも1種類の低融点の金属粒子とを含む。そして、導電性ペーストは、これらの金属粒子に、エポキシ、アクリル、ウレタン等を主成分とするバインダ成分を混合したペーストからなる。   The interlayer connection vias 13 and 23 and the conductive paste via 44 are made of conductive paste filled in the via holes 45 formed in the via holes 2 and the wirings 12a and 12b of the adhesive layer 41, respectively. The conductive paste is, for example, at least one kind of low electrical resistance metal particles selected from nickel, gold, silver, copper, aluminum, iron and the like, and at least one kind selected from tin, bismuth, indium, lead and the like. Low melting point metal particles. The conductive paste is made of a paste obtained by mixing these metal particles with a binder component mainly composed of epoxy, acrylic, urethane, or the like.

このように構成された導電性ペーストは、含有された低融点の金属が200℃以下で溶融し合金を形成することができ、特に銅や銀などとは金属間化合物を形成することができる特性を備える。従って、各ビアと配線との接続部は、一括積層の熱圧着時に金属間化合物により合金化される。   The conductive paste thus configured has the ability to form an alloy by melting the contained low melting point metal at 200 ° C. or less, and in particular, can form an intermetallic compound with copper or silver. Is provided. Therefore, the connection portion between each via and the wiring is alloyed by the intermetallic compound at the time of thermocompression bonding of the batch lamination.

なお、導電ペーストは、例えば粒子径がナノレベルの金、銀、銅、ニッケル等のフィラーが、上記のようなバインダ成分に混合されたナノペーストで構成することもできる。その他、導電ペーストは、上記ニッケル等の金属粒子が、上記のようなバインダ成分に混合されたペーストで構成することもできる。   Note that the conductive paste can also be formed of a nanopaste in which fillers such as gold, silver, copper, and nickel having a nanometer particle size are mixed with the binder component as described above. In addition, the conductive paste can also be composed of a paste in which metal particles such as nickel are mixed with the binder component as described above.

この場合、導電ペーストは、金属粒子同士が接触することで電気的接続が行われる特性となる。導電ペーストのビアホールへの充填方法としては、例えば印刷工法、スピン塗布工法、スプレー塗布工法、ディスペンス工法、ラミネート工法、及びこれらを併用した工法などを用いることができる。なお、第1〜第3プリント配線板10〜30及びフィルム材40は、接着層9及び接着層41を介して積層されている。接着層9,41は、例えば熱硬化性樹脂からなる。   In this case, the conductive paste has a characteristic that electrical connection is made when metal particles come into contact with each other. As a method for filling the via holes with the conductive paste, for example, a printing method, a spin coating method, a spray coating method, a dispensing method, a laminating method, and a method using these in combination can be used. The first to third printed wiring boards 10 to 30 and the film material 40 are laminated via the adhesive layer 9 and the adhesive layer 41. The adhesive layers 9 and 41 are made of, for example, a thermosetting resin.

次に、本実施形態に係る部品実装基板1の製造方法について説明する。
図2A及び図2Bは、部品実装基板の製造方法による製造工程を示すフローチャートである。また、図3〜図6は、部品実装基板を製造工程毎に示す断面図である。なお、第2及び第3プリント配線板20,30については、第1プリント配線板10の製造工程と同様の工程で製造することができるので、特に明記しない限りここでは説明を省略する。
Next, a method for manufacturing the component mounting board 1 according to the present embodiment will be described.
FIG. 2A and FIG. 2B are flowcharts showing a manufacturing process according to a method for manufacturing a component mounting board. 3 to 6 are cross-sectional views showing the component mounting board for each manufacturing process. Note that the second and third printed wiring boards 20 and 30 can be manufactured in the same process as the manufacturing process of the first printed wiring board 10, and therefore the description thereof is omitted here unless otherwise specified.

まず、図2Aを参照しながら、第1プリント配線板10の製造工程について説明する。図3(a)に示すように、第1樹脂基材11の一方の面にベタ状態の銅箔等からなる導体層12cが形成された片面CCLを準備する(ステップS100)。次に、導体層12c上にフォトリソグラフィによりエッチングレジストを形成した後にエッチングを行って、図3(b)に示すように、配線12a,12b等の配線パターンを形成する(ステップS102)。   First, the manufacturing process of the 1st printed wiring board 10 is demonstrated, referring FIG. 2A. As shown in FIG. 3A, a single-sided CCL in which a conductor layer 12c made of a solid copper foil or the like is formed on one surface of the first resin substrate 11 is prepared (step S100). Next, after forming an etching resist on the conductor layer 12c by photolithography, etching is performed to form wiring patterns such as wirings 12a and 12b as shown in FIG. 3B (step S102).

ステップS100にて使用する片面CCLは、例えば厚さ12μm程度の銅箔からなる導体層12cに、厚さ25μm程度の第1樹脂基材11を貼り合わせた構造からなる。この片面CCLとしては、例えば公知のキャスティング法により、銅箔にポリイミドのワニスを塗布してそのワニスを硬化させて作製されたものを使用することができる。   The single-sided CCL used in step S100 has a structure in which a first resin base material 11 having a thickness of about 25 μm is bonded to a conductor layer 12c made of, for example, a copper foil having a thickness of about 12 μm. As this single-sided CCL, for example, a material produced by applying a polyimide varnish to a copper foil and curing the varnish by a known casting method can be used.

その他、片面CCLとしては、ポリイミドフィルム上にシード層をスパッタリングにより形成し、めっきにより銅を成長させて導体層12cを形成したものや、圧延或いは電解銅箔とポリイミドフィルムとを接着材により貼り合わせて作製されたものなどを用いることもできる。   In addition, as single-sided CCL, a seed layer is formed on a polyimide film by sputtering and copper is grown by plating to form a conductor layer 12c, or a rolled or electrolytic copper foil and a polyimide film are bonded together with an adhesive. It is also possible to use the one produced by the above.

なお、第1樹脂基材11は必ずしもポリイミドからなるものである必要はなく、上記のように液晶ポリマー等のプラスチックフィルムからなるものであってもよい。また、ステップS102でのエッチングには塩化第二鉄や塩化第二銅などを主成分とするエッチャントを用いることができる。   Note that the first resin base 11 does not necessarily need to be made of polyimide, and may be made of a plastic film such as a liquid crystal polymer as described above. In addition, an etchant mainly composed of ferric chloride or cupric chloride can be used for the etching in step S102.

配線パターンを形成したら、図3(c)に示すように、第1樹脂基材11の配線12a,12b形成面側と反対側の面に、接着材9aを加熱圧着により貼り付ける(ステップS104)。ステップS104にて貼り付けられる接着材9aとしては、例えば厚さ25μm程度のエポキシ系熱硬化性フィルムを用いることができる。加熱圧着には真空ラミネータを用い、減圧下の雰囲気中にて接着材9aが硬化しない温度で0.3MPaの圧力によりプレスしてこれらを貼り合わせることが挙げられる。   When the wiring pattern is formed, as shown in FIG. 3C, the adhesive 9a is attached to the surface of the first resin substrate 11 opposite to the wiring 12a, 12b formation side by thermocompression bonding (step S104). . For example, an epoxy thermosetting film having a thickness of about 25 μm can be used as the adhesive material 9a attached in step S104. For thermocompression bonding, a vacuum laminator is used, and the adhesive 9a is pressed under a pressure of 0.3 MPa at a temperature at which the adhesive 9a is not cured in a reduced pressure atmosphere.

なお、接着層9や接着材9aに用いられる層間接着材は、エポキシ系の熱硬化性樹脂のみならず、アクリル系の接着材や、熱可塑性ポリイミドなどに代表される熱可塑性接着材などが挙げられる。また、層間接着材は必ずしもフィルム状である必要はなく、ワニス状の樹脂を塗布したものであってもよい。これは、接着層41についても同様である。   The interlayer adhesive used for the adhesive layer 9 and the adhesive 9a is not only an epoxy thermosetting resin, but also an acrylic adhesive, a thermoplastic adhesive represented by thermoplastic polyimide, and the like. It is done. Further, the interlayer adhesive does not necessarily need to be in the form of a film, and may be obtained by applying a varnish-like resin. The same applies to the adhesive layer 41.

そして、図3(d)に示すように、貼り付けた接着材9a側から、例えば配線12aに向かって、例えばUV−YAGレーザ装置を用いてレーザ光を照射して、接着材9a及び第1樹脂基材11を貫通するビアホール2を所定箇所に形成する(ステップS106)。なお、形成されたビアホール2内には、形成後に例えばプラズマデスミア処理が施される。   Then, as shown in FIG. 3D, laser light is irradiated from, for example, the bonded material 9a side toward the wiring 12a using, for example, a UV-YAG laser device, and the adhesive 9a and the first material The via hole 2 penetrating the resin base material 11 is formed at a predetermined location (step S106). The formed via hole 2 is subjected to, for example, a plasma desmear process after the formation.

ステップS106にて形成されるビアホール2は、その他、炭酸ガスレーザ(COレーザ)やエキシマレーザなどで形成してもよいし、ドリル加工や化学的なエッチングなどにより形成してもよい。また、デスミア処理は、CF及びO(四フッ化メタン+酸素)の混合ガスにより行うことができるが、Ar(アルゴン)などのその他の不活性ガスを用いることもでき、いわゆるドライ処理ではなく、薬液を用いたウェットデスミア処理としてもよい。 In addition, the via hole 2 formed in step S106 may be formed by a carbon dioxide laser (CO 2 laser), an excimer laser, or the like, or may be formed by drilling or chemical etching. The desmear treatment can be performed with a mixed gas of CF 4 and O 2 (tetrafluoromethane + oxygen), but other inert gas such as Ar (argon) can also be used. Alternatively, wet desmear treatment using a chemical solution may be used.

ビアホール2を形成したら、図3(e)に示すように、形成したビアホール2内に、例えばスクリーン印刷等により上述したような導電性ペーストを充填して層間接続用ビア13を形成し(ステップS108)、接着層9が備えられた第1樹脂基材11を有する第1プリント配線板10を製造する。なお、第2及び第3プリント配線板20,30についても同様に製造でき、更に多層の場合はその他のプリント配線板を形成して準備しておけばよい。   When the via hole 2 is formed, as shown in FIG. 3E, the via hole for interlayer connection 13 is formed by filling the formed via hole 2 with the conductive paste as described above by, for example, screen printing or the like (step S108). ), The first printed wiring board 10 having the first resin base material 11 provided with the adhesive layer 9 is manufactured. The second and third printed wiring boards 20 and 30 can be manufactured in the same manner. In the case of a multilayer structure, other printed wiring boards may be formed and prepared.

こうして第1〜第3プリント配線板10〜30を作製したら、図2B及び図4(a)に示すように、層間接続用ビア13,23と配線22,32とを、電子部品用実装機で位置合わせして、各接着層9及び層間接続用ビア13,23の導電性ペーストが硬化していない状態で各プリント配線板10〜30を位置決めし、図4(b)に示すように、積層する(ステップS120)。   When the first to third printed wiring boards 10 to 30 are manufactured in this way, as shown in FIG. 2B and FIG. 4A, the interlayer connection vias 13 and 23 and the wirings 22 and 32 are connected by an electronic component mounting machine. Each printed wiring board 10-30 is positioned in a state in which the conductive paste of each adhesive layer 9 and interlayer connection vias 13 and 23 is not cured, as shown in FIG. (Step S120).

次に、図5(a)に示すように、例えば第1プリント配線板10の配線12a,12bに対応する電子部品110,120の実装箇所が予め開口された部品実装部42,43を有するフィルム材40を、接着層41を介して第1プリント配線板10の表面に配置する(ステップS122)。   Next, as shown in FIG. 5A, for example, a film having component mounting portions 42 and 43 in which mounting positions of electronic components 110 and 120 corresponding to the wirings 12a and 12b of the first printed wiring board 10 are opened in advance. The material 40 is disposed on the surface of the first printed wiring board 10 via the adhesive layer 41 (step S122).

そして、図5(b)に示すように、第1プリント配線基板10上の接着層41における配線12a,12b上に、上述したようにレーザ光を照射してビア開口45を形成し(ステップS124)、図5(c)に示すように、形成したビア開口45内にスクリーン印刷等により導電性ペーストを充填して導電性ペーストビア44を形成する(ステップS126)。   Then, as shown in FIG. 5B, the via opening 45 is formed by irradiating the laser beam on the wirings 12a and 12b in the adhesive layer 41 on the first printed wiring board 10 as described above (step S124). 5C, a conductive paste via 44 is formed by filling the formed via opening 45 with a conductive paste by screen printing or the like (step S126).

こうして導電性ペースト44を形成したら、図5(d)に示すように、部品実装部42,43に電子部品110,120を配置して、電極111,121と導電性ペーストビア44とが熱圧着時に接続されるように、各電子部品110,120をフィルム材40の部品実装部42,43内の接着層41上に実装する(ステップS128)。図示の状態では、電子部品110の電極111が導電性ペーストビア44と接していないが、接着層41上への実装時に接するように導電性ペーストビア44が形成されていても良い。   When the conductive paste 44 is formed in this way, as shown in FIG. 5D, the electronic components 110 and 120 are arranged on the component mounting portions 42 and 43, and the electrodes 111 and 121 and the conductive paste via 44 are thermocompression bonded. The electronic components 110 and 120 are mounted on the adhesive layer 41 in the component mounting portions 42 and 43 of the film material 40 so that they are sometimes connected (step S128). In the state shown in the drawing, the electrode 111 of the electronic component 110 is not in contact with the conductive paste via 44, but the conductive paste via 44 may be formed so as to be in contact with the mounting on the adhesive layer 41.

その後、図6(a)に示すように、電子部品110,120を実装した第1プリント配線板10上(すなわち、フィルム材40及び電子部品110,120上)に、圧力や温度で第1プリント配線板10の表面形状に変形可能な熱可塑性樹脂等からなる副資材50を配置する(ステップS130)。   Thereafter, as shown in FIG. 6A, the first print is performed on the first printed wiring board 10 on which the electronic components 110 and 120 are mounted (that is, on the film material 40 and the electronic components 110 and 120) with pressure or temperature. A secondary material 50 made of a thermoplastic resin or the like that can be deformed into the surface shape of the wiring board 10 is disposed (step S130).

最後に、図6(b)に示すように、例えば真空プレス機を用いて、1kPa以下の減圧雰囲気中にて図中白抜き矢印で示すように、副資材50と共に各プリント配線板10〜30を、200℃以下の温度で加熱して加圧することで、熱圧着により一括積層し(ステップS132)、副資材50を除去して(ステップS134)、図1に示すような部品実装基板1を製造する。副資材50は、電子部品110,120の厚さよりも十分厚く形成され、部品実装基板1との接触面には、例えばフッ素樹脂などがコーティングされた易離型処理が施されていても良い。   Finally, as shown in FIG. 6 (b), each printed wiring board 10-30 together with the auxiliary material 50 as shown by a white arrow in a reduced pressure atmosphere of 1 kPa or less using, for example, a vacuum press machine. Is heated and pressed at a temperature of 200 ° C. or less, and is laminated by thermocompression bonding (step S132), the auxiliary material 50 is removed (step S134), and the component mounting board 1 as shown in FIG. To manufacture. The secondary material 50 may be formed sufficiently thicker than the thickness of the electronic components 110 and 120, and the contact surface with the component mounting substrate 1 may be subjected to an easy mold release process coated with, for example, a fluororesin.

一括積層時には、層間の各接着層9や表層の接着層41、各樹脂基材11〜31等の硬化と同時に、ビアホール2やビア開口45に充填された層間接続用ビア13,23や導電性ペーストビア44の導電性ペーストの硬化及び合金化が行われる。従って、導電性ペーストと接する配線12a,12b,22,32や電極111,121との間には、上述したような金属間化合物の合金層が形成される。   At the time of batch lamination, the interlayer connection vias 13 and 23 filled in the via holes 2 and the via openings 45 and the conductive layers are simultaneously formed with the curing of the adhesive layers 9 between the layers, the adhesive layer 41 on the surface layer, and the resin base materials 11 to 31. Curing and alloying of the conductive paste of the paste via 44 is performed. Accordingly, an intermetallic compound alloy layer as described above is formed between the wirings 12a, 12b, 22, 32 and the electrodes 111, 121 in contact with the conductive paste.

このように構成された部品実装基板1は、電子部品110,120の電極111,121と基板との接続に導電性ペーストビア44が用いられているので、部品実装後のリフロー工程での半田材料の再溶融が発生しない。また、接着層41に形成したビア開口45に導電性ペーストを充填した後に電子部品110,120を熱圧着するので、一括で部品接続用のビアとアンダーフィルを形成することができる。   In the component mounting board 1 configured in this way, the conductive paste via 44 is used to connect the electrodes 111 and 121 of the electronic components 110 and 120 to the board, so that the solder material in the reflow process after component mounting is used. Remelting does not occur. In addition, since the electronic components 110 and 120 are thermocompression bonded after the conductive paste is filled in the via openings 45 formed in the adhesive layer 41, vias and underfills for connecting components can be formed at a time.

また、アンダーフィルの充填形成を考慮する必要がないので、部品実装部42,43の開口寸法を電子部品110,120の外寸に合わせることができ、電子部品110,120とのギャップを狭くして、部品実装基板1の全体の高さを抑えることができる。更に、副資材50により電子部品110,120を加圧するので、部品高さの違いにより生じる加圧のばらつきを緩和して機械的強度のばらつきを小さくすることができる。   In addition, since it is not necessary to consider underfill filling formation, the opening dimensions of the component mounting portions 42 and 43 can be adjusted to the outer dimensions of the electronic components 110 and 120, and the gap between the electronic components 110 and 120 can be narrowed. Thus, the overall height of the component mounting board 1 can be suppressed. Furthermore, since the electronic components 110 and 120 are pressurized by the auxiliary material 50, variations in pressurization caused by differences in component height can be alleviated and variations in mechanical strength can be reduced.

また、熱圧着での加熱温度が200℃以下であるため、電子部品110,120の特性変化や各プリント配線板10〜30の反り、残留応力などを従来に比べて抑えることができる。そして、ソルダーレジストの代わりに副資材50を用いるので、製造工程が簡略化されるだけでなく、部品実装後のリフロー及びアンダーフィル工程が不要となり、従来よりも低コスト化を図ることができる。   Moreover, since the heating temperature in thermocompression bonding is 200 ° C. or less, it is possible to suppress changes in characteristics of the electronic components 110 and 120, warpage of the printed wiring boards 10 to 30, and residual stress compared to the conventional case. Since the auxiliary material 50 is used in place of the solder resist, not only the manufacturing process is simplified, but also the reflow and underfill processes after component mounting are not required, and the cost can be reduced as compared with the conventional method.

図7は、本発明の一実施形態に係る部品実装基板実装体を示す断面図である。図7に示すように、部品実装基板実装体1Aは、上述した部品実装基板1に、例えば第3プリント配線板30に形成した層間接続用ビア33を介して電気的に接続された第4プリント配線板60を加えた上で、実装基板90の実装面91上に半田バンプ92を介して実装したものである。   FIG. 7 is a cross-sectional view showing a component mounting board mounting body according to an embodiment of the present invention. As shown in FIG. 7, the component mounting board mounting body 1 </ b> A is connected to the component mounting board 1 described above, for example, via the interlayer connection via 33 formed in the third printed wiring board 30. The wiring board 60 is added, and the wiring board 60 is mounted on the mounting surface 91 of the mounting substrate 90 via the solder bumps 92.

第4プリント配線板60は、例えば両面CCLからなり、第4樹脂基材61の両面の配線62がめっきビアにより導通された構造を備えている。また、実装基板90の実装面91側の表面には、ソルダーレジスト69が形成されている。半田バンプ92は、このソルダーレジスト69側の配線62上に形成されている。このように構成された部品実装基板実装体1Aにおいても、上記部品実装基板1と同様の作用効果を奏することができる。   The fourth printed wiring board 60 is made of, for example, a double-sided CCL, and has a structure in which the wirings 62 on both sides of the fourth resin base 61 are connected by plating vias. A solder resist 69 is formed on the surface of the mounting substrate 90 on the mounting surface 91 side. The solder bump 92 is formed on the wiring 62 on the solder resist 69 side. Also in the component mounting board mounting body 1A configured as described above, the same operational effects as those of the component mounting board 1 can be obtained.

1 部品実装基板
1A 部品実装基板実装体
2 ビアホール
9,41 接着層
10 第1プリント配線板
11 第1樹脂基材
12a,12b 配線
13,23 層間接続用ビア
20 第2プリント配線板
21 第2樹脂基材
22 配線
30 第3プリント配線板
31 第3樹脂基材
32 配線
40 フィルム材
42,43 部品実装部
44 導電性ペーストビア
45 ビア開口
110,120 電子部品
DESCRIPTION OF SYMBOLS 1 Component mounting board 1A Component mounting board mounting body 2 Via hole 9, 41 Adhesion layer 10 1st printed wiring board 11 1st resin base material 12a, 12b Wiring 13, 23 Via for interlayer connection 20 2nd printed wiring board 21 2nd resin Base material 22 Wiring 30 Third printed wiring board 31 Third resin base material 32 Wiring 40 Film material 42, 43 Component mounting portion 44 Conductive paste via 45 Via opening 110, 120 Electronic component

Claims (1)

樹脂基材に配線パッドを含む配線パターン及びビアが形成されたプリント配線板を複数積層すると共に電子部品を表面実装してなる部品実装基板の製造方法であって、
複数の樹脂基材に前記配線パターン及びビアの少なくとも一つを形成して複数のプリント配線板を形成する工程と、
表層となる前記プリント配線板の表面に、前記配線パッドの上にビア開口が形成された接着層を形成する工程と、
前記接着層における前記ビア開口に導電性ペーストを充填し、導電性ペーストビアを形成する工程と、
前記導電性ペーストビアに電極が直接接続されるように前記電子部品を前記接着層上に実装する工程と、
前記電子部品が実装された前記プリント配線板上に副資材を配置して複数の前記プリント配線板を200℃以下の温度で熱圧着して一括積層する工程とを備えた
ことを特徴とする部品実装基板の製造方法。
A method for manufacturing a component mounting board, wherein a plurality of printed wiring boards each having a wiring pattern and vias formed on a resin base material are laminated and surface-mounting an electronic component,
Forming a plurality of printed wiring boards by forming at least one of the wiring patterns and vias on a plurality of resin substrates; and
Forming a bonding layer having a via opening formed on the wiring pad on the surface of the printed wiring board to be a surface layer;
Filling the via opening in the adhesive layer with a conductive paste to form a conductive paste via;
Mounting the electronic component on the adhesive layer such that an electrode is directly connected to the conductive paste via;
A step of arranging a secondary material on the printed wiring board on which the electronic component is mounted, and thermo-compressing the plurality of printed wiring boards at a temperature of 200 ° C. or less and laminating them at once. Manufacturing method of mounting substrate.
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