JP5261756B1 - Multilayer wiring board - Google Patents

Abstract

To reduce the thickness at low cost and improve the connection reliability without reducing the strength of the substrate.
A multilayer wiring board 1 includes first and third printed wiring boards 10 and 30 having wirings 12 and 32 formed on at least one surface and conductive paste vias 13 and 33 formed on the second printed wiring board. 20 is a substrate on which an electronic component 90 is mounted while having an electronic component terminal 19 and a substrate terminal 39 having a terminal pitch different from that of the electronic component terminal 19. A fourth printed wiring board 40 having a wiring pitch smaller than that of the first printed wiring board 10 is built in a lower portion of the mounting portion of the electronic component 90, and the fourth printed wiring board 40 is a conductive paste of the first printed wiring board 10. Wiring patterns 42 and 43 that are connected to the electronic component terminal 19 through the via 13 and expand the connection pitch with the electronic component 90 are formed on both sides thereof.
[Selection] Figure 1

Description

  The present invention relates to a multilayer wiring board on which electronic components are mounted.

  With recent miniaturization of electronic devices, the density and size of electronic components such as semiconductor chips and the pitch of electronic component terminals have been reduced. Accompanying this, reduction and miniaturization of the mounting area of the wiring board on which the electronic components are mounted are also progressing. Under such circumstances, multilayered wiring boards are being promoted, and ensuring connection reliability in interlayer connection is an essential requirement.

  A multilayer wiring board having a multilayered wiring board structure may be used as a board having an interposer for mounting an electronic component having a fine wiring pitch, for example, on a mounting board having a relatively coarse wiring pitch such as a mother board. Yes (see Patent Documents 1 and 2).

Republished patent WO2007 / 129545 JP 2008-60609 A

  However, in the conventional multilayer wiring board disclosed in Patent Document 1 described above, since the heat-resistant substrate as an interposer is made of a silicon (Si) substrate, it is difficult to reduce the thickness as the number of electronic component terminals increases. There is a problem that the thickness of the entire substrate increases. Further, the above-described conventional technology is basically a build-up type, and the manufacturing cost is high.

  Moreover, in the multilayer wiring board of the prior art disclosed in Patent Document 2 described above, the interposer made of a printed circuit board is arranged on the outermost layer, so there is room for improvement in terms of cost and physical stability.

  An object of the present invention is to provide a multilayer wiring board capable of solving the above-described problems caused by the prior art, reducing the thickness at low cost, and improving the connection reliability without reducing the board strength. .

A multilayer wiring board according to the present invention is formed by laminating a plurality of wiring boards having a wiring pattern formed on at least one surface and a conductive paste via formed via an adhesive layer, and an electronic component terminal and the electronic component In the multilayer wiring board having board terminals having terminal pitches different from those of the terminals and mounting electronic parts via the electronic part terminals, the plurality of wiring boards are a first wiring board and a second wiring board having the same thickness. Wiring board, a third wiring board, and a fourth wiring board, and the second wiring board has an opening in which the fourth wiring board is accommodated, and is accommodated in the opening. The fourth wiring board is disposed between the first wiring board and the third wiring board together with the fourth wiring board, and the fourth wiring board includes the first wiring board, the second wiring board, and the second wiring board. The wiring pitch is smaller than 3 wiring boards , Wherein the lower portion of the mounting portion of the electronic component is embedded between the first wiring board and the third wiring board, it is connected to the electronic component terminal via the conductive paste via the previous SL first wiring board A pattern for enlarging the terminal pitch from the electronic component terminal to the board terminal is formed on both sides thereof, and a via for connecting the patterns on both sides is provided.

According to the multilayer wiring board according to the present invention, the lower portion of the mounting portion of the electronic component, through the first wiring board, a built-in fourth wiring board as an interposer, a fourth wiring board, double-sided A pattern for expanding the terminal pitch from the electronic component terminal to the board terminal is formed and has vias for connecting the patterns on both sides. As described above, since the fourth wiring board as the interposer connected to the electronic component is built in the same process as the built-in electronic component when the first wiring board formed with the conductive paste via is laminated, In addition, the thickness can be reduced at a lower cost than the conventional one, and the connection reliability can be improved without reducing the substrate strength.

In one embodiment of the present invention, the fourth wiring board is a single layer, and the first wiring board , the second wiring board , the third wiring board, and the fourth wiring board. The substrate is formed of a resin substrate.

In another embodiment of the present invention, among the electronic component terminals, the outermost electronic component terminal has a terminal pitch according to a pattern continuous with the electronic component terminal of the first wiring board on which the electronic component is mounted. And is connected to the substrate terminal via the conductive paste via without passing through the fourth wiring board.

  According to the present invention, it is possible to reduce the thickness at a low cost and to improve the connection reliability without reducing the substrate strength. Also, the wiring pitch can be expanded efficiently.

It is sectional drawing which shows the structure of the multilayer wiring board which concerns on one Embodiment of this invention. It is a top view which shows a part of wiring pattern of both surfaces in the printed wiring board with which the same multilayer wiring board is incorporated. It is a top view which shows a part of wiring pattern of one side of the printed wiring board. It is a top view which shows a part of wiring pattern of the other surface of the printed wiring board. It is a flowchart which shows the manufacturing process of the multilayer wiring board. It is a flowchart which shows the manufacturing process of the multilayer wiring board. It is a flowchart which shows the manufacturing process of the multilayer wiring board. It is a flowchart which shows the manufacturing process of the multilayer wiring board. It is sectional drawing which shows the same multilayer wiring board for every manufacturing process. It is sectional drawing which shows the same multilayer wiring board for every manufacturing process. It is sectional drawing which shows the same multilayer wiring board for every manufacturing process. It is sectional drawing which shows the same multilayer wiring board for every manufacturing process.

  Hereinafter, a multilayer wiring board according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

  FIG. 1 is a cross-sectional view showing the structure of a multilayer wiring board according to an embodiment of the present invention. As shown in FIG. 1, the multilayer wiring board 1 according to the present embodiment heats a first printed wiring board 10, a second printed wiring board 20, and a third printed wiring board 30 that are first wiring boards. It has a multilayer structure that is laminated together by crimping.

  In addition, the multilayer wiring board 1 is built in an opening 29 formed in the second resin base material 21 of the second printed wiring board 20 while being sandwiched between the first and third printed wiring boards 10 and 30. A fourth printed wiring board 40, which is the second wiring board formed, is provided. The wiring pitch of the fourth printed wiring board 40 is much smaller than that of the first to third printed wiring boards 10, 20, and 30, as will be described later. The multilayer wiring board 1 includes an electronic component 90 mounted on the first printed wiring board 10.

  The 1st-3rd printed wiring boards 10-30 are the 1st resin base material 11, the 2nd resin base material 21, and the 3rd resin base material 31, and at least of these 1st-3rd resin base materials 11-31, respectively. Wirings 12, 22, and 32 formed on one side are provided. The first and third printed wiring boards 10 and 30 are electrically conductively filled in via holes 2 and 3 having a diameter of about 50 to 150 μm formed in the first and third resin base materials 11 and 31, respectively. Paste vias 13 and 33 are provided.

  Further, the second printed wiring board 20 includes a plating via 23 formed so as to conduct both surfaces of the second resin substrate 21 in the via hole 4 having a diameter of about 100 μm formed in the second resin substrate 21. . These 1st-3rd printed wiring boards 10-30 can use a single-sided copper clad laminated board (single-sided CCL), a double-sided copper clad laminated board (double-sided CCL), etc., for example.

  In this example, the second printed wiring board 20 is formed based on the double-sided CCL, and the other first and third printed wiring boards 10 and 30 are formed based on the single-sided CCL. Accordingly, the wirings 22 of the second printed wiring board 20 are formed on both surfaces of the second resin base material 21, and the plating vias 23 connect these wirings 22 on both surfaces to each other.

  The plating via 23 is made of an LVH plating via having a structure in which a through hole formed from the other wiring 22 side is plated without penetrating one wiring 22, for example, copper (Cu). It is formed by plating. Therefore, a plating layer is formed on one wiring 22.

  In addition, although illustration is omitted, a via having a structure in which a conductive paste is filled in the through hole is formed on the second printed wiring board 20 instead of the plating via 23 for plating the inside of the through hole. A plated through hole having a structure in which plating is performed may be formed in a through hole penetrating between the two.

  On the other hand, the fourth printed wiring board 40 includes a fourth resin base 41, wiring patterns 42 and 43 formed on both surfaces of the fourth resin base 41, and 10 to 10 formed on the fourth resin base 41. Plating is formed in the via hole 5 having a diameter of about 30 μm, and a filled plating via 44 that conducts the wiring patterns 42 and 43 is provided.

  The wiring patterns 42 and 43 are formed in a pattern that increases the connection pitch between the electronic component 90 and the multilayer wiring board 1. Here, the pattern pitch of the lower wiring pattern 43 is lower than the pattern pitch of the upper wiring pattern 42. It is formed to be wider. In this example, the wiring pitch of the wiring patterns 42 and 43 of the fourth printed wiring board is 80 μm while the wiring pitch of the wirings 12, 22 and 32 of the first to third printed wiring boards 10, 20 and 30 is 80 μm. , About 20 μm.

  Here, the arrangement | positioning aspect of the wiring patterns 42 and 43 is demonstrated. FIG. 2 is a plan view showing part of the wiring patterns 42 and 43 on both sides of the fourth printed wiring board 40 of the multilayer wiring board 1. 3 is a plan view showing a part of the wiring pattern 42 on one side of the fourth printed wiring board 40, and FIG. 4 is a plan view showing a part of the wiring pattern 43 on the other side of the fourth printed wiring board 40. FIG. The wiring patterns 42 and 43 in FIGS. 2 to 4 are displayed with a layout and dimensions different from those of the fourth printed wiring board 40 in FIG. 1 in order to make it easier to grasp the arrangement mode. Yes. The illustrated example shows a part of the corners of the wiring patterns 42 and 43. Actually, the same pattern continues on the lower side in the vertical direction and the left side in the horizontal direction.

  That is, as shown in FIG. 2, the wiring patterns 42 and 43 are formed on the fourth resin base 41 so that the pattern pitches are different from each other. It becomes possible to pull out. Depending on the layout design conditions, for example, the terminal pitch of the electronic component terminals 19 for 8 rows × 8 columns in the wiring pattern 42 on one surface can be enlarged, so that when combined with the wiring pattern 43 on the other surface, 16 rows It becomes possible to enlarge the terminal pitch for x16 rows with a thickness of one layer. Such a fine layout requires a significant increase in thickness in order to be realized by a silicon interposer or the like. However, the multilayer wiring board 1 of the present embodiment has a thickness of one layer, as shown in FIG. As shown in FIG. 4, the wiring pitch can be efficiently expanded without causing a short circuit or the like of the fine wiring patterns 42 and 43.

  The first to fourth resin base materials 11 to 41 are each formed of a resin film having a thickness of about 25 μm, for example. Here, as the resin film, for example, a resin film made of polyimide (PI), polyolefin (PO), liquid crystal polymer (LCP) or the like, a resin film made of thermosetting epoxy resin (EP), or the like can be used. .

  The electronic component 90 is, for example, a semiconductor component such as an IC chip, a passive component, or the like, and includes a WLP (Wafer Level Package) subjected to rewiring. A plurality of rewiring electrodes 91 formed on pads (not shown) are provided on the electrode forming surface 91b of the electronic component 90. An insulating layer (not shown) is formed on the electrode formation surface 91b around the rewiring electrode 91. The wirings 12, 22, and 32 are formed by patterning a conductive material such as copper foil.

  The conductive paste forming the conductive paste vias 13 and 33 is made of at least one kind of low electrical resistance metal particles selected from gold, silver, copper, aluminum, iron, etc., and tin, bismuth, indium, lead, etc. And at least one low melting point metal particle selected. The conductive paste is made of, for example, a paste obtained by mixing these metal particles with a binder component mainly composed of epoxy, acrylic, urethane, or the like.

  In the conductive paste thus configured, the contained low melting point metal particles can be melted at 200 ° C. or less to form an alloy, and particularly an intermetallic compound can be formed with copper or silver. With characteristics. Therefore, the connection portions between the conductive paste vias 13 and 33 and the wirings 12, 22, 32, 42, and 43 and the plating vias 23 are alloyed by an intermetallic compound at the time of batch lamination.

  In this case, the conductive paste has a characteristic that electrical connection is made when the metal particles come into contact with each other. As a method of filling the conductive paste into the via holes 2 and 3, for example, a printing method, a spin coating method, a spray coating method, a dispensing method, a laminating method, and a method using these in combination can be employed.

  In addition, the 1st-4th printed wiring boards 10-40 are laminated | stacked via the contact bonding layer 9 provided in the 1st and 3rd printed wiring boards 10 and 30 previously. The adhesive layer 9 is made of, for example, a thermosetting resin or a thermoplastic resin. The wiring patterns 42 and 43 and the filled plating via 44 of the fourth printed wiring board 40 are the wirings 12, 22, and 32 of the first to third printed wiring boards 10 to 30, the conductive paste vias 13 and 33, and the plating via 23. In comparison, it is formed with a very fine pitch. The multilayer wiring board 1 includes an electronic component terminal 19 formed on the front surface side of the first printed wiring board 10 and a board terminal 39 formed on the back surface side of the third printed wiring board 30.

  The electronic component terminal 19 and the board terminal 39 are made of, for example, solder, and are portions not covered by the solder resist 18 on the wiring 12 formed on the surface side of the first resin base 11 of the first printed wiring board 10. Or, the solder resist 38 on the wiring 32 formed on the back surface side of the third resin base 31 of the third printed wiring board 30 is formed in a portion not covered.

  The electronic component terminal 19 is connected to the rewiring electrode 91 of the electronic component 90, and the board terminal 39 is connected to the land of the mounting board. The electronic component terminals 19 are formed with a narrow terminal pitch in accordance with the arrangement pitch of the rewiring electrodes 91, and the substrate terminals 39 are formed with a terminal pitch wider than the terminal pitch of the electronic component terminals 19.

  In the multilayer wiring board 1 configured as described above, the wiring 12 in which the electronic component terminal 19 connected to the outermost rewiring electrode 91 of the electronic component 90 is formed on the first printed wiring board 10 is the electronic component. The conductive paste via 13 is formed below the vicinity of the outer end of the wiring 12 so as to spread outward in the plane direction centering on the mounting portion 90.

  On the other hand, in the first printed wiring board 10, the wiring 12 on which the other inner electronic component terminals 19 are formed is formed in a layout substantially matched with the arrangement pitch of the rewiring electrodes 91, and the conductive property is formed below the wiring 12. Paste vias 13 are formed. Therefore, in the first printed wiring board 10, the wiring 12 and the conductive paste via 13 are formed so that the terminal pitch between the outermost electronic component terminal 19 and the inner electronic component terminal 19 is widened in the first stage. ing.

  Next, in the second printed wiring board 20, the conductive paste via 13 connected to the plating via 23 is more planar than the conductive paste via 13 connected to the wiring 22 by the wiring 22 and the plating via 23. The layout is arranged to be arranged outside. At the same time, in the second printed wiring board 20, the conductive paste formed below the wiring 12 in which the inner electronic component terminal 19 is formed in the fourth printed wiring board 40 accommodated in the opening 29. The via 13 is connected to the wiring pattern 42.

  As described above, the fourth printed wiring board 40 is formed with the wiring pattern 43 having a wider pattern pitch than the wiring pattern 42 and is connected to the wiring pattern 42 by the filled plating via 44. The layout is such that the conductive paste via 33 connected to the wiring pattern 43 is arranged on the outer side in the plane direction than the conductive paste via 13. Accordingly, in the fourth printed wiring board 40, the terminal pitch of the electronic component terminals 19 formed inside the outermost electronic component terminals 19 is increased.

  Thus, the second printed wiring board 20 and the fourth printed wiring board 40 built in the second printed wiring board 20 increase the terminal pitch of the electronic component terminals 19 almost entirely in the second stage. Therefore, in the third printed wiring board 30, it is only necessary to form the wiring 32 and the board terminal 39 so as to match the arrangement pitch of the conductive paste vias 33.

  Therefore, according to the multilayer wiring board 1 according to the present embodiment, the thickness can be reduced even if the number of the electronic component terminals 19 is increased as compared with the conventional silicon interposer, and the thickness of the entire board can be suppressed. . In addition, since the fourth printed wiring board 40 is built in, it is possible to improve the connection reliability while maintaining the strength of the entire board as compared with the case where the fourth printed wiring board 40 is disposed on the outermost layer.

  Furthermore, since the fourth printed wiring board 40 is built in a part of the second printed wiring board 20, compared with the case where the entire second printed wiring board 20 is formed at a fine pitch like the fourth printed wiring board 40. Can be formed inexpensively. For this reason, it is possible to reduce the thickness at low cost and to improve the connection reliability without reducing the substrate strength. If it is possible to manufacture the fourth printed wiring board 40 at a low cost, the fourth printed wiring board 40 is provided on the entire surface between the first and third printed wiring boards 10 and 30 instead of the second printed wiring board 20. It is good also as a structure which has arranged.

Next, a method for manufacturing the multilayer wiring board 1 according to this embodiment will be described.
5 to 8 are flowcharts showing manufacturing steps of the multilayer wiring board 1. 9-12 is sectional drawing which shows the multilayer wiring board 1 for every manufacturing process. 5 and 9 show the first printed wiring board 10, FIGS. 6 and 10 show the second printed wiring board 20, FIGS. 7 and 11 show the fourth printed wiring board 40, and FIG. FIG. 12 shows each manufacturing process for the final process of the multilayer wiring board 1. The third printed wiring board 30 can be manufactured in the same process as that of the first printed wiring board 10, and therefore the description is omitted unless otherwise specified.

  First, the manufacturing process of the first printed wiring board 10 will be described with reference to FIG. As shown in FIG. 9A, a single-sided CCL in which a conductor layer 8 made of a solid copper foil or the like is formed on one surface of the first resin substrate 11 is prepared (step S100). Next, after forming an etching resist on the conductor layer 8 by photolithography, etching is performed to form a wiring pattern such as the wiring 12 as shown in FIG. 9B (step S102).

  The single-sided CCL used in step S100 has a structure in which the first resin base material 11 having a thickness of about 25 μm is bonded to the conductor layer 8 made of, for example, a copper foil having a thickness of about 12 μm. As this single-sided CCL, for example, a material produced by applying a polyimide varnish to a copper foil and curing the varnish by a known casting method can be used.

  In addition, as single-sided CCL, a seed layer is formed on a polyimide film by sputtering, and copper is grown by plating to form a conductor layer 8, or a rolled or electrolytic copper foil and a polyimide film are bonded together with an adhesive. It is also possible to use the one produced by the above.

  Note that the first resin base 11 does not necessarily need to be made of polyimide, and may be made of a plastic film such as a liquid crystal polymer as described above. In addition, an etchant mainly composed of ferric chloride or cupric chloride can be used for the etching in step S102.

  After the wiring 12 is formed, as shown in FIG. 9C, the adhesive 9a and the mask material 7 are attached to the surface of the first resin base 11 opposite to the wiring 12 formation surface by thermocompression bonding (step) S104). For example, an epoxy thermosetting film having a thickness of about 25 μm can be used as the adhesive material 9a attached in step S104. For thermocompression bonding, a vacuum laminator is used, and the adhesive 9a is pressed under a pressure of 0.3 MPa at a temperature at which the adhesive 9a is not cured in a reduced pressure atmosphere.

  The interlayer adhesive used for the adhesive layer 9 and the adhesive 9a is not only an epoxy thermosetting resin, but also an acrylic adhesive, a thermoplastic adhesive represented by thermoplastic polyimide, and the like. It is done. Further, the interlayer adhesive does not necessarily need to be in the form of a film, and may be obtained by applying a varnish-like resin. As the mask material 7, in addition to the above-described resin film and plastic films such as PET and PEN, various films that can be bonded and peeled off by UV irradiation can be used.

  Then, laser light is irradiated from the attached mask material 7 side toward the wiring 12 using, for example, a UV-YAG laser device, and penetrates the mask material 7, the adhesive material 9 a, and the first resin base material 11. The via hole 2 is formed at a predetermined location (step S106). The via hole 2 at this time is formed to have a diameter of about 50 μm to 150 μm. The via hole 2 is subjected to desmearing such as plasma desmear after the formation.

In addition, the via hole 2 formed in step S106 may be formed by a carbon dioxide laser (CO ₂ laser), an excimer laser, or the like, or may be formed by drilling or chemical etching. The desmear treatment can be performed with a mixed gas of CF ₄ and O ₂ (tetrafluoromethane + oxygen), but other inert gas such as Ar (argon) can also be used. Alternatively, wet desmear treatment using a chemical solution may be used.

  Thereafter, as shown in FIG. 9D, the formed via hole 2 is filled with a conductive paste by, for example, screen printing to form a conductive paste via 13 (step S108), and the mask material 7 is peeled off. After removing (step S110), as shown in FIG. 9 (e), the first printed wiring having the first resin base material 11 provided with the adhesive layer 9 while the wiring 12 and the conductive paste via 13 are formed. A substrate 10 is formed. The third printed wiring board 30 having wirings 32 and conductive paste vias 33 having different sizes and arrangement pitches is manufactured and prepared by performing the same process as described above.

  Next, the manufacturing process of the second printed wiring board 20 will be described with reference to FIG. In addition, the part already demonstrated may attach | subject the same code | symbol, and may omit description, and suppose that the content mentioned above is applicable to the specific processing content of each step. First, as shown to Fig.10 (a), the double-sided copper clad laminated board (double-sided CCL) by which the conductor layer 8 was formed on both surfaces of the 2nd resin base material 21 was prepared (step S120), and FIG.10 (b) As shown in FIG. 5, via holes 4 are formed at predetermined positions (step S122), and for example, plasma desmear processing is performed.

  Next, as shown in FIG. 10C, panel plating is performed on one surface of the second resin base material 21 (step S <b> 124) to form a plating layer 23 a on the conductor layer 8 and in the via hole 4. In FIG. 10C, the plating layer on the upper conductor layer 8 is not shown. The plated layer 23 a in the via hole 4 is used later as the plated via 23 and electrically connects the conductor layers 8 on both surfaces of the second resin base material 21.

  Then, as shown in FIG. 10D, wiring patterns such as wirings 22 and plating vias 23 are formed on both surfaces of the second resin base material 21 by etching or the like (step S126). Finally, as shown in FIG. 10E, the portion of the second resin base material 21 in which the fourth printed wiring board 40 is built is removed by a UV laser or the like to form an opening 29 (step S128). Then, the second printed wiring board 20 is formed.

Next, the manufacturing process of the fourth printed wiring board 40 will be described with reference to FIG.
As shown in FIG. 11A, first, a fourth resin substrate 41 made of a polyimide resin film or the like is prepared (step S130), and as shown in FIG. A via hole 5 having a diameter of about 10 μm to 30 μm is formed at a location using an excimer laser or the like (step S132).

  After the via hole 5 is formed, a desmear process such as plasma desmear is performed (step S134), a plating resist (not shown) is formed, and wiring patterns 42 and 43 are formed by, for example, a semi-additive method as shown in FIG. Then, a filled plating via 44 is formed (step S138).

  Then, the plating resist is removed (step S140), and finally, as shown in FIG. 11 (d), it is cut into a predetermined size using an unillustrated device such as a dicer (step S142). A plurality of fourth printed wiring boards 40 are manufactured.

  When the first to fourth printed wiring boards 10 to 40 are manufactured in this way, the wiring pattern 42 of the fourth printed wiring board 40 and the conductive paste via 13 of the first printed wiring board 10 are prepared as shown in FIG. Are aligned using an electronic component mounting machine, and the fourth printed wiring board 40 is mounted in a state where the adhesive layer 9 of the first printed wiring board 10 and the conductive paste of the conductive paste via 13 are not cured. Temporarily bonded to the first printed wiring board 10.

  Then, as shown in FIG. 8, each printed wiring board 10-40 is positioned and laminated | stacked (step S150). Then, for example, using a vacuum curing press, heat lamination is performed in a reduced-pressure atmosphere of 1 kPa or less to perform batch lamination by thermocompression bonding (step S152). Thereby, the multilayer wiring board 1 as shown in FIG. At this time, the conductive paste filled in the via hole is cured and alloyed simultaneously with the curing of the adhesive layers 9 between the layers, the resin base materials 11 to 41, and the like. Therefore, an intermetallic compound alloy layer is formed between the conductive paste and the wiring in contact with the conductive paste as described above.

  Thereafter, as shown in FIG. 12C, on the first and third resin bases 11 and 31 on the wirings 12 and 32 side of the first printed wiring board 10 and the third printed wiring board 30 in the multilayer wiring board 1. The solder resists 18 and 38 are patterned. Finally, bumps to be the electronic component terminals 19 and substrate terminals 39 are formed on the wirings 12 and 32, and the rewiring electrodes 91 of the electronic components 90 are connected to the electronic component terminals 19 and mounted. A multilayer wiring board 1 as shown is completed.

  Thus, the multilayer wiring board 1 according to the present embodiment can be manufactured by the simple manufacturing process as described above. In particular, the fourth printed wiring board 40 can be mounted on the printed wiring board using a normal electronic component mounting machine for mounting electronic components, and can be built in the multilayer wiring board 1 by batch lamination. It is possible to easily manufacture the multilayer wiring board 1 capable of improving connection reliability without reducing the substrate strength while reducing the thickness at a low cost.

DESCRIPTION OF SYMBOLS 1 Multilayer wiring board 2, 3, 4, 5 Via hole 7 Mask material 8 Conductor layer 9 Adhesive layer 10 1st printed wiring board 11 1st resin base material 12, 22, 32 Wiring 13,33 Conductive paste via | veer 18,38 Solder Resist 19 Electronic component terminal 20 Second printed circuit board 21 Second resin substrate 23 Plating via 30 Third printed circuit board 31 Third resin substrate 39 Board terminal 40 Fourth printed circuit board 41 Fourth resin substrate 42, 43 Wiring pattern 44 Filled plating via 90 Electronic component 91 Rewiring electrode

Claims (4)

A plurality of wiring boards each having a wiring pattern formed on at least one surface and conductive paste vias are stacked via an adhesive layer, and electronic component terminals and board terminals having terminal pitches different from those of the electronic component terminals are provided. And having a multilayer wiring board on which electronic components are mounted via the electronic component terminals,
The plurality of wiring boards include a first wiring board, a second wiring board, a third wiring board, and a fourth wiring board having the same thickness,
The second wiring board has an opening in which the fourth wiring board is accommodated, and the first wiring board and the third wiring together with the fourth wiring board accommodated in the opening. Placed between the substrates,
The fourth wiring substrate, the first wiring board, the second wiring board and smaller wiring pitch than the third wiring board, the first wiring substrate at the bottom of the mounting portion of the electronic component and the third is built between the wiring substrate, is pre SL connected to the first of the electronic component terminal via the conductive paste via the wiring board, the terminal and from the electronic component terminal on both sides thereof to the substrate terminal A multilayer wiring board, wherein a pattern for increasing the pitch is formed and has vias connecting the patterns on both sides. The fourth wiring board is a single layer.
The multilayer wiring board according to claim 1, wherein: The said 1st wiring board , the said 2nd wiring board , the said 3rd wiring board, and the said 4th wiring board are formed with the resin substrate. The Claim 1 or 2 characterized by the above-mentioned. Multilayer wiring board. Out of the electronic component terminals, the outermost electronic component terminal is expanded in terminal pitch by a pattern continuous with the electronic component terminal of the first wiring substrate on which the electronic component is mounted, and the fourth wiring substrate. The multilayer wiring board according to any one of claims 1 to 3, wherein the multilayer wiring board is connected to the board terminal via the conductive paste via without passing through the board.

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