JP2011009259A5 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP2011009259A5
JP2011009259A5 JP2009148386A JP2009148386A JP2011009259A5 JP 2011009259 A5 JP2011009259 A5 JP 2011009259A5 JP 2009148386 A JP2009148386 A JP 2009148386A JP 2009148386 A JP2009148386 A JP 2009148386A JP 2011009259 A5 JP2011009259 A5 JP 2011009259A5
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Japan
Prior art keywords
semiconductor device
detection light
rod
alignment mark
scanning direction
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JP2009148386A
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JP2011009259A (ja
JP5623033B2 (ja
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Priority to JP2009148386A priority Critical patent/JP5623033B2/ja
Priority claimed from JP2009148386A external-priority patent/JP5623033B2/ja
Priority to US12/801,259 priority patent/US8497997B2/en
Priority to CN201010195003.7A priority patent/CN101937904B/zh
Publication of JP2011009259A publication Critical patent/JP2011009259A/ja
Publication of JP2011009259A5 publication Critical patent/JP2011009259A5/ja
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Claims (1)

  1. 検出光によって位置座標が検出されるアライメントマークが搭載された半導体装置において、
    前記アライメントマークは、前記検出光の走査方向に沿って所定の間隔で配置された複数の棒状マークを備え、
    前記複数の棒状マークの各々は、前記走査方向に直交する第１方向に沿って所定の間隔で配置された複数の配線マークによって形成され、
    互いに隣接する前記配線マークの間隔は、半導体装置の設計制約の範囲内において前記検出光の波長より短い
    半導体装置。
JP2009148386A 2009-06-23 2009-06-23 半導体装置、リソグラフィ方法、及び半導体装置の製造方法 Active JP5623033B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2009148386A JP5623033B2 (ja) 2009-06-23 2009-06-23 半導体装置、リソグラフィ方法、及び半導体装置の製造方法
US12/801,259 US8497997B2 (en) 2009-06-23 2010-05-28 Semiconductor device and method of manufacturing the same
CN201010195003.7A CN101937904B (zh) 2009-06-23 2010-05-31 半导体器件及其制造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009148386A JP5623033B2 (ja) 2009-06-23 2009-06-23 半導体装置、リソグラフィ方法、及び半導体装置の製造方法

Publications (3)

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JP2011009259A JP2011009259A (ja) 2011-01-13
JP2011009259A5 true JP2011009259A5 (ja) 2012-04-19
JP5623033B2 JP5623033B2 (ja) 2014-11-12

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US (1) US8497997B2 (ja)
JP (1) JP5623033B2 (ja)
CN (1) CN101937904B (ja)

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US9252202B2 (en) * 2011-08-23 2016-02-02 Wafertech, Llc Test structure and method for determining overlay accuracy in semiconductor devices using resistance measurement
JP6076123B2 (ja) 2013-02-14 2017-02-08 オリンパス株式会社 半導体基板、撮像素子、および撮像装置
CN104795383B (zh) * 2014-01-20 2017-11-03 中芯国际集成电路制造(上海)有限公司 对准标记、对准标记的检测方法和对准标记检测装置
CN105023911B (zh) * 2014-04-15 2018-05-25 联华电子股份有限公司 标记分段方法及应用其的半导体结构制造方法
US9470987B1 (en) * 2015-10-22 2016-10-18 United Microelectronics Corp. Overlay mask
US9625256B1 (en) * 2015-12-23 2017-04-18 Intel Corporation Device, system and method for alignment of an integrated circuit assembly
US10585357B2 (en) * 2015-12-28 2020-03-10 Asml Netherlands B.V. Alternative target design for metrology using modulation techniques
US20190044068A1 (en) * 2017-08-01 2019-02-07 Wuhan China Star Optoelectronics Semiconductor Dis play Technology Co., Ltd. Mask plate
CN107677953B (zh) * 2017-09-29 2020-05-05 京东方科技集团股份有限公司 一种探针系统及其控制方法、点灯机
CN110676243B (zh) * 2019-09-30 2021-09-14 芯盟科技有限公司 芯片及对位方法
CN112201645B (zh) * 2020-09-18 2024-04-12 武汉新芯集成电路制造有限公司 套刻标识、晶圆的套刻误差测量方法及晶圆的堆叠方法
CN113093479B (zh) * 2021-04-02 2022-10-28 长鑫存储技术有限公司 对准量测标记结构及对准量测方法

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JP4269393B2 (ja) 1999-03-03 2009-05-27 株式会社ニコン アライメントマーク及びアライメント方法
JP2000306822A (ja) 1999-04-26 2000-11-02 Hitachi Ltd 半導体装置の製造方法
JP2001044105A (ja) 1999-07-28 2001-02-16 Hitachi Ltd 半導体装置の製造方法
JP2001102285A (ja) 1999-09-28 2001-04-13 Toshiba Corp 位置合わせマーク
US6486954B1 (en) 2000-09-01 2002-11-26 Kla-Tencor Technologies Corporation Overlay alignment measurement mark
JP2003209037A (ja) 2002-01-11 2003-07-25 Sony Corp アライメントマーク及び半導体装置の製造方法
US6985229B2 (en) * 2002-05-30 2006-01-10 Agere Systems, Inc. Overlay metrology using scatterometry profiling
US6933523B2 (en) * 2003-03-28 2005-08-23 Freescale Semiconductor, Inc. Semiconductor alignment aid
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JP4520429B2 (ja) * 2005-06-01 2010-08-04 エーエスエムエル ネザーランズ ビー．ブイ． 位置合わせ装置への２次元フォトニック結晶の応用
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