JP2010531061A5 - - Google Patents
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- Publication number
- JP2010531061A5 JP2010531061A5 JP2010513189A JP2010513189A JP2010531061A5 JP 2010531061 A5 JP2010531061 A5 JP 2010531061A5 JP 2010513189 A JP2010513189 A JP 2010513189A JP 2010513189 A JP2010513189 A JP 2010513189A JP 2010531061 A5 JP2010531061 A5 JP 2010531061A5
- Authority
- JP
- Japan
- Prior art keywords
- etched
- forming
- opening
- etching
- spacers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000463 material Substances 0.000 claims 60
- 238000000034 method Methods 0.000 claims 24
- 125000006850 spacer group Chemical group 0.000 claims 24
- 238000005530 etching Methods 0.000 claims 23
- 230000007246 mechanism Effects 0.000 claims 14
- 239000004020 conductor Substances 0.000 claims 13
- 102100022717 Atypical chemokine receptor 1 Human genes 0.000 claims 8
- 101000678879 Homo sapiens Atypical chemokine receptor 1 Proteins 0.000 claims 8
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 8
- 229920005591 polysilicon Polymers 0.000 claims 8
- 239000004065 semiconductor Substances 0.000 claims 7
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 claims 7
- 229910021342 tungsten silicide Inorganic materials 0.000 claims 7
- 229910021332 silicide Inorganic materials 0.000 claims 5
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims 5
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 claims 4
- 239000003575 carbonaceous material Substances 0.000 claims 3
- 238000004519 manufacturing process Methods 0.000 claims 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims 2
- 230000003667 anti-reflective effect Effects 0.000 claims 2
- 229910052799 carbon Inorganic materials 0.000 claims 2
- 239000011521 glass Substances 0.000 claims 2
- 239000011295 pitch Substances 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/766,931 US7985681B2 (en) | 2007-06-22 | 2007-06-22 | Method for selectively forming symmetrical or asymmetrical features using a symmetrical photomask during fabrication of a semiconductor device and electronic systems including the semiconductor device |
| US11/766,931 | 2007-06-22 | ||
| PCT/US2008/006884 WO2009002389A2 (en) | 2007-06-22 | 2008-05-30 | Method for selectively forming symmetrical or asymmetrical features using a symmetrical photomask during fabrication of a semiconductor device and electronic systems including the semiconductor device |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010531061A JP2010531061A (ja) | 2010-09-16 |
| JP2010531061A5 true JP2010531061A5 (enExample) | 2011-07-21 |
| JP5382464B2 JP5382464B2 (ja) | 2014-01-08 |
Family
ID=40136808
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010513189A Active JP5382464B2 (ja) | 2007-06-22 | 2008-05-30 | 半導体デバイスを含む電子システムの製造中に、対称なフォトマスクを用いて対称もしくは非対称な機構を選択的に形成するための方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US7985681B2 (enExample) |
| EP (1) | EP2160754B1 (enExample) |
| JP (1) | JP5382464B2 (enExample) |
| KR (1) | KR101446826B1 (enExample) |
| TW (1) | TWI471904B (enExample) |
| WO (1) | WO2009002389A2 (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9385132B2 (en) * | 2011-08-25 | 2016-07-05 | Micron Technology, Inc. | Arrays of recessed access devices, methods of forming recessed access gate constructions, and methods of forming isolation gate constructions in the fabrication of recessed access devices |
| JP5899082B2 (ja) * | 2012-08-08 | 2016-04-06 | 富士フイルム株式会社 | パターン形成方法、及び、これを用いた電子デバイスの製造方法 |
| US9093378B2 (en) * | 2013-03-15 | 2015-07-28 | Samsung Electronics Co., Ltd. | Method for forming patterns of semiconductor device using SADP process |
| US9005463B2 (en) | 2013-05-29 | 2015-04-14 | Micron Technology, Inc. | Methods of forming a substrate opening |
| EP3430641B1 (en) | 2016-03-15 | 2022-12-14 | AlixLabs AB | A method for selective etching of nanostructures |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01165125A (ja) * | 1987-12-22 | 1989-06-29 | New Japan Radio Co Ltd | 半導体装置の製造方法 |
| JP3210359B2 (ja) * | 1991-05-29 | 2001-09-17 | 株式会社東芝 | ドライエッチング方法 |
| US5550088A (en) * | 1993-06-02 | 1996-08-27 | Lucent Technologies Inc. | Fabrication process for a self-aligned optical subassembly |
| US5356828A (en) * | 1993-07-01 | 1994-10-18 | Digital Equipment Corporation | Method of forming micro-trench isolation regions in the fabrication of semiconductor devices |
| US5411913A (en) * | 1994-04-29 | 1995-05-02 | National Semiconductor Corporation | Simple planarized trench isolation and field oxide formation using poly-silicon |
| KR19990027887A (ko) * | 1997-09-30 | 1999-04-15 | 윤종용 | 스페이서를 이용한 반도체장치의 미세 패턴 형성방법 |
| JP3646841B2 (ja) * | 1997-12-03 | 2005-05-11 | 富士通株式会社 | 平面基板の液処理方法 |
| US6297163B1 (en) * | 1998-09-30 | 2001-10-02 | Lam Research Corporation | Method of plasma etching dielectric materials |
| US6191016B1 (en) * | 1999-01-05 | 2001-02-20 | Intel Corporation | Method of patterning a layer for a gate electrode of a MOS transistor |
| KR100282232B1 (ko) * | 1999-02-22 | 2001-02-15 | 김영환 | 반도체장치의 배선 형성방법 |
| US7250371B2 (en) * | 2003-08-26 | 2007-07-31 | Lam Research Corporation | Reduction of feature critical dimensions |
| US7129159B2 (en) * | 2004-08-17 | 2006-10-31 | International Business Machines Corporation | Integrated dual damascene RIE process with organic patterning layer |
| US7151040B2 (en) * | 2004-08-31 | 2006-12-19 | Micron Technology, Inc. | Methods for increasing photo alignment margins |
| US7115525B2 (en) * | 2004-09-02 | 2006-10-03 | Micron Technology, Inc. | Method for integrated circuit fabrication using pitch multiplication |
| DE102004057181A1 (de) * | 2004-11-26 | 2006-06-01 | Infineon Technologies Ag | Verfahren zum Herstellen eines vergrabenen leitenden Anschlusses an einen Grabenkondensator und einer Speicherzelle mit einem solchen Anschluss |
| KR100670396B1 (ko) * | 2004-12-30 | 2007-01-16 | 동부일렉트로닉스 주식회사 | 사이드 로브 현상을 이용한 실린더형 커패시터 형성 방법 |
| US7253118B2 (en) * | 2005-03-15 | 2007-08-07 | Micron Technology, Inc. | Pitch reduced patterns relative to photolithography features |
| US7285499B1 (en) * | 2005-05-12 | 2007-10-23 | Advanced Micro Devices, Inc. | Polymer spacers for creating sub-lithographic spaces |
-
2007
- 2007-06-22 US US11/766,931 patent/US7985681B2/en active Active
-
2008
- 2008-05-30 WO PCT/US2008/006884 patent/WO2009002389A2/en not_active Ceased
- 2008-05-30 EP EP08767988.2A patent/EP2160754B1/en active Active
- 2008-05-30 JP JP2010513189A patent/JP5382464B2/ja active Active
- 2008-05-30 KR KR1020107001494A patent/KR101446826B1/ko active Active
- 2008-06-17 TW TW97122579A patent/TWI471904B/zh active
-
2011
- 2011-06-17 US US13/162,889 patent/US20110248385A1/en not_active Abandoned
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