JP2010529534A5 - - Google Patents
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- Publication number
- JP2010529534A5 JP2010529534A5 JP2010510322A JP2010510322A JP2010529534A5 JP 2010529534 A5 JP2010529534 A5 JP 2010529534A5 JP 2010510322 A JP2010510322 A JP 2010510322A JP 2010510322 A JP2010510322 A JP 2010510322A JP 2010529534 A5 JP2010529534 A5 JP 2010529534A5
- Authority
- JP
- Japan
- Prior art keywords
- microcode
- cache
- instruction
- processor
- level cache
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/754,589 US7734873B2 (en) | 2007-05-29 | 2007-05-29 | Caching of microcode emulation memory |
| US11/754,589 | 2007-05-29 | ||
| PCT/US2008/006746 WO2008153799A1 (en) | 2007-05-29 | 2008-05-28 | Caching of microcode emulation memory |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010529534A JP2010529534A (ja) | 2010-08-26 |
| JP2010529534A5 true JP2010529534A5 (enExample) | 2011-07-28 |
| JP5496085B2 JP5496085B2 (ja) | 2014-05-21 |
Family
ID=39708011
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2010510322A Active JP5496085B2 (ja) | 2007-05-29 | 2008-05-28 | マイクロコードエミュレーションメモリのキャッシング |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US7734873B2 (enExample) |
| JP (1) | JP5496085B2 (enExample) |
| KR (1) | KR101503865B1 (enExample) |
| CN (1) | CN101707881B (enExample) |
| DE (1) | DE112008001473B4 (enExample) |
| GB (1) | GB2462556B (enExample) |
| TW (1) | TWI457826B (enExample) |
| WO (1) | WO2008153799A1 (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8296528B2 (en) * | 2008-11-03 | 2012-10-23 | Intel Corporation | Methods and systems for microcode patching |
| US20120017039A1 (en) * | 2010-07-16 | 2012-01-19 | Plx Technology, Inc. | Caching using virtual memory |
| US9529729B2 (en) * | 2010-11-16 | 2016-12-27 | International Business Machines Corporation | Location of memory management translations in an emulated processor |
| US9251093B2 (en) | 2011-05-19 | 2016-02-02 | International Business Machines Corporation | Managing the translation look-aside buffer (TLB) of an emulated machine |
| CN106469020B (zh) * | 2015-08-19 | 2019-08-09 | 旺宏电子股份有限公司 | 高速缓存元件与控制方法及其应用系统 |
| US10884751B2 (en) | 2018-07-13 | 2021-01-05 | Advanced Micro Devices, Inc. | Method and apparatus for virtualizing the micro-op cache |
| US11016763B2 (en) | 2019-03-08 | 2021-05-25 | Advanced Micro Devices, Inc. | Implementing a micro-operation cache with compaction |
| US11720360B2 (en) | 2020-09-11 | 2023-08-08 | Apple Inc. | DSB operation with excluded region |
| CN119025052B (zh) * | 2024-10-29 | 2025-02-28 | 上海芯力基半导体有限公司 | 一种处理器及其内存读取方法 |
Family Cites Families (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4901235A (en) * | 1983-10-28 | 1990-02-13 | Data General Corporation | Data processing system having unique multilevel microcode architecture |
| JPH0738175B2 (ja) * | 1987-10-20 | 1995-04-26 | 富士通株式会社 | 仮想記憶装置のデータ保護検査方法 |
| US5278973A (en) * | 1989-03-27 | 1994-01-11 | Unisys Corporation | Dual operating system computer |
| US5132927A (en) * | 1990-10-09 | 1992-07-21 | Tandem Computers Incorporated | System for cache space allocation using selective addressing |
| WO1993006549A1 (en) * | 1991-09-19 | 1993-04-01 | Chips And Technologies, Inc. | A system for performing input and output operations to and from a processor |
| US5905997A (en) | 1994-04-29 | 1999-05-18 | Amd Inc. | Set-associative cache memory utilizing a single bank of physical memory |
| US5826052A (en) * | 1994-04-29 | 1998-10-20 | Advanced Micro Devices, Inc. | Method and apparatus for concurrent access to multiple physical caches |
| JP3177117B2 (ja) * | 1994-05-11 | 2001-06-18 | インターナショナル・ビジネス・マシーンズ・コーポレ−ション | 複数のノード内の制御コードを更新する方法および装置 |
| JPH07311752A (ja) * | 1994-05-11 | 1995-11-28 | Internatl Business Mach Corp <Ibm> | 分散データ処理システム及び初期プログラムロード方法 |
| US5926642A (en) | 1995-10-06 | 1999-07-20 | Advanced Micro Devices, Inc. | RISC86 instruction set |
| US5864689A (en) * | 1995-12-05 | 1999-01-26 | Advanced Micro Devices, Inc. | Microprocessor configured to selectively invoke a microcode DSP function or a program subroutine in response to a target address value of branch instruction |
| US5950012A (en) * | 1996-03-08 | 1999-09-07 | Texas Instruments Incorporated | Single chip microprocessor circuits, systems, and methods for self-loading patch micro-operation codes and patch microinstruction codes |
| US5796972A (en) * | 1997-01-14 | 1998-08-18 | Unisys Corporation | Method and apparatus for performing microcode paging during instruction execution in an instruction processor |
| US6141740A (en) * | 1997-03-03 | 2000-10-31 | Advanced Micro Devices, Inc. | Apparatus and method for microcode patching for generating a next address |
| US5889978A (en) * | 1997-04-18 | 1999-03-30 | Intel Corporation | Emulation of interrupt control mechanism in a multiprocessor system |
| AU7575398A (en) | 1998-05-15 | 1999-12-06 | Richard Rubinstein | Shared, reconfigurable cache memory execution subsystem |
| JP2000194602A (ja) * | 1998-12-28 | 2000-07-14 | Nec Corp | 情報処理装置、マイクロプロセッサ及び外部キャッシュメモリの制御方法 |
| US6745306B1 (en) * | 1999-07-29 | 2004-06-01 | Microsoft Corporation | Method and system for restricting the load of physical address translations of virtual addresses |
| US6457100B1 (en) * | 1999-09-15 | 2002-09-24 | International Business Machines Corporation | Scaleable shared-memory multi-processor computer system having repetitive chip structure with efficient busing and coherence controls |
| US6397301B1 (en) * | 1999-12-29 | 2002-05-28 | Intel Corporation | Preventing access to secure area of a cache |
| US6643800B1 (en) * | 2000-02-02 | 2003-11-04 | Hewlett-Packard Development Company, L.P. | Method and apparatus for testing microarchitectural features by using tests written in microcode |
| US6804772B2 (en) * | 2000-06-12 | 2004-10-12 | Broadcom Corporation | Dynamic field patchable microarchitecture |
| EP1182570A3 (en) * | 2000-08-21 | 2004-08-04 | Texas Instruments Incorporated | TLB with resource ID field |
| US6754765B1 (en) * | 2001-05-14 | 2004-06-22 | Integrated Memory Logic, Inc. | Flash memory controller with updateable microcode |
| US7346757B2 (en) * | 2002-10-08 | 2008-03-18 | Rmi Corporation | Advanced processor translation lookaside buffer management in a multithreaded system |
| US7797492B2 (en) * | 2004-02-20 | 2010-09-14 | Anoop Mukker | Method and apparatus for dedicating cache entries to certain streams for performance optimization |
| US7370243B1 (en) * | 2004-06-30 | 2008-05-06 | Sun Microsystems, Inc. | Precise error handling in a fine grain multithreaded multicore processor |
| US7437581B2 (en) * | 2004-09-28 | 2008-10-14 | Intel Corporation | Method and apparatus for varying energy per instruction according to the amount of available parallelism |
| JP2006209527A (ja) * | 2005-01-28 | 2006-08-10 | Nokia Corp | コンピュータシステム |
| US7095342B1 (en) * | 2005-03-31 | 2006-08-22 | Intel Corporation | Compressing microcode |
| US7827390B2 (en) * | 2007-04-10 | 2010-11-02 | Via Technologies, Inc. | Microprocessor with private microcode RAM |
| US7681020B2 (en) * | 2007-04-18 | 2010-03-16 | International Business Machines Corporation | Context switching and synchronization |
-
2007
- 2007-05-29 US US11/754,589 patent/US7734873B2/en active Active
-
2008
- 2008-05-28 DE DE112008001473.6T patent/DE112008001473B4/de active Active
- 2008-05-28 KR KR1020097026820A patent/KR101503865B1/ko not_active Expired - Fee Related
- 2008-05-28 CN CN200880018278.4A patent/CN101707881B/zh active Active
- 2008-05-28 GB GB0920954.5A patent/GB2462556B/en active Active
- 2008-05-28 TW TW097119629A patent/TWI457826B/zh active
- 2008-05-28 WO PCT/US2008/006746 patent/WO2008153799A1/en not_active Ceased
- 2008-05-28 JP JP2010510322A patent/JP5496085B2/ja active Active
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