JP2010258577A - 補間型ａ／ｄ変換器 - Google Patents

補間型ａ／ｄ変換器 Download PDF

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Publication number
JP2010258577A
JP2010258577A JP2009103982A JP2009103982A JP2010258577A JP 2010258577 A JP2010258577 A JP 2010258577A JP 2009103982 A JP2009103982 A JP 2009103982A JP 2009103982 A JP2009103982 A JP 2009103982A JP 2010258577 A JP2010258577 A JP 2010258577A
Authority
JP
Japan
Prior art keywords
interpolation
signal
preamplifier
amplifier
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2009103982A
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English (en)
Japanese (ja)
Other versions
JP2010258577A5 (enExample
Inventor
Yuji Nakajima
雄二 中島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2009103982A priority Critical patent/JP2010258577A/ja
Priority to US12/763,439 priority patent/US8130131B2/en
Publication of JP2010258577A publication Critical patent/JP2010258577A/ja
Publication of JP2010258577A5 publication Critical patent/JP2010258577A5/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/002—Provisions or arrangements for saving power, e.g. by allowing a sleep mode, using lower supply voltage for downstream stages, using multiple clock domains or by selectively turning on stages when needed
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/20—Increasing resolution using an n bit system to obtain n + m bits
    • H03M1/202—Increasing resolution using an n bit system to obtain n + m bits by interpolation
    • H03M1/203—Increasing resolution using an n bit system to obtain n + m bits by interpolation using an analogue interpolation circuit
    • H03M1/204—Increasing resolution using an n bit system to obtain n + m bits by interpolation using an analogue interpolation circuit in which one or more virtual intermediate reference signals are generated between adjacent original reference signals, e.g. by connecting pre-amplifier outputs to multiple comparators
    • H03M1/205—Increasing resolution using an n bit system to obtain n + m bits by interpolation using an analogue interpolation circuit in which one or more virtual intermediate reference signals are generated between adjacent original reference signals, e.g. by connecting pre-amplifier outputs to multiple comparators using resistor strings for redistribution of the original reference signals or signals derived therefrom
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
    • H03M1/361—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type
    • H03M1/362—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type the reference values being generated by a resistive voltage divider
    • H03M1/365—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type the reference values being generated by a resistive voltage divider the voltage divider being a single resistor string

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Amplifiers (AREA)
  • Analogue/Digital Conversion (AREA)
JP2009103982A 2009-04-22 2009-04-22 補間型ａ／ｄ変換器 Pending JP2010258577A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009103982A JP2010258577A (ja) 2009-04-22 2009-04-22 補間型ａ／ｄ変換器
US12/763,439 US8130131B2 (en) 2009-04-22 2010-04-20 Interpolating A/D converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009103982A JP2010258577A (ja) 2009-04-22 2009-04-22 補間型ａ／ｄ変換器

Publications (2)

Publication Number Publication Date
JP2010258577A true JP2010258577A (ja) 2010-11-11
JP2010258577A5 JP2010258577A5 (enExample) 2012-04-26

Family

ID=42991674

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009103982A Pending JP2010258577A (ja) 2009-04-22 2009-04-22 補間型ａ／ｄ変換器

Country Status (2)

Country Link
US (1) US8130131B2 (enExample)
JP (1) JP2010258577A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012067264A1 (en) 2010-11-19 2012-05-24 Sumitomo Chemical Company, Limited Process for producing olefin oxide
JP2021509243A (ja) * 2017-12-29 2021-03-18 日本テキサス・インスツルメンツ合同会社 遅延ベースのコンパレータ

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5681652B2 (ja) * 2012-02-07 2015-03-11 株式会社東芝 信号補間装置および並列型ａ／ｄ変換装置
US9467160B2 (en) * 2014-11-11 2016-10-11 Mediatek Inc. Flash ADC with interpolators
US9276597B1 (en) * 2015-02-10 2016-03-01 Mediatek Inc. Circuit and method for calibration of analog-to-digital converter
US10116319B2 (en) * 2017-03-03 2018-10-30 Texas Instruments Incorporated Resistive interpolation for an amplifier array
CN108667447A (zh) * 2018-04-13 2018-10-16 上海华力集成电路制造有限公司 锁存器电路
US11664814B2 (en) 2021-08-30 2023-05-30 Analog Devices International Unlimited Company Voltage interpolator

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07506705A (ja) * 1992-03-16 1995-07-20 財団法人　工業技術研究院 平均化フラッシュ・アナログ−デジタル・コンバータ
JP2009021667A (ja) * 2007-07-10 2009-01-29 Sony Corp フラッシュ型ａｄ変換器

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6411246B2 (en) * 1999-12-22 2002-06-25 Texas Instruments Incorporated Folding circuit and A/D converter
JP3920236B2 (ja) * 2003-03-27 2007-05-30 Ｎｅｃエレクトロニクス株式会社 差動増幅器
WO2007072588A1 (ja) * 2005-12-20 2007-06-28 Matsushita Electric Industrial Co., Ltd. 比較器及びａ／ｄ変換器
JP4702066B2 (ja) * 2006-01-13 2011-06-15 ソニー株式会社 アナログ／デジタル変換回路
US20100277357A1 (en) * 2007-12-12 2010-11-04 Young-Joon Ko Analog-to-digital converter
JP2010213042A (ja) * 2009-03-11 2010-09-24 Renesas Electronics Corp 増幅回路及びアナログ／デジタル変換回路

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07506705A (ja) * 1992-03-16 1995-07-20 財団法人　工業技術研究院 平均化フラッシュ・アナログ−デジタル・コンバータ
JP2009021667A (ja) * 2007-07-10 2009-01-29 Sony Corp フラッシュ型ａｄ変換器

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012067264A1 (en) 2010-11-19 2012-05-24 Sumitomo Chemical Company, Limited Process for producing olefin oxide
JP2021509243A (ja) * 2017-12-29 2021-03-18 日本テキサス・インスツルメンツ合同会社 遅延ベースのコンパレータ
JP7673338B2 (ja) 2017-12-29 2025-05-09 テキサス インスツルメンツ インコーポレイテッド 遅延ベースのコンパレータ

Also Published As

Publication number Publication date
US20100271249A1 (en) 2010-10-28
US8130131B2 (en) 2012-03-06

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