|
US4639688A
(en)
|
1985-04-18 |
1987-01-27 |
The United States Of America As Represented By The Secretary Of The Air Force |
Wide-band phase locked loop amplifier apparatus
|
|
EP0236525B1
(de)
*
|
1986-03-12 |
1990-12-19 |
Deutsche ITT Industries GmbH |
Integrierte Isolierschicht-Feldeffekttransistor-Verzögerungsleitung für Digitalsignale
|
|
JPS6369315A
(ja)
*
|
1986-09-11 |
1988-03-29 |
Sony Corp |
Cmos回路を用いた可変遅延装置
|
|
US4847870A
(en)
|
1987-11-25 |
1989-07-11 |
Siemens Transmission Systems, Inc. |
High resolution digital phase-lock loop circuit
|
|
US4845388A
(en)
|
1988-01-20 |
1989-07-04 |
Martin Marietta Corporation |
TTL-CMOS input buffer
|
|
US5101117A
(en)
*
|
1988-02-17 |
1992-03-31 |
Mips Computer Systems |
Variable delay line phase-locked loop circuit synchronization system
|
|
US5021684A
(en)
|
1989-11-09 |
1991-06-04 |
Intel Corporation |
Process, supply, temperature compensating CMOS output buffer
|
|
US5192886A
(en)
|
1990-03-15 |
1993-03-09 |
Hewlett-Packard Company |
Sub-nanosecond calibrated delay line structure
|
|
JP3091502B2
(ja)
*
|
1990-03-15 |
2000-09-25 |
ヒューレット・パッカード・カンパニー |
サブナノ秒較正遅延線構造
|
|
JP3561792B2
(ja)
*
|
1995-09-06 |
2004-09-02 |
株式会社ルネサステクノロジ |
クロック発生回路
|
|
US5666322A
(en)
|
1995-09-21 |
1997-09-09 |
Nec Electronics, Inc. |
Phase-locked loop timing controller in an integrated circuit memory
|
|
DE69839112T2
(de)
*
|
1997-12-19 |
2008-05-21 |
Matsushita Electric Industrial Co., Ltd., Kadoma |
Kammfilter und Steuerverfahren dazu
|
|
US5963071A
(en)
|
1998-01-22 |
1999-10-05 |
Nanoamp Solutions, Inc. |
Frequency doubler with adjustable duty cycle
|
|
US6091271A
(en)
*
|
1998-06-30 |
2000-07-18 |
Lucent Technologies, Inc. |
Frequency doubling method and apparatus
|
|
US6288587B1
(en)
|
1999-04-07 |
2001-09-11 |
National Science Council Of Republic Of China |
CMOS pulse shrinking delay element with deep subnanosecond resolution
|
|
US6316987B1
(en)
|
1999-10-22 |
2001-11-13 |
Velio Communications, Inc. |
Low-power low-jitter variable delay timing circuit
|
|
US6377103B1
(en)
|
2000-06-28 |
2002-04-23 |
Intel Corporation |
Symmetric, voltage-controlled CMOS delay cell with closed-loop replica bias
|
|
US6535735B2
(en)
*
|
2001-03-22 |
2003-03-18 |
Skyworks Solutions, Inc. |
Critical path adaptive power control
|
|
US6581017B2
(en)
|
2001-06-28 |
2003-06-17 |
Intel Corporation |
System and method for minimizing delay variation in double data rate strobes
|
|
US6918048B2
(en)
|
2001-06-28 |
2005-07-12 |
Intel Corporation |
System and method for delaying a strobe signal based on a slave delay base and a master delay adjustment
|
|
CN1393992A
(zh)
*
|
2001-07-02 |
2003-01-29 |
朗迅科技公司 |
包含反馈回路的延迟补偿电路
|
|
US6747500B2
(en)
|
2001-10-19 |
2004-06-08 |
Mitutoyo Corporation |
Compact delay circuit for CMOS integrated circuits used in low voltage low power devices
|
|
US6741522B1
(en)
|
2001-11-27 |
2004-05-25 |
Lsi Logic Corporation |
Methods and structure for using a higher frequency clock to shorten a master delay line
|
|
US7015740B1
(en)
|
2002-10-28 |
2006-03-21 |
Cisco Technology, Inc. |
Self-adjusting programmable on-chip clock aligner
|
|
US6801028B2
(en)
*
|
2002-11-14 |
2004-10-05 |
Fyre Storm, Inc. |
Phase locked looped based digital pulse converter
|
|
US6853231B2
(en)
*
|
2003-03-31 |
2005-02-08 |
Mosaid Technologies Incorporated |
Timing vernier using a delay locked loop
|
|
WO2004102216A2
(en)
|
2003-05-07 |
2004-11-25 |
Credence Systems Corporation |
Test systems and methods
|
|
US6940768B2
(en)
|
2003-11-04 |
2005-09-06 |
Agere Systems Inc. |
Programmable data strobe offset with DLL for double data rate (DDR) RAM memory
|
|
EP1696564A1
(en)
*
|
2003-11-20 |
2006-08-30 |
Advantest Corporation |
Variable delay circuit
|
|
US7178048B2
(en)
|
2003-12-23 |
2007-02-13 |
Hewlett-Packard Development Company, L.P. |
System and method for signal synchronization based on plural clock signals
|
|
JP2006039830A
(ja)
|
2004-07-26 |
2006-02-09 |
Renesas Technology Corp |
半導体集積回路
|
|
US7129763B1
(en)
*
|
2004-11-08 |
2006-10-31 |
Western Digital Technologies, Inc. |
Adjusting power consumption of digital circuitry by generating frequency error representing error in propagation delay
|
|
US7634039B2
(en)
*
|
2005-02-04 |
2009-12-15 |
True Circuits, Inc. |
Delay-locked loop with dynamically biased charge pump
|
|
US7123103B1
(en)
*
|
2005-03-31 |
2006-10-17 |
Conexant Systems, Inc. |
Systems and method for automatic quadrature phase imbalance compensation using a delay locked loop
|
|
US7388419B2
(en)
|
2005-07-22 |
2008-06-17 |
Freescale Semiconductor, Inc |
PVT variation detection and compensation circuit
|
|
US7222036B1
(en)
|
2006-03-31 |
2007-05-22 |
Altera Corporation |
Method for providing PVT compensation
|
|
KR100776903B1
(ko)
*
|
2006-04-24 |
2007-11-19 |
주식회사 하이닉스반도체 |
지연 고정 루프
|
|
US7433262B2
(en)
|
2006-08-22 |
2008-10-07 |
Atmel Corporation |
Circuits to delay a signal from DDR-SDRAM memory device including an automatic phase error correction
|
|
JP2008078995A
(ja)
*
|
2006-09-21 |
2008-04-03 |
Nec Electronics Corp |
移相回路
|
|
JP4892402B2
(ja)
*
|
2007-04-25 |
2012-03-07 |
ルネサスエレクトロニクス株式会社 |
半導体集積回路装置
|
|
JP2009017151A
(ja)
*
|
2007-07-04 |
2009-01-22 |
Yokogawa Electric Corp |
遅延回路およびそれを用いた信号発生回路
|
|
JP5451012B2
(ja)
*
|
2008-09-04 |
2014-03-26 |
ピーエスフォー ルクスコ エスエイアールエル |
Dll回路及びその制御方法
|
|
KR100985413B1
(ko)
*
|
2008-10-14 |
2010-10-06 |
주식회사 하이닉스반도체 |
지연회로 및 그를 포함하는 지연고정루프회로
|