JP2010245396A5 - - Google Patents

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Publication number
JP2010245396A5
JP2010245396A5 JP2009094164A JP2009094164A JP2010245396A5 JP 2010245396 A5 JP2010245396 A5 JP 2010245396A5 JP 2009094164 A JP2009094164 A JP 2009094164A JP 2009094164 A JP2009094164 A JP 2009094164A JP 2010245396 A5 JP2010245396 A5 JP 2010245396A5
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JP
Japan
Prior art keywords
wafers
mounting table
wafer
container
bonding
Prior art date
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Application number
JP2009094164A
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English (en)
Japanese (ja)
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JP2010245396A (ja
JP5668275B2 (ja
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Priority to JP2009094164A priority Critical patent/JP5668275B2/ja
Priority claimed from JP2009094164A external-priority patent/JP5668275B2/ja
Publication of JP2010245396A publication Critical patent/JP2010245396A/ja
Publication of JP2010245396A5 publication Critical patent/JP2010245396A5/ja
Application granted granted Critical
Publication of JP5668275B2 publication Critical patent/JP5668275B2/ja
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JP2009094164A 2009-04-08 2009-04-08 Ｓｏｉウェーハの製造方法及び貼り合わせ装置 Active JP5668275B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009094164A JP5668275B2 (ja) 2009-04-08 2009-04-08 Ｓｏｉウェーハの製造方法及び貼り合わせ装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009094164A JP5668275B2 (ja) 2009-04-08 2009-04-08 Ｓｏｉウェーハの製造方法及び貼り合わせ装置

Publications (3)

Publication Number Publication Date
JP2010245396A JP2010245396A (ja) 2010-10-28
JP2010245396A5 true JP2010245396A5 (enrdf_load_stackoverflow) 2012-02-16
JP5668275B2 JP5668275B2 (ja) 2015-02-12

Family

ID=43098058

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009094164A Active JP5668275B2 (ja) 2009-04-08 2009-04-08 Ｓｏｉウェーハの製造方法及び貼り合わせ装置

Country Status (1)

Country Link
JP (1) JP5668275B2 (enrdf_load_stackoverflow)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2963848B1 (fr) * 2010-08-11 2012-08-31 Soitec Silicon On Insulator Procede de collage par adhesion moleculaire a basse pression
JP2012151407A (ja) * 2011-01-21 2012-08-09 Ushio Inc ワークステージおよびこのワークステージを使った露光装置
JP2012175043A (ja) * 2011-02-24 2012-09-10 Tokyo Electron Ltd 接合装置、接合システム、接合方法、プログラム及びコンピュータ記憶媒体
JP5352609B2 (ja) * 2011-03-04 2013-11-27 東京エレクトロン株式会社 接合方法、プログラム、コンピュータ記憶媒体、接合装置及び接合システム
AT511384B1 (de) * 2011-05-11 2019-10-15 Thallner Erich Verfahren und vorrichtung zum bonden zweier wafer
JP6727048B2 (ja) * 2016-07-12 2020-07-22 東京エレクトロン株式会社 基板搬送装置および接合システム
JP7243649B2 (ja) * 2020-02-07 2023-03-22 株式会社Sumco Ｓｏｉウェーハの貼合わせ方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5012971A (enrdf_load_stackoverflow) * 1973-06-04 1975-02-10
JPS5850410B2 (ja) * 1976-05-29 1983-11-10 株式会社東芝 半導体気相成長用サセプタ
JPS5742174Y2 (enrdf_load_stackoverflow) * 1978-07-28 1982-09-17
JPH07226350A (ja) * 1994-02-10 1995-08-22 Sony Corp ウエハ貼り合わせ装置及びその方法
JP2000164588A (ja) * 1998-11-30 2000-06-16 Ebara Corp 基板加熱方法及び装置
JP2000216365A (ja) * 1999-01-21 2000-08-04 Denso Corp 半導体基板貼り合わせ方法とその装置
JP2004052098A (ja) * 2002-05-31 2004-02-19 Tokyo Electron Ltd 基板処理装置およびそれに用いるサセプタ
JP2004221447A (ja) * 2003-01-17 2004-08-05 Toshiba Ceramics Co Ltd 貼り合わせ基板の製造装置及びこの装置を用いた貼り合わせ基板の製造方法

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