JP2010206056A - 半導体集積回路装置の製造方法 - Google Patents

半導体集積回路装置の製造方法 Download PDF

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Publication number
JP2010206056A
JP2010206056A JP2009051666A JP2009051666A JP2010206056A JP 2010206056 A JP2010206056 A JP 2010206056A JP 2009051666 A JP2009051666 A JP 2009051666A JP 2009051666 A JP2009051666 A JP 2009051666A JP 2010206056 A JP2010206056 A JP 2010206056A
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JP
Japan
Prior art keywords
wafer
integrated circuit
semiconductor integrated
circuit device
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2009051666A
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English (en)
Japanese (ja)
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JP2010206056A5 (https=
Inventor
Takanori Ochi
啓典 越智
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2009051666A priority Critical patent/JP2010206056A/ja
Priority to US12/714,487 priority patent/US20100227461A1/en
Publication of JP2010206056A publication Critical patent/JP2010206056A/ja
Publication of JP2010206056A5 publication Critical patent/JP2010206056A5/ja
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/796—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions having memorised stress for introducing strain in the channel regions, e.g. recrystallised polysilicon gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/20—Cleaning during device manufacture
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/50—Cleaning of wafers, substrates or parts of devices characterised by the part to be cleaned
    • H10P70/56—Cleaning of wafer backside
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 

Landscapes

  • Cleaning Or Drying Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2009051666A 2009-03-05 2009-03-05 半導体集積回路装置の製造方法 Withdrawn JP2010206056A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009051666A JP2010206056A (ja) 2009-03-05 2009-03-05 半導体集積回路装置の製造方法
US12/714,487 US20100227461A1 (en) 2009-03-05 2010-02-27 Method for the fabrication of semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009051666A JP2010206056A (ja) 2009-03-05 2009-03-05 半導体集積回路装置の製造方法

Publications (2)

Publication Number Publication Date
JP2010206056A true JP2010206056A (ja) 2010-09-16
JP2010206056A5 JP2010206056A5 (https=) 2012-03-29

Family

ID=42678637

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009051666A Withdrawn JP2010206056A (ja) 2009-03-05 2009-03-05 半導体集積回路装置の製造方法

Country Status (2)

Country Link
US (1) US20100227461A1 (https=)
JP (1) JP2010206056A (https=)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015109335A (ja) * 2013-12-04 2015-06-11 株式会社Ｓｃｒｅｅｎホールディングス 基板処理装置および基板処理方法
JP2017003824A (ja) * 2015-06-11 2017-01-05 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US9741554B2 (en) 2015-12-11 2017-08-22 Toyota Jidosha Kabushiki Kaisha Method of manufacturing semiconductor device
US10332795B2 (en) 2015-06-11 2019-06-25 Renesas Electronics Corporation Manufacturing method of semiconductor device
US10464107B2 (en) 2013-10-24 2019-11-05 SCREEN Holdings Co., Ltd. Substrate processing method and substrate processing apparatus
WO2024185646A1 (ja) * 2023-03-06 2024-09-12 東京エレクトロン株式会社 基板処理方法

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120091100A1 (en) 2010-10-14 2012-04-19 S.O.I.Tec Silicon On Insulator Technologies Etchant for controlled etching of ge and ge-rich silicon germanium alloys
US8765582B2 (en) * 2012-09-04 2014-07-01 Taiwan Semiconductor Manufacturing Company, Ltd. Method for extreme ultraviolet electrostatic chuck with reduced clamp effect
KR102133490B1 (ko) * 2013-11-11 2020-07-13 에스케이하이닉스 주식회사 트랜지스터, 트랜지스터의 제조 방법 및 트랜지스터를 포함하는 전자장치
JP6676365B2 (ja) 2015-12-21 2020-04-08 キヤノン株式会社 撮像装置の製造方法
US9741572B1 (en) * 2016-02-22 2017-08-22 United Microelectronics Corp. Method of forming oxide layer
US10658296B2 (en) * 2016-09-30 2020-05-19 Taiwan Semiconductor Manufacturing Co., Ltd. Dielectric film for semiconductor fabrication
CN108231654B (zh) * 2018-01-12 2020-09-18 上海华虹宏力半导体制造有限公司 对形成有mos结构的基底的静电吸附的方法
US11209736B2 (en) * 2018-10-25 2021-12-28 Taiwan Semiconductor Manufacturing Company Ltd. Method for cleaning substrate, method for manufacturing photomask and method for cleaning photomask
JP2022041052A (ja) * 2020-08-31 2022-03-11 キオクシア株式会社 半導体装置およびその製造方法
CN113506720B (zh) * 2021-06-21 2024-04-26 上海华力集成电路制造有限公司 一种晶圆背面平整度改善的方法
CN113506727A (zh) * 2021-06-29 2021-10-15 上海华力微电子有限公司 一种改善自对准双重曝光工艺侧墙倾斜的制作方法及装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3395696B2 (ja) * 1999-03-15 2003-04-14 日本電気株式会社 ウェハ処理装置およびウェハ処理方法
TW490756B (en) * 1999-08-31 2002-06-11 Hitachi Ltd Method for mass production of semiconductor integrated circuit device and manufacturing method of electronic components
JP3307375B2 (ja) * 1999-10-04 2002-07-24 日本電気株式会社 半導体装置の製造方法
US6568161B1 (en) * 2001-11-15 2003-05-27 New Holland North America, Inc. User interface for a harvesting machine

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10464107B2 (en) 2013-10-24 2019-11-05 SCREEN Holdings Co., Ltd. Substrate processing method and substrate processing apparatus
JP2015109335A (ja) * 2013-12-04 2015-06-11 株式会社Ｓｃｒｅｅｎホールディングス 基板処理装置および基板処理方法
JP2017003824A (ja) * 2015-06-11 2017-01-05 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US10332795B2 (en) 2015-06-11 2019-06-25 Renesas Electronics Corporation Manufacturing method of semiconductor device
US9741554B2 (en) 2015-12-11 2017-08-22 Toyota Jidosha Kabushiki Kaisha Method of manufacturing semiconductor device
WO2024185646A1 (ja) * 2023-03-06 2024-09-12 東京エレクトロン株式会社 基板処理方法

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US20100227461A1 (en) 2010-09-09

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