JP2010147051A5 - - Google Patents

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Publication number
JP2010147051A5
JP2010147051A5 JP2008319355A JP2008319355A JP2010147051A5 JP 2010147051 A5 JP2010147051 A5 JP 2010147051A5 JP 2008319355 A JP2008319355 A JP 2008319355A JP 2008319355 A JP2008319355 A JP 2008319355A JP 2010147051 A5 JP2010147051 A5 JP 2010147051A5
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JP
Japan
Prior art keywords
metal layer
resist film
forming
opening
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008319355A
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English (en)
Japanese (ja)
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JP2010147051A (ja
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Publication date
Application filed filed Critical
Priority to JP2008319355A priority Critical patent/JP2010147051A/ja
Priority claimed from JP2008319355A external-priority patent/JP2010147051A/ja
Publication of JP2010147051A publication Critical patent/JP2010147051A/ja
Publication of JP2010147051A5 publication Critical patent/JP2010147051A5/ja
Pending legal-status Critical Current

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JP2008319355A 2008-12-16 2008-12-16 半導体集積回路装置および半導体集積回路装置の製造方法 Pending JP2010147051A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008319355A JP2010147051A (ja) 2008-12-16 2008-12-16 半導体集積回路装置および半導体集積回路装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008319355A JP2010147051A (ja) 2008-12-16 2008-12-16 半導体集積回路装置および半導体集積回路装置の製造方法

Publications (2)

Publication Number Publication Date
JP2010147051A JP2010147051A (ja) 2010-07-01
JP2010147051A5 true JP2010147051A5 (enExample) 2012-01-26

Family

ID=42567200

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008319355A Pending JP2010147051A (ja) 2008-12-16 2008-12-16 半導体集積回路装置および半導体集積回路装置の製造方法

Country Status (1)

Country Link
JP (1) JP2010147051A (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150171039A1 (en) * 2013-12-13 2015-06-18 Chipmos Technologies Inc. Redistribution layer alloy structure and manufacturing method thereof
JP6522980B2 (ja) * 2015-02-18 2019-05-29 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003152014A (ja) * 2001-11-09 2003-05-23 Shinko Electric Ind Co Ltd 半導体装置の製造方法及び半導体装置
JP5388422B2 (ja) * 2007-05-11 2014-01-15 スパンション エルエルシー 半導体装置及びその製造方法

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