JP2010123632A5 - - Google Patents
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- JP2010123632A5 JP2010123632A5 JP2008293793A JP2008293793A JP2010123632A5 JP 2010123632 A5 JP2010123632 A5 JP 2010123632A5 JP 2008293793 A JP2008293793 A JP 2008293793A JP 2008293793 A JP2008293793 A JP 2008293793A JP 2010123632 A5 JP2010123632 A5 JP 2010123632A5
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Description
また、このような多層構造の配線基板に、高密度化及び高機能化に対応すべく半導体素子等の電子部品を内蔵させたものがある。その一例として、下記の特許文献1に記載された多層プリント配線板の製造方法がある。また、特許文献2に記載された半導体チップ内蔵基板の製造方法、特許文献3に記載されたセラミック基板の製造方法がある。
上記の従来技術の課題を解決するため、本発明の一形態によれば、一方の面に突起状端子が形成された電子部品と、両面に導体部分が露出し、かつ該導体部分が基板内部を通して電気的に接続された形態を有する基板とを用意し、前記電子部品をフェイスアップの態様で前記基板の一方の面に搭載してなる構造体を作製する工程と、前記突起状端子の径よりも大きい開口部が形成された熱硬化性の樹脂シートを用意し、前記構造体の突起状端子と前記樹脂シートの開口部とを位置合わせして、該樹脂シートを前記構造体上に重ね合わせる工程と、重ね合わされた前記構造体及び前記樹脂シートを、加熱・加圧して、前記突起状端子の端面が前記樹脂シートの熱硬化後の樹脂層の表面に露出するように積層して一体化する工程と、前記熱硬化後の樹脂層に、該樹脂層を貫通して前記基板上の一方の面側の導体部分に達するビアホールを形成する工程と、前記ビアホールを導体で充填し、該導体に接続される配線層を形成する工程とを含むことを特徴とする電子部品内蔵配線基板の製造方法が提供される。 In order to solve the above-described problems of the prior art, according to one aspect of the present invention , an electronic component having a protruding terminal formed on one surface, a conductor portion exposed on both surfaces, and the conductor portion inside the substrate Preparing a substrate having a form electrically connected through, and manufacturing a structure in which the electronic component is mounted on one surface of the substrate in a face-up manner, and the diameter of the protruding terminal A thermosetting resin sheet having a larger opening is prepared, the protruding terminals of the structure are aligned with the openings of the resin sheet, and the resin sheet is stacked on the structure. a step of bringing, the structure and the resin sheet superposed, pressurized heat-pressurized, the end face of the projecting terminal is stacked so as to be exposed on the surface of the resin layer after thermal curing of the resin sheet a step of integrating, after the thermosetting Forming a via hole penetrating the resin layer and reaching a conductor portion on one surface side of the substrate; and filling the via hole with a conductor to form a wiring layer connected to the conductor method of manufacturing an electronic component built-in wiring board which comprises a step is provided.
本発明の一形態に係る電子部品内蔵配線基板の製造方法によれば、あらかじめ突起状端子が形成された電子部品を所定の基板の一方の面に搭載してなる構造体と、突起状端子の径よりも大きい開口部が形成された熱硬化性の樹脂シートとを用意しておき、突起状端子と開口部とを位置合わせして、当該構造体上に樹脂シートを重ね合わせ、重ね合わされた当該構造体及び樹脂シートを加熱・加圧して、突起状端子の端面が熱硬化後の樹脂層の表面に露出するように積層して一体化している。 According to the method for manufacturing a wiring board with a built-in electronic component according to an aspect of the present invention , a structure in which an electronic component on which a protruding terminal is formed in advance is mounted on one surface of a predetermined substrate , and a protruding terminal A thermosetting resin sheet having an opening larger than the diameter was prepared, the protruding terminals and the opening were aligned, and the resin sheet was overlaid on the structure . the structure and the resin sheet pressurized heat and pressure, the end face of the projecting terminal is integrally laminated so as to be exposed on the surface of the resin layer after thermal curing.
次に、図6(b)に示す構成例では、複数枚(図示の例では2枚)の樹脂シート42,43を重ね合わせたものを使用している。このうち、基板30上に直接重ね合わされる樹脂シート42(第1の樹脂シート)は、チップ20の厚さと同じ厚さを有しており、この樹脂シート42上に積層される樹脂シート43(第2の樹脂シート)は、チップ20上のポスト24の高さと同じ厚さを有している。そして、下側の樹脂シート42には、図示のようにチップ20上の複数のポスト24を含む領域に対応させて1つの開口部を設けている。また、上側の樹脂シート43には、図示のようにチップ20上の各ポスト24の位置にそれぞれ対応させて複数の開口部OP2を設けている。このため、この多層構造の樹脂シート42,43をポスト付チップ搭載基板(基板30、チップ20、ポスト24)に重ね合わせると、図示のようにチップ20上のポスト24間の領域に搭載される樹脂材(樹脂シート43の一部)の高さは、他の部分の高さと同じになる。つまり、上述した実施形態(図2(c))の場合と比べて、チップ20上のポスト24間の領域に搭載される樹脂材の量を少なくすることができる。これによって、ホットプレス処理の際に溶融した樹脂がポスト24間の領域上を流動しても、その樹脂量が少ないために、ポスト24上への樹脂の付着を回避することが可能となる。 Next, in the configuration example shown in FIG. 6B, a plurality of (two in the illustrated example) resin sheets 42 and 43 are used. Among these, the resin sheet 42 (first resin sheet) directly superimposed on the substrate 30 has the same thickness as the chip 20, and the resin sheet 43 ( stacked on the resin sheet 42 ). The second resin sheet) has the same thickness as the post 24 on the chip 20. The lower resin sheet 42 is provided with one opening corresponding to the region including the plurality of posts 24 on the chip 20 as shown in the figure. The upper resin sheet 43 is provided with a plurality of openings OP2 corresponding to the positions of the posts 24 on the chip 20 as shown in the figure. For this reason, when the multilayered resin sheets 42 and 43 are superimposed on a post-mounted chip mounting substrate (substrate 30, chip 20 and post 24), they are mounted in a region between the posts 24 on the chip 20 as shown in the figure. The height of the resin material (a part of the resin sheet 43) is the same as the height of the other parts. That is, the amount of the resin material mounted in the region between the posts 24 on the chip 20 can be reduced as compared with the case of the above-described embodiment (FIG. 2C). As a result, even if the resin melted during the hot pressing process flows over the region between the posts 24, the amount of the resin is small, so that it is possible to avoid adhesion of the resin onto the posts 24.
次に、図6(c)に示す構成例では、上述した図6(b)の構成例と同様に、複数枚(図示の例では2枚)の樹脂シート44,45を重ね合わせたものを使用し、下側の樹脂シート44(第1の樹脂シート)は、チップ20の厚さと同じ厚さを有し、上側の樹脂シート45(第2の樹脂シート)は、チップ20上のポスト24の高さと同じ厚さを有している。そして、下側の樹脂シート44には、図示のようにチップ20上の複数のポスト24を含む領域に対応させて1つの開口部を設けている。また、上側の樹脂シート45には、図示のようにチップ20上の各ポスト24の位置にそれぞれ対応させて複数の開口部OP3を設けているが、各開口部OP3の側面は、上方に向かって開口部が徐々に広がるテーパ状に成形されている。このため、この多層構造の樹脂シート44,45をポスト付チップ搭載基板(基板30、チップ20、ポスト24)に重ね合わせると、図示のようにチップ20上のポスト24間の領域には、そのテーパ面の形状に応じたスペースが確保される。これによって、ホットプレス処理の際に溶融した樹脂がポスト24間の領域上を流動しても、その「スペース」部分に樹脂を収容することができ、ポスト24上への樹脂の付着を回避することが可能となる。 Then, in the configuration example shown in FIG. 6 (c), similarly to the configuration example of FIG. 6 described above (b), the one (in the illustrated example of two) plural superposed resin sheets 44 and 45 The lower resin sheet 44 (first resin sheet) has the same thickness as the chip 20, and the upper resin sheet 45 (second resin sheet) is the post 24 on the chip 20. It has the same thickness as the height. The lower resin sheet 44 is provided with one opening corresponding to the region including the plurality of posts 24 on the chip 20 as shown in the figure. The upper resin sheet 45 is provided with a plurality of openings OP3 corresponding to the positions of the posts 24 on the chip 20 as shown in the figure, but the side surfaces of the openings OP3 face upward. Thus, the opening is formed into a tapered shape that gradually widens. For this reason, when the multilayered resin sheets 44 and 45 are superimposed on the post-mounted chip mounting substrate (the substrate 30, the chip 20, and the post 24), the region between the posts 24 on the chip 20 as shown in FIG. Space according to the shape of the tapered surface is secured. As a result, even if the resin melted during the hot pressing process flows over the region between the posts 24, the resin can be accommodated in the “space” portion, and adhesion of the resin onto the posts 24 is avoided. It becomes possible.
Claims (5)
前記突起状端子の径よりも大きい開口部が形成された熱硬化性の樹脂シートを用意し、前記構造体の突起状端子と前記樹脂シートの開口部とを位置合わせして、該樹脂シートを前記構造体上に重ね合わせる工程と、
重ね合わされた前記構造体及び前記樹脂シートを、加熱・加圧して、前記突起状端子の端面が前記樹脂シートの熱硬化後の樹脂層の表面に露出するように積層して一体化する工程と、
前記熱硬化後の樹脂層に、該樹脂層を貫通して前記基板上の一方の面側の導体部分に達するビアホールを形成する工程と、
前記ビアホールを導体で充填し、該導体に接続される配線層を形成する工程とを含むことを特徴とする電子部品内蔵配線基板の製造方法。 An electronic component having a protruding terminal formed on one surface and a substrate having a form in which a conductor portion is exposed on both surfaces and the conductor portion is electrically connected through the inside of the substrate are prepared. Producing a structure that is mounted on one side of the substrate in a face-up manner;
Prepare a thermosetting resin sheet having an opening larger than the diameter of the protruding terminal, align the protruding terminal of the structure with the opening of the resin sheet, and Superimposing on the structure;
Step of the structure and the resin sheet superposed, pressurized heat-pressurized, the end face of the projecting terminal is integrally laminated so as to be exposed on the surface of the resin layer after thermal curing of the resin sheet and,
Forming a via hole that penetrates the resin layer and reaches a conductor portion on one side of the substrate in the resin layer after the thermosetting;
And a step of filling the via hole with a conductor and forming a wiring layer connected to the conductor .
前記電子部品の厚さと同じ厚さを有し、かつ、前記電子部品の一方の面に形成された複数の突起状端子を含む領域に対応させて1つの開口部が形成された第1の樹脂シートと、 前記突起状端子の高さと同じ厚さを有し、かつ、前記電子部品上の各突起状端子の位置にそれぞれ対応させて複数の開口部が形成された第2の樹脂シートとを重ね合わせた多層構造の樹脂シートを使用することを特徴とする請求項1に記載の電子部品内蔵配線基板の製造方法。 In the step of superimposing the resin sheet on the structure, as a form of the resin sheet to be prepared,
A first resin having the same thickness as the electronic component and having one opening corresponding to a region including a plurality of protruding terminals formed on one surface of the electronic component A second resin sheet having the same thickness as the height of the protruding terminals and having a plurality of openings formed corresponding to the positions of the protruding terminals on the electronic component. The method for manufacturing a wiring board with a built-in electronic component according to claim 1, wherein a resin sheet having a multilayered structure is used.
前記電子部品の厚さと同じ厚さを有し、かつ、前記電子部品の一方の面に形成された複数の突起状端子を含む領域に対応させて1つの開口部が形成された第1の樹脂シートと、 前記突起状端子の高さと同じ厚さを有し、かつ、前記電子部品上の各突起状端子の位置にそれぞれ対応させて複数の開口部が形成され、かつ、各開口部の側面が上方に向かって開口部が徐々に広がるテーパ状に成形された第2の樹脂シートとを重ね合わせた多層構造の樹脂シートを使用することを特徴とする請求項1に記載の電子部品内蔵配線基板の製造方法。 In the step of superimposing the resin sheet on the structure, as a form of the resin sheet to be prepared,
A first resin having the same thickness as the electronic component and having one opening corresponding to a region including a plurality of protruding terminals formed on one surface of the electronic component A plurality of openings having a thickness equal to the height of the sheet and the protruding terminals, corresponding to the positions of the protruding terminals on the electronic component, and side surfaces of the openings 2. The electronic component built-in wiring according to claim 1, wherein a resin sheet having a multilayer structure in which a second resin sheet formed into a tapered shape in which an opening gradually expands upward is used. A method for manufacturing a substrate.
前記第1の突起状端子の位置に対応させて前記第1の突起状端子の径よりも大きい開口部が形成されるとともに、前記第2の突起状端子の位置に対応させて前記第2の突起状端子の径よりも大きい開口部が形成された熱硬化性の樹脂シートを用意し、前記構造体の前記第1、第2の各突起状端子と前記樹脂シートの対応する開口部とを位置合わせして、該樹脂シートを前記構造体上に重ね合わせる工程と、An opening larger than the diameter of the first protruding terminal is formed corresponding to the position of the first protruding terminal, and the second protruding terminal is positioned corresponding to the position of the second protruding terminal. A thermosetting resin sheet having an opening larger than the diameter of the protruding terminal is prepared, and the first and second protruding terminals of the structure and the corresponding opening of the resin sheet are provided. Aligning and overlaying the resin sheet on the structure;
重ね合わされた前記構造体及び前記樹脂シートを、加熱・加圧して、前記第1、第2の各突起状端子の端面が前記樹脂シートの熱硬化後の樹脂層の表面に露出するように積層して一体化する工程とを含むことを特徴とする電子部品内蔵配線基板の製造方法。The stacked structure and the resin sheet are heated and pressurized so that the end surfaces of the first and second protruding terminals are exposed on the surface of the resin layer after the thermosetting of the resin sheet. And a step of integrating them, and a method for manufacturing a wiring board with a built-in electronic component.
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JP5100878B1 (en) | 2011-09-30 | 2012-12-19 | 株式会社フジクラ | Component built-in board mounting body, manufacturing method thereof, and component built-in board |
JP2014067819A (en) * | 2012-09-25 | 2014-04-17 | Fujikura Ltd | Component-embedded substrate mounting body, method of manufacturing the same, and component-embedded substrate |
JP6870796B1 (en) * | 2019-09-10 | 2021-05-12 | 昭和電工マテリアルズ株式会社 | Semiconductor packages, their manufacturing methods, and semiconductor devices |
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JP2006041438A (en) * | 2004-07-30 | 2006-02-09 | Shinko Electric Ind Co Ltd | Semiconductor chip built-in substrate, and its manufacturing method |
JP4792749B2 (en) * | 2005-01-14 | 2011-10-12 | 大日本印刷株式会社 | Manufacturing method of printed wiring board with built-in electronic components |
JP4706929B2 (en) * | 2006-06-01 | 2011-06-22 | Tdk株式会社 | Composite wiring board and manufacturing method thereof |
JP2008159973A (en) * | 2006-12-26 | 2008-07-10 | Nec Corp | Electronic component module and circuit board with built-in components incorporating the module |
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