JP2010067761A - Substrate-supporting jig - Google Patents

Substrate-supporting jig Download PDF

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JP2010067761A
JP2010067761A JP2008232079A JP2008232079A JP2010067761A JP 2010067761 A JP2010067761 A JP 2010067761A JP 2008232079 A JP2008232079 A JP 2008232079A JP 2008232079 A JP2008232079 A JP 2008232079A JP 2010067761 A JP2010067761 A JP 2010067761A
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substrate
semiconductor wafer
supporting
support plate
layer
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JP5153531B2 (en
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Atsushi Taniguchi
敦 谷口
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Shin Etsu Polymer Co Ltd
Shin Etsu Chemical Co Ltd
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Shin Etsu Polymer Co Ltd
Shin Etsu Chemical Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a substrate-supporting jig suppressing such a disadvantage that foreign matters of a substrate are transferred to a supporting layer and the resultant foreign matters of the supporting layer attach to another substrate to cause a contamination, and capable of being easily inspected even when circuit patterns or the like are formed on both surfaces of the substrate. <P>SOLUTION: This substrate-supporting jig includes: a hollow supporting plate 1; a flexible supporting layer 4 supporting in an attachable and detachable manner, the periphery of a semiconductor wafer W coating the surface of the supporting plate 1 to cover a cavity 2 of the supporting plate 1; a plurality of supporting projections 5 formed in an alignment in a hollow 3 on the surface of the supporting plate 1 and supporting the supporting layer 4; and an exhaust hole 6 perforated in the supporting plate 1 and communicating with the hollow 3 coated with the supporting layer 4. Only the periphery of the semiconductor wafer W is adhered-supported by the supporting layer 4 to reduce the contacting area of the semiconductor wafer W, so that even when the substrate-supporting jig is repeatedly used, it can be reduced that foreign matters of the semiconductor wafer W are transferred to the supporting layer 4 and remain. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、半導体ウェーハ等からなる基板の検査時等に使用される基板保持治具に関するものである。   The present invention relates to a substrate holding jig used when inspecting a substrate made of a semiconductor wafer or the like.

従来、少なくとも表面に回路パターンが形成された薄く割れやすい半導体ウェーハをプローブ検査したり、外観検査する場合には、図示しないが、基板保持治具のフレームの粘着テープに半導体ウェーハの裏面全面を密着保持させて剛性を確保し、このハンドリングが容易となった状態で基板保持治具を検査装置のステージにセットし、半導体ウェーハを表面側からプローブ検査したり、外観検査するようにしている(特許文献1、2、3参照)。
特開平09−260480号公報 特開2003−152056号公報 特開2005−123296号公報
Conventionally, when probing or visually inspecting a thin, fragile semiconductor wafer with a circuit pattern formed on the surface, the entire back surface of the semiconductor wafer is in close contact with the adhesive tape of the frame of the substrate holding jig, although not shown. The substrate holding jig is set on the stage of the inspection device in a state where the rigidity is secured by holding and the handling becomes easy, and the semiconductor wafer is probe-inspected from the surface side and the appearance is inspected (patent) References 1, 2, and 3).
JP 09-260480 A JP 2003-152056 A JP 2005-123296 A

従来の基板保持治具は、以上のように構成され、粘着テープに半導体ウェーハの全裏面を隙間なく密着保持させるので、繰り返しの使用に伴い、半導体ウェーハの異物が粘着テープに転写され、この粘着テープの異物が新たに検査される半導体ウェーハに付着して汚染を招くという問題がある。また、半導体ウェーハの表裏面に回路パターンがそれぞれ形成され、回路の導通検査を要する場合には、半導体ウェーハの両面に半導体検査装置(以下、プローバという)のプローブを接触させる必要があるが、従来においては、半導体ウェーハの表面にしかプローブを接触させることができず、検査に支障を来たすという問題がある。   The conventional substrate holding jig is configured as described above and holds the entire back surface of the semiconductor wafer in close contact with the adhesive tape without any gaps. Therefore, with repeated use, foreign matter on the semiconductor wafer is transferred to the adhesive tape, and this adhesive tape There is a problem that foreign matter on the tape adheres to a newly inspected semiconductor wafer and causes contamination. In addition, when circuit patterns are formed on the front and back surfaces of a semiconductor wafer and circuit continuity inspection is required, it is necessary to contact a probe of a semiconductor inspection apparatus (hereinafter referred to as a prober) on both sides of the semiconductor wafer. However, there is a problem that the probe can be brought into contact only with the surface of the semiconductor wafer, which hinders the inspection.

また、半導体ウェーハを薄く加工すると、半導体ウェーハが弓なりに反り易くなるが、この反ったままの半導体ウェーハでは、姿勢の保持が困難なので、プローブ検査や外観検査の際、検査に支障を来たすおそれがある。特に、反った半導体ウェーハを外観検査する場合には、検査箇所のピントを正確に合わせることができないので、検査の信頼性や処理量の低下を招くこととなる。   In addition, if the semiconductor wafer is processed thinly, the semiconductor wafer tends to warp in a bow shape, but it is difficult to maintain the posture with this warped semiconductor wafer, so there is a risk of hindering the inspection during probe inspection and visual inspection. is there. In particular, when visual inspection is performed on a warped semiconductor wafer, the focus of the inspection location cannot be accurately adjusted, leading to a decrease in inspection reliability and throughput.

本発明は上記に鑑みなされたもので、基板の異物が保持層に転写され、この保持層の異物が別の基板に付着して汚染を招くのを抑制し、基板の両面に回路パターン等が形成されている場合でも、容易に検査することのできる基板保持治具を提供することを目的としている。   The present invention has been made in view of the above, and the foreign matter on the substrate is transferred to the holding layer, and the foreign matter on the holding layer is prevented from adhering to another substrate to cause contamination. Circuit patterns and the like are formed on both sides of the substrate. An object of the present invention is to provide a substrate holding jig that can be easily inspected even if formed.

本発明においては上記課題を解決するため、保持層に基板を保持させるものであって、
中空の支持板と、この支持板の表面を被覆して支持板の中空を覆う基板の周縁部を着脱自在に保持する可撓性の保持層と、支持板表面の凹み穴に形成されて保持層を支持する支持突起と、支持板に設けられて保持層に被覆された凹み穴に連通(連なり通す)する排気孔とを含んでなることを特徴としている。
なお、支持板の裏面に補強層を着脱自在に貼り付けることができる。
In the present invention, in order to solve the above problems, the holding layer is to hold the substrate,
A hollow support plate, a flexible holding layer that covers the surface of the support plate and covers the hollow of the support plate so as to be detachable, and a recessed hole on the surface of the support plate. It is characterized by comprising a support protrusion for supporting the layer and an exhaust hole provided in the support plate and communicating with (connected to) a recessed hole covered with the holding layer.
A reinforcing layer can be detachably attached to the back surface of the support plate.

ここで、特許請求の範囲における基板には、少なくとも各種大きさの半導体ウェーハ、フォトマスク、ガラス基板、太陽電池のセル等が含まれる。この基板が半導体ウェーハの場合、半導体ウェーハの表面のみならず、半導体ウェーハの表裏面に回路パターンがそれぞれ形成されていても良い。また、支持板は、中空であれば、リング形、枠形、多角形等、いずれの形状でも良い。この支持板の中空は、円形でも良いが、基板の形に応じて適宜変更することができる。   Here, the substrate in the claims includes at least various sizes of semiconductor wafers, photomasks, glass substrates, solar battery cells, and the like. When this substrate is a semiconductor wafer, circuit patterns may be formed not only on the surface of the semiconductor wafer but also on the front and back surfaces of the semiconductor wafer. Further, the support plate may be any shape such as a ring shape, a frame shape, and a polygonal shape as long as it is hollow. The hollow of the support plate may be circular, but can be appropriately changed according to the shape of the substrate.

本発明によれば、基板保持治具の保持層に基板の周縁部を保持させ、基板の保持層に対向する対向面の大部分を支持板の中空から露出させることにより、保持層に基板の大部分を接触させないようにするので、基板の保持層に対する接触面積を減少させることができる。これにより、例え基板保持治具を繰り返し使用しても、基板の異物が保持層に転写されるのを低減することができる。   According to the present invention, the holding layer of the substrate holding jig holds the peripheral portion of the substrate, and most of the facing surface facing the holding layer of the substrate is exposed from the hollow of the support plate, so that the holding layer has Since most of the substrate is not contacted, the contact area of the substrate with the holding layer can be reduced. Thereby, even if the substrate holding jig is repeatedly used, it is possible to reduce the transfer of foreign substances on the substrate to the holding layer.

本発明によれば、基板の異物が保持層に転写され、この保持層の異物が別の基板に付着して汚染を招くのを抑制することができるという効果がある。また、例え基板の両面に回路パターン等が形成されている場合でも、支持板の中空を活用して基板を容易に検査することができるという効果がある。   According to the present invention, there is an effect that foreign matter on the substrate is transferred to the holding layer, and the foreign matter on the holding layer can be prevented from adhering to another substrate and causing contamination. Further, even when circuit patterns or the like are formed on both surfaces of the substrate, there is an effect that the substrate can be easily inspected by utilizing the hollow of the support plate.

また、支持板の裏面に補強層を着脱自在に貼り付ければ、支持板の機械的強度を向上させ、支持板の変形や損傷等を防ぐことができる。   Further, if the reinforcing layer is detachably attached to the back surface of the support plate, the mechanical strength of the support plate can be improved, and deformation or damage of the support plate can be prevented.

以下、図面を参照して本発明に係る基板保持治具の好ましい実施形態を説明すると、本実施形態における基板保持治具は、図1や図2に示すように、半導体ウェーハWに中空2が覆われる支持板1と、この支持板1の表面を被覆して半導体ウェーハWの周縁部を保持する可撓性の保持層4と、支持板1の凹み穴3に形成されて保持層4を支持する複数の支持突起5と、保持層4に被覆された支持板1の凹み穴3に連通する排気孔6とを備えている。   Hereinafter, a preferred embodiment of a substrate holding jig according to the present invention will be described with reference to the drawings. The substrate holding jig in this embodiment has a hollow 2 in a semiconductor wafer W as shown in FIGS. The supporting plate 1 to be covered, the flexible holding layer 4 that covers the surface of the supporting plate 1 to hold the peripheral edge of the semiconductor wafer W, and the holding layer 4 formed in the recessed hole 3 of the supporting plate 1 A plurality of supporting protrusions 5 to be supported and an exhaust hole 6 communicating with the recessed hole 3 of the supporting plate 1 covered with the holding layer 4 are provided.

半導体ウェーハWは、例えば薄くスライスされた6インチや8インチサイズのシリコンウェーハからなり、表裏面のうち、少なくとも表面に回路パターンが形成されており、プローブ検査あるいは外観検査に供される。   The semiconductor wafer W is made of, for example, a thinly sliced 6-inch or 8-inch silicon wafer, and a circuit pattern is formed on at least the front or back surface of the wafer, and is used for probe inspection or appearance inspection.

支持板1は、所定の材料を使用して半導体ウェーハWよりも拡径に形成されるとともに、剛性を有する平面リング形の平板に形成され、平面円形の中空2が半導体ウェーハWの周縁部を除く大部分に被覆され、かつ半導体ウェーハWの裏面の大部分を露出させる。この支持板1の所定の材料としては、例えばポリカーボネート、ポリプロピレン、ポリエチレン、アクリル樹脂、塩化ビニル樹脂、アルミニウム合金、マグネシウム合金、ガラス、ステンレス等があげられる。   The support plate 1 is formed to have a diameter larger than that of the semiconductor wafer W using a predetermined material, and is formed into a rigid flat ring-shaped flat plate, and the flat circular hollow 2 defines the periphery of the semiconductor wafer W. Most of the back surface of the semiconductor wafer W is covered and is exposed to most of the surface. Examples of the predetermined material of the support plate 1 include polycarbonate, polypropylene, polyethylene, acrylic resin, vinyl chloride resin, aluminum alloy, magnesium alloy, glass, and stainless steel.

支持板表面の内外周縁部を除く大部分には、平面リング形の凹み穴3が浅く凹み形成される。また、支持板1の中空2は、半導体ウェーハWに位置合わせ用のオリフラやノッチが形成されている場合には、オリフラやノッチの形に応じて形成される。   A flat ring-shaped recess hole 3 is shallowly recessed in most of the support plate surface except for the inner and outer peripheral edges. In addition, when the orientation flat or notch for alignment is formed on the semiconductor wafer W, the hollow 2 of the support plate 1 is formed according to the shape of the orientation flat or notch.

保持層4は、所定の材料を使用して半導体ウェーハWよりも大きい平面リング形に成形され、支持板1表面の内外周縁部に接着されて凹み穴3を被覆しており、対向する半導体ウェーハWの対向面周縁部、換言すれば、裏面周縁部を着脱自在に隙間なく粘着保持する。この中空リング形の保持層4は、例えば耐熱性、耐候性、耐水性、剥離性、経時安定性等に優れるシリコーン系、ウレタン系、オレフィン系、フッ素系のエラストマー等を使用して弾性変形可能な薄膜に成形される。   The holding layer 4 is formed into a planar ring shape larger than the semiconductor wafer W using a predetermined material, and is adhered to the inner and outer peripheral edge portions of the surface of the support plate 1 so as to cover the recessed holes 3. The opposite peripheral edge of W, in other words, the rear peripheral edge is detachably attached without gaps. The hollow ring-shaped holding layer 4 can be elastically deformed by using, for example, a silicone, urethane, olefin, or fluorine elastomer that has excellent heat resistance, weather resistance, water resistance, peelability, stability over time, and the like. Formed into a thin film.

複数の支持突起5は、凹み穴3の底面に所定の間隔をおいて配列形成され、各支持突起5が支持板1表面の高さと同じ高さの円柱形あるいは円錐台形に形成されており、各支持突起5の表面が平坦な保持層4の裏面に接着される。この複数の支持突起5は、例えば凹み穴3の底面に成形法、サンドブラスト法、エッチング法等により一体形成される。   The plurality of support protrusions 5 are arranged on the bottom surface of the recessed hole 3 at a predetermined interval, and each support protrusion 5 is formed in a columnar shape or a truncated cone shape having the same height as the surface of the support plate 1. The surface of each support protrusion 5 is bonded to the back surface of the flat holding layer 4. The plurality of support protrusions 5 are integrally formed on the bottom surface of the recessed hole 3 by a molding method, a sandblast method, an etching method, or the like, for example.

排気孔6は、支持板1の厚さ方向に丸孔として穿孔されて保持層4に被覆された凹み穴3の空間に連通し、真空ポンプ等からなる排気装置7に着脱自在に接続されており、この排気装置7の駆動に伴い保持層4に被覆された凹み穴3の空気(図1の矢印参照)を外部に排気し、保持層4を複数の支持突起5に追従させて凸凹に変形させるよう機能する。そして、この保持層4の変形により、半導体ウェーハWの裏面周縁部と保持層4との間に空気が流入し、半導体ウェーハWを保持層4から剥離することが可能となる。   The exhaust hole 6 is formed as a round hole in the thickness direction of the support plate 1, communicates with the space of the recessed hole 3 covered with the holding layer 4, and is detachably connected to an exhaust device 7 including a vacuum pump or the like. As the exhaust device 7 is driven, the air in the recessed hole 3 covered with the holding layer 4 (see the arrow in FIG. 1) is exhausted to the outside so that the holding layer 4 follows the plurality of support protrusions 5 to be uneven. Functions to deform. Then, due to the deformation of the holding layer 4, air flows between the rear surface peripheral edge of the semiconductor wafer W and the holding layer 4, and the semiconductor wafer W can be peeled from the holding layer 4.

上記において、半導体ウェーハWをプローブ検査したり、外観検査する場合には、基板保持治具の保持層4に半導体ウェーハWの裏面周縁部を押圧により密着保持させて裏面周縁部を除く大部分を支持板1の中空2から露出させ、この半導体ウェーハWの剛性を確保した状態で基板保持治具を検査装置のステージにセットすれば、半導体ウェーハWをプローブ検査したり、外観検査することができる。   In the above, when the semiconductor wafer W is probe-inspected or externally inspected, most of the semiconductor wafer W except for the back-surface periphery is held by pressing the back-surface periphery of the semiconductor wafer W onto the holding layer 4 of the substrate holding jig. If the substrate holding jig is set on the stage of the inspection apparatus while being exposed from the hollow 2 of the support plate 1 and the rigidity of the semiconductor wafer W is secured, the semiconductor wafer W can be inspected by a probe or the appearance can be inspected. .

この際、半導体ウェーハWが弓なりに反っている場合には、半導体ウェーハWをローラ等で端部から徐々に押圧しながら平坦化し、保持層4に半導体ウェーハWの裏面周縁部を密着保持させれば良い。   At this time, when the semiconductor wafer W is warped in a bowed shape, the semiconductor wafer W is flattened while being gradually pressed from the end with a roller or the like, and the rear peripheral edge of the semiconductor wafer W can be held in close contact with the holding layer 4. It ’s fine.

検査が終了し、基板保持治具から半導体ウェーハWを取り外す場合には、支持板1の排気孔6に排気装置7を接続して駆動すれば、平坦な保持層4が複数の支持突起5に追従して凸凹に変形し、半導体ウェーハWと保持層4との間に空気が流入し、半導体ウェーハWを保持層4から剥離することができる。   When the inspection is completed and the semiconductor wafer W is removed from the substrate holding jig, the flat holding layer 4 is formed on the plurality of support protrusions 5 by driving the exhaust device 7 connected to the exhaust holes 6 of the support plate 1. It follows and deforms into irregularities, air flows between the semiconductor wafer W and the holding layer 4, and the semiconductor wafer W can be peeled from the holding layer 4.

上記構成によれば、保持層4に半導体ウェーハWの周縁部のみを隙間なく密着保持させ、その他の部分を非接触として半導体ウェーハWの接触面積を減少させるので、基板保持治具を繰り返し使用しても、半導体ウェーハWの異物が保持層4に転写され、残留するのを大いに低減することができる。したがって、保持層4の異物が次回に検査される半導体ウェーハWに付着して汚染を招くのを防止することができる。   According to the above configuration, only the peripheral edge portion of the semiconductor wafer W is held in close contact with the holding layer 4 without gaps, and the contact area of the semiconductor wafer W is reduced by making the other portions non-contact. However, it is possible to greatly reduce the foreign matter on the semiconductor wafer W from being transferred to the holding layer 4 and remaining. Therefore, it is possible to prevent the foreign matter of the holding layer 4 from adhering to the semiconductor wafer W to be inspected next time and causing contamination.

また、支持板1の中空2が半導体ウェーハWの裏面の大部分を露出させ、視認可能とするので、半導体ウェーハWの外観検査が容易になる他、例え半導体ウェーハWの表裏面に回路パターンがそれぞれ形成されている場合でも、半導体ウェーハWの表面のみならず、半導体ウェーハWの裏面にもプローブを中空2を介して容易に接触させることができる。したがって、半導体ウェーハWの両面を同時に検査することができ、回路の導通検査の著しい円滑化、迅速化、容易化を図ることが可能になる。   Further, since the hollow 2 of the support plate 1 exposes most of the back surface of the semiconductor wafer W so that it can be viewed, the appearance inspection of the semiconductor wafer W is facilitated, and for example, circuit patterns are formed on the front and back surfaces of the semiconductor wafer W. Even in the case where they are respectively formed, the probe can be easily brought into contact with not only the front surface of the semiconductor wafer W but also the back surface of the semiconductor wafer W through the hollow 2. Therefore, both surfaces of the semiconductor wafer W can be inspected at the same time, and the circuit continuity inspection can be significantly smoothed, speeded up, and facilitated.

また、剛性の高い支持板1と保持層4とを適切に密着させ、半導体ウェーハWの反りを矯正しながら検査工程に供することができるので、例え半導体ウェーハWが薄く反り易い場合でも、検査の際に半導体ウェーハWが弓なりに反ることがなく、プローブ検査や外観検査の円滑化、容易化が大いに期待できる。特に、半導体ウェーハWを外観検査する場合、検査箇所のピントを正確に合わせることができるので、検査の信頼性や処理量の低下を招くことがない。さらに、粘着テープではなく、粘着性の保持層4に半導体ウェーハWを密着保持させるので、半導体ウェーハWに粘着テープの粘着糊が付着することがない。   In addition, since the support plate 1 and the holding layer 4 having high rigidity can be appropriately adhered to each other and used for the inspection process while correcting the warp of the semiconductor wafer W, even if the semiconductor wafer W is thin and easily warped, At this time, the semiconductor wafer W does not warp in a bowed shape, and smooth and easy probe inspection and appearance inspection can be greatly expected. In particular, when visual inspection is performed on the semiconductor wafer W, the focus of the inspection portion can be accurately adjusted, so that the reliability of the inspection and the amount of processing are not reduced. Furthermore, since the semiconductor wafer W is held in close contact with the adhesive holding layer 4 instead of the adhesive tape, the adhesive paste of the adhesive tape does not adhere to the semiconductor wafer W.

次に、図3は本発明の第2の実施形態を示すもので、この場合には、薄い支持板1の裏面に、中空2を覆う平面円形の補強層10を着脱自在に貼着するようにしている。
補強層10は、例えば剛性を有する各種の板からなり、必要に応じ、平面円形あるいはリング形に形成される。その他の部分については、上記実施形態と略同様であるので説明を省略する。
Next, FIG. 3 shows a second embodiment of the present invention. In this case, a flat circular reinforcing layer 10 covering the hollow 2 is detachably attached to the back surface of the thin support plate 1. I have to.
The reinforcing layer 10 is made of various rigid plates, for example, and is formed into a flat circular shape or a ring shape as necessary. The other parts are substantially the same as those in the above embodiment, and thus description thereof is omitted.

本実施形態においても上記実施形態と同様の作用効果が期待でき、しかも、支持板1に補強層10を貼着するので、半導体ウェーハWの表裏面の導通検査を要しない場合には、支持板1が薄く撓みやすいときにその剛性を向上させることができるのは明らかである。   In this embodiment, the same effect as that of the above embodiment can be expected, and since the reinforcing layer 10 is adhered to the support plate 1, the support plate is used when the conduction inspection of the front and back surfaces of the semiconductor wafer W is not required. It is clear that the rigidity can be improved when 1 is thin and easy to bend.

次に、図4は本発明の第3の実施形態を示すもので、この場合には、支持板1を平面枠形に形成してその中空2を矩形とし、この支持板1表面の内外周縁部に、平面矩形のガラス基板Gの周縁部を保持する可撓性の保持層4を覆着するようにしている。その他の部分については、上記実施形態と略同様であるので説明を省略する。   Next, FIG. 4 shows a third embodiment of the present invention. In this case, the support plate 1 is formed in a flat frame shape and its hollow 2 is rectangular, and the inner and outer peripheral edges of the surface of the support plate 1 are shown. The flexible holding layer 4 that holds the peripheral edge of the flat rectangular glass substrate G is covered on the part. The other parts are substantially the same as those in the above embodiment, and thus description thereof is omitted.

本実施形態においても上記実施形態と同様の作用効果が期待でき、しかも、半導体ウェーハWではなく、汚染を嫌うガラス基板Gを保持する場合にも、基板保持治具を使用することができるので、用途の拡大を図ることができるのは明らかである。   In this embodiment, the same effect as the above embodiment can be expected, and also when holding the glass substrate G that is not contaminated instead of the semiconductor wafer W, the substrate holding jig can be used. It is clear that the application can be expanded.

本発明に係る基板保持治具の実施形態を模式的に示す断面説明図である。It is a section explanatory view showing typically an embodiment of a substrate holding jig concerning the present invention. 本発明に係る基板保持治具の実施形態を模式的に示す平面説明図である。It is a plane explanatory view showing typically an embodiment of a substrate holding jig concerning the present invention. 本発明に係る基板保持治具の第2の実施形態を模式的に示す断面説明図である。It is a section explanatory view showing typically a 2nd embodiment of a substrate holding jig concerning the present invention. 本発明に係る基板保持治具の第3の実施形態を模式的に示す平面説明図である。It is a plane explanatory view showing a 3rd embodiment of a substrate holding jig concerning the present invention typically.

符号の説明Explanation of symbols

1 支持板
2 中空
3 凹み穴
4 保持層
5 支持突起
6 排気孔
10 補強層
G ガラス基板(基板)
W 半導体ウェーハ(基板)
DESCRIPTION OF SYMBOLS 1 Support plate 2 Hollow 3 Recess hole 4 Holding layer 5 Support protrusion 6 Exhaust hole 10 Reinforcing layer G Glass substrate (board | substrate)
W Semiconductor wafer (substrate)

Claims (2)

保持層に基板を保持させる基板保持治具であって、中空の支持板と、この支持板の表面を被覆して支持板の中空を覆う基板の周縁部を着脱自在に保持する可撓性の保持層と、支持板表面の凹み穴に形成されて保持層を支持する支持突起と、支持板に設けられて保持層に被覆された凹み穴に連通する排気孔とを含んでなることを特徴とする基板保持治具。   A substrate holding jig for holding a substrate on a holding layer, which is a flexible support for detachably holding a hollow support plate and a peripheral portion of the substrate that covers the surface of the support plate and covers the hollow of the support plate A holding layer, a support projection formed in a recessed hole on the surface of the support plate to support the holding layer, and an exhaust hole provided in the support plate and communicating with the recessed hole covered by the holding layer. A substrate holding jig. 支持板の裏面に補強層を着脱自在に貼り付けた請求項1記載の基板保持治具。   The substrate holding jig according to claim 1, wherein a reinforcing layer is detachably attached to the back surface of the support plate.
JP2008232079A 2008-09-10 2008-09-10 Substrate holding jig Expired - Fee Related JP5153531B2 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019044237A (en) * 2017-09-04 2019-03-22 日本電気硝子株式会社 Substrate protector and method for manufacturing substrate having film
CN112967987A (en) * 2020-10-30 2021-06-15 重庆康佳光电技术研究院有限公司 Chip transfer substrate and chip transfer method

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH042146A (en) * 1990-04-18 1992-01-07 Mitsubishi Electric Corp Wafer holder
JPH11307488A (en) * 1998-04-24 1999-11-05 Denso Corp Semiconductor device, its manufacture, process guide and its processing device
JP2005327758A (en) * 2004-05-12 2005-11-24 Shin Etsu Polymer Co Ltd Part holder
JP2006210426A (en) * 2005-01-25 2006-08-10 Seiko Epson Corp Exposure device
JP2008053624A (en) * 2006-08-28 2008-03-06 Matsushita Electric Ind Co Ltd Alignment apparatus
JP2008124145A (en) * 2006-11-09 2008-05-29 Lintec Corp Transfer method and grinder for semiconductor wafer

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH042146A (en) * 1990-04-18 1992-01-07 Mitsubishi Electric Corp Wafer holder
JPH11307488A (en) * 1998-04-24 1999-11-05 Denso Corp Semiconductor device, its manufacture, process guide and its processing device
JP2005327758A (en) * 2004-05-12 2005-11-24 Shin Etsu Polymer Co Ltd Part holder
JP2006210426A (en) * 2005-01-25 2006-08-10 Seiko Epson Corp Exposure device
JP2008053624A (en) * 2006-08-28 2008-03-06 Matsushita Electric Ind Co Ltd Alignment apparatus
JP2008124145A (en) * 2006-11-09 2008-05-29 Lintec Corp Transfer method and grinder for semiconductor wafer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019044237A (en) * 2017-09-04 2019-03-22 日本電気硝子株式会社 Substrate protector and method for manufacturing substrate having film
CN112967987A (en) * 2020-10-30 2021-06-15 重庆康佳光电技术研究院有限公司 Chip transfer substrate and chip transfer method
CN112967987B (en) * 2020-10-30 2022-03-01 重庆康佳光电技术研究院有限公司 Chip transfer substrate and chip transfer method

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