JP2008053624A - Alignment apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To enable wafer alignment for monitoring the management item of a semiconductor chip having a fine chip size in the middle of a manufacturing process relating to an alignment apparatus 10 for carrying out the positioning of wafer 17, when the management item is inspected such as electrical characteristics of the chip formed on the wafer 17. <P>SOLUTION: An alignment apparatus comprises a wafer chuck 11 on which wafer 17 is to be placed, and a lower fixed camera 13 provided under the wafer chuck 11. The wafer 17 has an alignment mark 18 on its rear surface. The wafer chuck 11 is constituted in such a manner that the alignment mark 18 can be observed by use of the lower fixed camera 13. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an alignment apparatus that adjusts the position of a wafer when inspecting management items such as electrical characteristics in a chip formed on a semiconductor wafer (hereinafter referred to as a wafer).

  2. Description of the Related Art Conventionally, in the manufacturing process of a semiconductor device such as a semiconductor laser used for an optical disk device or optical information processing, a large number of chips to be the semiconductor device are arranged and formed on the surface of a wafer at regular intervals. Each chip includes a pattern for inspecting electrical characteristics as a management item during the manufacturing process, and has a pad for measurement. The electrical characteristics of the chip are measured by bringing probe needles corresponding to the inspection device into contact with the respective measurement pads in the chip.

  In this type of inspection, a probe device is used for automation. The probe device includes a wafer chuck that holds a wafer to be inspected and can be vertically moved. The wafer chuck is supported by a stage and is movable in a horizontal plane.

In order to automatically measure the electrical characteristics of the chip using the probe device, wafer alignment and accurate position recognition are indispensable. In the current probe apparatus, as described in Patent Document 1, the chip shape is recognized by a fixed camera provided on the front side of the wafer, and alignment is performed by moving the stage.
Japanese Patent Laid-Open No. 5-198662

  In recent years, along with a demand for increasing the number of chips that can be taken per unit area of a wafer, the chip size of a semiconductor device has been reduced. However, in a conventional alignment apparatus that recognizes and aligns the chip shape with a camera provided on the front side of the wafer, the alignable chip size is 350 μm or more (for example, 21S, P-8XL manufactured by Tokyo Electron) . For this reason, when the chip size is reduced to less than 350 μm, there is a problem that the possibility of shifting the base chip position which is the measurement start position increases for each wafer.

  That is, in the conventional alignment, the edge of the wafer is detected by the height sensor, and the center point of the wafer is calculated from the three detected edges. Next, the first chip position (base chip position) to be inspected on the wafer is captured by the camera provided on the front side of the wafer. The positional relationship between the center point of the wafer and the base point chip position is stored, and when inspecting the second and subsequent wafers, only the center point of the wafer is calculated by the height sensor, and the stored center point and base point of the wafer are stored. Using the positional relationship with the chip position, the chip position to be inspected first on the wafer is automatically calculated. As described above, in the second and subsequent wafers, it is not necessary to take in the position of the first chip to be inspected on the wafer by the camera provided on the front side of the wafer, and the base chip position is recognized based on the center point of the wafer. is doing.

  However, since the edge of the wafer is not a right angle but has a gently inclined shape, an error occurs when the center point of the wafer is calculated based on the edge. As described above, the position accuracy of the center point of the wafer is limited, and as a result, the recognition accuracy of the base chip position with respect to the center point of the wafer is also limited. The limit is that the chip size that can be aligned is 350 μm or more. If the chip size is less than 350 μm, the position error of the center point of the wafer exceeds the allowable value, and the correct base chip position can be recognized. Disappear. For this reason, the problem which cannot monitor a management item correctly in the middle of a manufacturing process arose.

  The alignment apparatus of the present invention comprises a wafer chuck for placing a wafer and a camera provided below the wafer chuck, the wafer has an alignment mark on the back surface, and the wafer chuck is formed by the camera. The alignment mark can be observed.

  Specifically, a hollow portion or a transparent member that can observe the alignment mark with the camera is provided at the center of the wafer chuck.

  According to the alignment apparatus of the present invention, an alignment mark is formed on the back surface of the wafer, and the alignment mark is observed with a camera provided below via a wafer chuck on which the wafer is placed, thereby providing a reference standard for the base chip position. The alignment mark on the backside of the wafer becomes more accurate than the center point of the wafer calculated from the edge of the conventional wafer, and wafer alignment is possible to monitor the management items of semiconductor chips that have a fine chip size Become.

  According to the alignment apparatus of the present invention, it becomes possible to perform wafer alignment for monitoring a management item of a semiconductor chip having a fine chip size during the manufacturing process, and immediately detect an abnormality of the chip in the manufacturing process, and quality and yield. It can contribute to improvement.

(First embodiment)
A first embodiment of the present invention will be described with reference to FIG. 1 and FIG. FIG. 1 is a schematic sectional view of an alignment apparatus, and FIG. 2 is a schematic top view of a wafer chuck of the alignment apparatus.

  In the figure, 10 is an alignment apparatus, 11 is a wafer chuck, 12 is an upper fixed camera, and 13 is a lower fixed camera.

  The wafer chuck 11 has a donut shape in which a circular cavity 14 is formed at the center in order to observe the alignment mark 18 formed on the back surface of the wafer 17 by the lower fixed camera 13. Further, a plurality of vacuum chuck portions 15 for fixing the wafer 17 are provided at predetermined intervals in the circumferential direction on the upper surface. Further, the wafer chuck 11 is supported by a stage (not shown), and the stage can be moved by a conventional drive mechanism in the horizontal direction (X, Y direction) and the height direction (Z direction), and It can be rotated by a conventional rotating mechanism around a central axis parallel to the Z direction.

  The upper fixed camera 12 is a camera similar to a conventional camera that observes the wafer 17 from the surface side, and is fixedly installed on an alignment bridge or the like above the wafer chuck 11.

  The lower fixed camera 13 is for observing the wafer 17 from the back side, and is fixedly installed on an alignment bridge or the like below the wafer chuck 11. The lower fixed camera 13 makes it possible to observe the alignment mark 18 formed on the back surface of the wafer 17 through the cavity 14 of the wafer chuck 11 and, of course, is configured not to be obstructed by the stage or the like. For example, a cavity having the same shape and the same size as the cavity 14 of the wafer chuck 11 may be formed on the stage.

  The type of camera used as the lower fixed camera 13 may be a camera having the same performance as the upper fixed camera 12, such as an optical camera.

  The arrangement relationship between the upper fixed camera 12 and the lower fixed camera 13 is not particularly limited. However, it is preferable to arrange the upper fixed camera 12 and the center of the visual field so as to coincide with each other. This is because when the stage is moved, the wafer is observed as the same upper and lower portions.

  An alignment mark 18 is engraved on the back surface of the wafer 17. The alignment mark 18 can be dug in an arbitrary process before the evaluation item is performed by the probe device.

  The digging of the alignment mark 18 is realized by performing etching through a dark room process with the stepper as a reference of the OF (orientation flat) of the wafer 17. For example, in a Nikon stepper, pre-alignment reproducibility based on OF is about 25 μm (3σ) (σ: standard deviation), which is sufficiently higher than 350 μm, which is the chip size that can be aligned by the upper fixed camera 12. Good accuracy.

  Even if the chip size on the front surface is set to 350 μm or less in order to increase the number of chips, the chip size on the back surface does not need to take into account the element arrangement, etc., and remains large enough to be recognized by the camera. Can be set arbitrarily.

  As for the shape of the alignment mark 18, it is easy for the lower fixed camera 13 to recognize the position if it is a figure having a corner such as a cross or a rectangle. The size of the alignment mark 18 is not limited, but can be set to be larger than 350 μm, which is an alignable size.

  Although not shown in FIG. 1, a probe device that automatically measures the electrical characteristics of the chip on the surface of the wafer 17, operations such as stage drive and wafer chuck 11 adsorption, and upper fixed camera 12, a known mechanism such as a control device for controlling the lower fixed camera 13, the probe device and the like is provided.

  Next, the alignment operation by the alignment apparatus 10 will be described.

  First, the wafer 17 transferred on the wafer chuck 11 is placed. The stage is driven so that the alignment mark 18 on the back surface of the wafer 17 is positioned at the center of the field of view of the lower fixed camera 13. Then, the height of the wafer chuck 11 is adjusted so that the image definition of the alignment mark 18 is maximized, and the alignment mark 18 is positioned at the focal point of the lower fixed camera 13. In this state, the position coordinate X, Y, Z and rotation coordinate θ data of the wafer chuck 11 are stored in the memory or the like of the control device.

  Next, the stage is moved in the horizontal direction (X, Y direction), and the chip to be inspected first on the wafer 17 is captured by the upper fixed camera 12. Then, the position coordinates X and Y of the stage are adjusted so that the predetermined portion of the captured chip is positioned at the center of the field of view of the upper fixed camera 12, and the stage is rotated in accordance with the arrangement of pads of the chip. The coordinate θ is adjusted to obtain the base point chip position. In this state, the position coordinate X, Y, Z and rotation coordinate θ data of the wafer chuck 11 are stored in the memory or the like of the control device.

  Based on the position of the alignment mark 18 on the back surface of the wafer 17 and the base chip position obtained as described above, the positional relationship between them is calculated and stored in the memory or the like of the control device.

  In this way, the electrical characteristics of the chip are measured by bringing the corresponding probe needle of the probe device into contact with each measurement pad of the chip to be inspected first of the aligned wafer 17. When the inspection of the first chip is completed, the wafer chuck 11 is horizontally moved based on the chip interval, and all the chips to be inspected are sequentially inspected by the probe device. When the inspection of all the chips to be inspected is completed, the inspected wafer 17 is removed from the wafer chuck 11 and the next wafer 17 is placed. Thereafter, alignment and inspection are performed in the same manner.

  According to the alignment apparatus 10 configured in this way, even when the chip pattern on the surface of the wafer 17 is less than 350 μm, the wafer alignment for performing the electrical measurement evaluation on a plurality of points in the wafer 17 and the plurality of wafers 17 is performed. It becomes possible. Specifically, the position of the alignment mark 18 on the back surface of the first wafer 17 measured by the lower fixed camera 13 is detected, and the first measurement point (base chip position) in the first wafer 17 to be measured. Are manually set using a monitor through the upper fixed camera 12, and a plurality of points in the wafer 17 are measured by moving the stage in accordance with a measurement shot map created by a PC (personal computer) as a control device. For example, the positional relationship between the position of the alignment mark 18 on the back surface of the wafer 17 and the base chip position in the wafer 17 is stored. The second and subsequent base point chip positions are inferred from the positional relationship between the stored position of the alignment mark 18 on the back surface of the first wafer 17 and the base point chip position in the wafer 17. For example, the realignment reproducibility of the Nikon stepper based on OF is about 25 μm (3σ), so the reproducibility of the front and back surfaces is about 50 μm (3σ), and the chip pattern of the element is 50 μm or more. If there is, it can be corrected by the upper fixed camera 12. In this case, a maximum of 50 μm misalignment may occur, but the measurement can be stabilized by revising the electrode size of the inspection chip to about 100 μm (the current inspection chip electrode size is 200 μm or less). ).

  Further, since the alignment mark 18 on the back surface disappears by polishing after the characteristic evaluation, the element characteristics are not affected.

  As shown in FIG. 3, when a large number of characteristic evaluation chips 20 having different shapes from the semiconductor laser chip 19 are arranged in the arrangement region of the semiconductor laser chip 19 on the surface 17a of the wafer 17, the upper fixed camera 12 is used. Alignment is affected by shape recognition. In other words, if chips with different patterns are included, there is a concern that the upper fixed camera 12 cannot recognize the pattern and cannot perform alignment, but the advantage that the alignment using the lower fixed camera 13 is not affected. There is also an advantage that alignment is possible even if a plurality of wafer patterns on the surface are freely arranged.

  Also, from the viewpoint of cost, the method of the present invention can be realized at a lower cost. This is because an expensive optical system such as a stepper is not necessary.

(Second Embodiment)
A second embodiment of the present invention will be described with reference to FIGS. 4 is a schematic sectional view of the alignment apparatus, and FIG. 5 is a schematic top view of a wafer chuck of the alignment apparatus. In addition, the same part as the example shown in FIG. 1 and FIG. 2 attaches | subjects the same code | symbol, and abbreviate | omits the description.

  In the present embodiment, the center of the wafer chuck 11 is constituted by a circular transparent member 16 in order to observe the alignment mark 18 formed on the back surface of the wafer 17 with the lower fixed camera 13.

  As a material of the transparent member 16, ITO (indium tin oxide) is conceivable, and the cavity 14 is held in the wafer chuck 11 after being hollowed out.

  The transparent member 16 is preferably made of a conductive material that can be grounded in order to measure the electrical characteristics of the element. The reason for using the transparent member 16 is that when a weak wafer such as a compound semiconductor is used, the risk of the wafer being damaged during vacuum chucking can be reduced.

  In the embodiment described above, the cavity 14 and the transparent member 16 are circular. However, the present invention is not limited to this, and it is sufficient that the alignment mark 18 formed on the back surface of the wafer 17 can be observed. The shape may also be

  The present invention can be applied to semiconductor lasers of red, infrared, and other wavelengths. The present invention can also be applied to a semiconductor laser having two wavelengths and multiple wavelengths. Furthermore, the present invention can be applied to various semiconductor elements having a small element area without being limited to the semiconductor laser.

  INDUSTRIAL APPLICABILITY The present invention is useful for an alignment apparatus for monitoring management items during a manufacturing process in an optical disk device formed on a wafer, a semiconductor laser used for optical information processing, and the like.

1 is a schematic sectional view of an alignment apparatus according to a first embodiment of the present invention. 1 is a schematic top view of a wafer chuck of an alignment apparatus according to a first embodiment of the present invention. Schematic diagram of a wafer with many characteristic evaluation chips placed in the chip placement area of the wafer Schematic sectional view of an alignment apparatus in the second embodiment of the present invention The schematic top view of the wafer chuck of the alignment apparatus in the 2nd Embodiment of this invention

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Alignment apparatus 11 Wafer chuck 12 Upper fixed camera 13 Lower fixed camera 14 Cavity part 15 Vacuum chuck part 16 Transparent member 17 Wafer 18 Alignment mark

Claims (3)

A wafer chuck for mounting a semiconductor wafer, and a camera provided below the wafer chuck,
An alignment apparatus in which the semiconductor wafer has an alignment mark on the back surface, and the wafer chuck can observe the alignment mark with the camera. The wafer alignment apparatus according to claim 1, wherein
An alignment apparatus characterized in that a hollow portion capable of observing the alignment mark with the camera is provided in a central portion of the wafer chuck. The wafer alignment apparatus according to claim 1, wherein
An alignment apparatus, wherein a transparent member capable of observing the alignment mark with the camera is provided at a central portion of the wafer chuck.

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