JP2010040618A - リードフレーム、半導体装置、及び半導体装置の製造方法 - Google Patents
リードフレーム、半導体装置、及び半導体装置の製造方法 Download PDFInfo
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Abstract
【解決手段】リードフレーム100は、ダイパッド101、第1の凹部112、及び第2の凹部122を備える。ダイパッド101は、第1の半導体チップ200が搭載される。第1の凹部112は第1の半導体チップ200の搭載領域110を示しており、第2の凹部122は第2の半導体チップ300の搭載領域120を示している。第1の凹部112と第2の凹部122は、形状及び大きさの少なくとも一方が異なる。
【選択図】図1
Description
前記ダイパッドに形成され、第1の半導体チップの搭載領域を示す第1の凹部、凸部、または孔と、
前記ダイパッドに形成され、第2の半導体チップの搭載領域を示す第2の凹部、凸部、または孔と、
を備え、
前記第1の凹部、凸部、または孔と、前記第2の凹部、凸部、または孔は、形状及び大きさの少なくとも一方が異なるリードフレームが提供される。
前記リードフレームの前記ダイパッドに搭載された前記第1の半導体チップと、
を備える半導体装置が提供される。
前記第1の半導体チップ及び第2の半導体チップの少なくとも一方の搭載位置を検査する工程と、
を有する半導体装置の製造方法であって、
前記リードフレームは、
前記ダイパッドに形成され、前記第1の半導体チップの搭載領域を示す第1の凹部、凸部、または孔と、
前記ダイパッドに形成され、前記第2の半導体チップの搭載領域を示す第2の凹部、凸部、または孔と、
を備え、
前記第1の凹部、凸部、または孔と、前記第2の凹部、凸部、または孔は、形状及び大きさの少なくとも一方が異なり、
前記第1の半導体チップ及び第2の半導体チップの少なくとも一方の搭載位置を検査する工程において、前記第1の半導体チップが搭載されている場合は前記第1の凹部、凸部、または孔と前記第1の半導体チップの相対位置に基づいて前記第1の半導体チップの搭載位置を検査し、前記第2の半導体チップが搭載されている場合は前記第2の凹部、凸部、または孔と前記第2の半導体チップの相対位置に基づいて前記第2の半導体チップの搭載位置を検査する半導体装置の製造方法が提供される。
本実施形態によっても第4の実施形態と同様の効果を得ることができる。
本実施形態においても第1の実施形態と同様の効果を得ることができる。
101 ダイパッド
110 第1の半導体チップの搭載領域
112 第1の凹部
120 第2の半導体チップの搭載領域
122 第2の凹部
130 第3の半導体チップの搭載領域
132 第3の凹部
200 第1の半導体チップ
300 第2の半導体チップ
410 ワイヤ
420 ワイヤ
430 ワイヤ
500 封止樹脂
600 第3の半導体チップ
Claims (9)
- 半導体チップが搭載されるダイパッドと、
前記ダイパッドに形成され、第1の半導体チップの搭載領域を示す第1の凹部、凸部、または孔と、
前記ダイパッドに形成され、第2の半導体チップの搭載領域を示す第2の凹部、凸部、または孔と、
を備え、
前記第1の凹部、凸部、または孔と、前記第2の凹部、凸部、または孔は、形状及び大きさの少なくとも一方が異なるリードフレーム。 - 請求項1に記載のリードフレームにおいて、
前記第2の半導体チップは、前記第1の半導体チップより小さく、かつ前記第1の半導体チップ上に搭載され、
前記ダイパッドにおいて、前記第2の半導体チップの搭載領域は、前記第1の半導体チップの搭載領域の内部に位置するリードフレーム。 - 請求項2に記載のリードフレームにおいて、
前記第1の凹部、凸部、または孔と、前記第2の凹部、凸部、または孔とを、それぞれ複数有しており、
隣り合う前記第1の凹部、凸部、または孔を結ぶことにより、前記第1の半導体チップの搭載領域が定義され、
前記第1の半導体チップの搭載領域を介して互いに対向する前記第2の凹部、凸部、または孔を結ぶことにより、前記第2の半導体チップの搭載領域が定義されるリードフレーム。 - 請求項1に記載のリードフレームにおいて、
前記第1の凹部、凸部、または孔は、前記ダイパッドの第1面に形成され、
前記第2の凹部、凸部、または孔は、前記ダイパッドの第1面とは反対側の面である第2面に形成されているリードフレーム。 - 請求項2に記載のリードフレームにおいて、
前記第1の凹部、凸部、または孔、並びに前記第2の凹部、凸部、または孔は、前記ダイパッドの第1面に形成され、
さらに、前記ダイパッドの第1面とは反対側の面である第2面に形成されており、第3の半導体チップの搭載領域を示す第3の凹部、凸部、または孔を備えるリードフレーム。 - 請求項1〜5のいずれか一つに記載のリードフレームと、
前記リードフレームの前記ダイパッドに搭載された前記第1の半導体チップと、
を備える半導体装置。 - 第1の半導体チップ及び第2の半導体チップの少なくとも一方を、リードフレームのダイパッド上に搭載する工程と、
前記第1の半導体チップ及び第2の半導体チップの少なくとも一方の搭載位置を検査する工程と、
を有する半導体装置の製造方法であって、
前記リードフレームは、
前記ダイパッドに形成され、前記第1の半導体チップの搭載領域を示す第1の凹部、凸部、または孔と、
前記ダイパッドに形成され、前記第2の半導体チップの搭載領域を示す第2の凹部、凸部、または孔と、
を備え、
前記第1の凹部、凸部、または孔と、前記第2の凹部、凸部、または孔は、形状及び大きさの少なくとも一方が異なり、
前記第1の半導体チップ及び第2の半導体チップの少なくとも一方の搭載位置を検査する工程において、前記第1の半導体チップが搭載されている場合は前記第1の凹部、凸部、または孔と前記第1の半導体チップの相対位置に基づいて前記第1の半導体チップの搭載位置を検査し、前記第2の半導体チップが搭載されている場合は前記第2の凹部、凸部、または孔と前記第2の半導体チップの相対位置に基づいて前記第2の半導体チップの搭載位置を検査する半導体装置の製造方法。 - 請求項7に記載の半導体装置の製造方法において、
前記第1の半導体チップは前記第2の半導体チップより大きく、
前記第1の半導体チップ及び第2の半導体チップの少なくとも一方を前記ダイパッド上に搭載する工程において、前記第1の半導体チップを前記ダイパッド上に搭載し、かつ前記第2の半導体チップを前記第1の半導体チップ上に搭載する半導体装置の製造方法。 - 請求項8に記載の半導体装置の製造方法において、
前記リードフレームは、前記第1の凹部、凸部、または孔と、前記第2の凹部、凸部、または孔とを、それぞれ複数有しており、
隣り合う前記第1の凹部、凸部、または孔を結ぶことにより、前記第1の半導体チップの搭載領域が定義され、
前記第1の半導体チップの搭載領域を介して互いに対向する前記第2の凹部、凸部、または孔を結ぶことにより、前記第2の半導体チップの搭載領域が定義される半導体装置の製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008199186A JP5097639B2 (ja) | 2008-08-01 | 2008-08-01 | リードフレーム及び半導体装置 |
US12/458,951 US8164203B2 (en) | 2008-08-01 | 2009-07-28 | Leadframe, semiconductor device, and method of manufacturing the same |
US13/427,777 US8487454B2 (en) | 2008-08-01 | 2012-03-22 | Leadframe, semiconductor device, and method of manufacturing the same |
US13/933,498 US8786112B2 (en) | 2008-08-01 | 2013-07-02 | Leadframe, semiconductor device, and method of manufacturing the same |
US14/268,847 US9029195B2 (en) | 2008-08-01 | 2014-05-02 | Leadframe, semiconductor device, and method of manufacturing the same |
Applications Claiming Priority (1)
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WO2010073520A1 (ja) * | 2008-12-26 | 2010-07-01 | パナソニック株式会社 | 固体撮像デバイスおよびその製造方法 |
US8205397B2 (en) * | 2009-08-25 | 2012-06-26 | Hot Edge, Inc. | Roof edge cable raceway and method of forming same |
DE102019118174B3 (de) | 2019-07-04 | 2020-11-26 | Infineon Technologies Ag | Verarbeitung von einem oder mehreren trägerkörpern und elektronischen komponenten durch mehrfache ausrichtung |
CN110323198B (zh) * | 2019-07-26 | 2024-04-26 | 广东气派科技有限公司 | 非接触式上下芯片封装结构及其封装方法 |
CN112563147B (zh) * | 2020-12-07 | 2023-05-12 | 英特尔产品(成都)有限公司 | 用于检测半导体芯片产品脱袋的方法、装置和系统 |
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JP2007134659A (ja) | 2005-11-14 | 2007-05-31 | Sharp Corp | リードフレーム、半導体装置、半導体装置の製造方法、および、電子機器 |
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