JP2009527861A5 - - Google Patents
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- JP2009527861A5 JP2009527861A5 JP2008556490A JP2008556490A JP2009527861A5 JP 2009527861 A5 JP2009527861 A5 JP 2009527861A5 JP 2008556490 A JP2008556490 A JP 2008556490A JP 2008556490 A JP2008556490 A JP 2008556490A JP 2009527861 A5 JP2009527861 A5 JP 2009527861A5
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- Japan
- Prior art keywords
- address
- logical address
- value
- logical
- processing system
- Prior art date
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Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/360,926 US7376807B2 (en) | 2006-02-23 | 2006-02-23 | Data processing system having address translation bypass and method therefor |
| US11/360,926 | 2006-02-23 | ||
| PCT/US2007/061191 WO2007117746A2 (en) | 2006-02-23 | 2007-01-29 | Data processing system having address translation bypass and method therefor |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009527861A JP2009527861A (ja) | 2009-07-30 |
| JP2009527861A5 true JP2009527861A5 (enExample) | 2010-03-04 |
| JP5144542B2 JP5144542B2 (ja) | 2013-02-13 |
Family
ID=38429766
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008556490A Expired - Fee Related JP5144542B2 (ja) | 2006-02-23 | 2007-01-29 | アドレス変換バイパスを有するデータ処理システム及びその方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US7376807B2 (enExample) |
| JP (1) | JP5144542B2 (enExample) |
| CN (1) | CN101390062B (enExample) |
| TW (1) | TW200817900A (enExample) |
| WO (1) | WO2007117746A2 (enExample) |
Families Citing this family (44)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007272635A (ja) * | 2006-03-31 | 2007-10-18 | Toshiba Corp | メモリシステム及びコントローラ |
| US7401201B2 (en) * | 2006-04-28 | 2008-07-15 | Freescale Semiconductor, Inc. | Processor and method for altering address translation |
| US7707383B2 (en) * | 2006-11-21 | 2010-04-27 | Intel Corporation | Address translation performance in virtualized environments |
| JPWO2008117520A1 (ja) * | 2007-03-28 | 2010-07-15 | パナソニック株式会社 | メモリコントローラ、不揮発性メモリシステムおよびホスト装置 |
| US7921261B2 (en) | 2007-12-18 | 2011-04-05 | International Business Machines Corporation | Reserving a global address space |
| US7925842B2 (en) | 2007-12-18 | 2011-04-12 | International Business Machines Corporation | Allocating a global shared memory |
| US8484307B2 (en) | 2008-02-01 | 2013-07-09 | International Business Machines Corporation | Host fabric interface (HFI) to perform global shared memory (GSM) operations |
| US8146094B2 (en) * | 2008-02-01 | 2012-03-27 | International Business Machines Corporation | Guaranteeing delivery of multi-packet GSM messages |
| US8239879B2 (en) | 2008-02-01 | 2012-08-07 | International Business Machines Corporation | Notification by task of completion of GSM operations at target node |
| US8255913B2 (en) | 2008-02-01 | 2012-08-28 | International Business Machines Corporation | Notification to task of completion of GSM operations by initiator node |
| US7844746B2 (en) * | 2008-02-01 | 2010-11-30 | International Business Machines Corporation | Accessing an effective address and determining whether the effective address is associated with remotely coupled I/O adapters |
| US8200910B2 (en) | 2008-02-01 | 2012-06-12 | International Business Machines Corporation | Generating and issuing global shared memory operations via a send FIFO |
| US8893126B2 (en) * | 2008-02-01 | 2014-11-18 | International Business Machines Corporation | Binding a process to a special purpose processing element having characteristics of a processor |
| US8275947B2 (en) | 2008-02-01 | 2012-09-25 | International Business Machines Corporation | Mechanism to prevent illegal access to task address space by unauthorized tasks |
| US8214604B2 (en) | 2008-02-01 | 2012-07-03 | International Business Machines Corporation | Mechanisms to order global shared memory operations |
| US20140325129A1 (en) * | 2008-12-31 | 2014-10-30 | Micron Technology, Inc. | Method and apparatus for active range mapping for a nonvolatile memory device |
| US8386747B2 (en) * | 2009-06-11 | 2013-02-26 | Freescale Semiconductor, Inc. | Processor and method for dynamic and selective alteration of address translation |
| KR101370314B1 (ko) * | 2009-06-26 | 2014-03-05 | 인텔 코포레이션 | 언바운디드 트랜잭션 메모리 (utm) 시스템의 최적화 |
| US9164886B1 (en) * | 2010-09-21 | 2015-10-20 | Western Digital Technologies, Inc. | System and method for multistage processing in a memory storage subsystem |
| US20120124329A1 (en) | 2010-11-17 | 2012-05-17 | Mccombs Edward M | Translation Lookaside Buffer Structure Including a Data Array Having an Integrated Multiplexer |
| US9916257B2 (en) * | 2011-07-26 | 2018-03-13 | Intel Corporation | Method and apparatus for TLB shoot-down in a heterogeneous computing system supporting shared virtual memory |
| GB2493340A (en) * | 2011-07-28 | 2013-02-06 | St Microelectronics Res & Dev | Address mapping of boot transactions between dies in a system in package |
| FR2979443B1 (fr) * | 2011-08-30 | 2013-09-27 | Maxim Integrated Products | Microcontroleur securise a base de mode |
| US20130179642A1 (en) * | 2012-01-10 | 2013-07-11 | Qualcomm Incorporated | Non-Allocating Memory Access with Physical Address |
| US9448960B2 (en) * | 2013-03-14 | 2016-09-20 | Linear Technology Corporation | Address translation in I2C data communications system |
| US9933980B2 (en) * | 2014-02-24 | 2018-04-03 | Toshiba Memory Corporation | NAND raid controller for connection between an SSD controller and multiple non-volatile storage units |
| US9720661B2 (en) | 2014-03-31 | 2017-08-01 | International Businesss Machines Corporation | Selectively controlling use of extended mode features |
| US9858058B2 (en) | 2014-03-31 | 2018-01-02 | International Business Machines Corporation | Partition mobility for partitions with extended code |
| US9569115B2 (en) | 2014-03-31 | 2017-02-14 | International Business Machines Corporation | Transparent code patching |
| US9824021B2 (en) | 2014-03-31 | 2017-11-21 | International Business Machines Corporation | Address translation structures to provide separate translations for instruction fetches and data accesses |
| US9256546B2 (en) | 2014-03-31 | 2016-02-09 | International Business Machines Corporation | Transparent code patching including updating of address translation structures |
| US9715449B2 (en) | 2014-03-31 | 2017-07-25 | International Business Machines Corporation | Hierarchical translation structures providing separate translations for instruction fetches and data accesses |
| US9483295B2 (en) | 2014-03-31 | 2016-11-01 | International Business Machines Corporation | Transparent dynamic code optimization |
| US9734083B2 (en) | 2014-03-31 | 2017-08-15 | International Business Machines Corporation | Separate memory address translations for instruction fetches and data accesses |
| DE102016108525B4 (de) * | 2016-05-09 | 2022-01-27 | Infineon Technologies Ag | Vorrichtung zur Verwendung beim Zugriff auf einen Speicher |
| US10503649B2 (en) | 2016-11-28 | 2019-12-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Integrated circuit and address mapping method for cache memory |
| US10402355B2 (en) * | 2017-02-08 | 2019-09-03 | Texas Instruments Incorporated | Apparatus and mechanism to bypass PCIe address translation by using alternative routing |
| US11221957B2 (en) | 2018-08-31 | 2022-01-11 | International Business Machines Corporation | Promotion of ERAT cache entries |
| US12267229B2 (en) | 2019-05-23 | 2025-04-01 | Hewlett Packard Enterprise Development Lp | System and method for facilitating data-driven intelligent network with endpoint congestion detection and control |
| TWI719786B (zh) | 2019-12-30 | 2021-02-21 | 財團法人工業技術研究院 | 資料處理系統與方法 |
| US11455110B1 (en) * | 2021-09-08 | 2022-09-27 | International Business Machines Corporation | Data deduplication |
| US20240012579A1 (en) * | 2022-07-06 | 2024-01-11 | Samsung Electronics Co., Ltd. | Systems, methods, and apparatus for data placement in a storage device |
| US12461683B2 (en) | 2022-07-06 | 2025-11-04 | Samsung Electronics Co., Ltd. | Systems, methods, and devices for reclaim unit formation and selection in a storage device |
| CN119724279A (zh) * | 2024-11-19 | 2025-03-28 | 新存微科技(北京)有限责任公司 | 地址处理系统及地址调节方法 |
Family Cites Families (43)
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| US4488228A (en) | 1982-12-03 | 1984-12-11 | Motorola, Inc. | Virtual memory data processor |
| US4524415A (en) | 1982-12-07 | 1985-06-18 | Motorola, Inc. | Virtual machine data processor |
| US4493035A (en) | 1982-12-07 | 1985-01-08 | Motorola, Inc. | Data processor version validation |
| US4635193A (en) | 1984-06-27 | 1987-01-06 | Motorola, Inc. | Data processor having selective breakpoint capability with minimal overhead |
| US4763250A (en) | 1985-04-01 | 1988-08-09 | Motorola, Inc. | Paged memory management unit having variable number of translation table levels |
| JPS62131352A (ja) * | 1985-12-04 | 1987-06-13 | Fujitsu Ltd | アドレス変換制御方式 |
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| US4763244A (en) | 1986-01-15 | 1988-08-09 | Motorola, Inc. | Paged memory management unit capable of selectively supporting multiple address spaces |
| US4890223A (en) | 1986-01-15 | 1989-12-26 | Motorola, Inc. | Paged memory management unit which evaluates access permissions when creating translator |
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| US5341500A (en) | 1991-04-02 | 1994-08-23 | Motorola, Inc. | Data processor with combined static and dynamic masking of operand for breakpoint operation |
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| US5388226A (en) | 1992-10-05 | 1995-02-07 | Motorola, Inc. | Method and apparatus for accessing a register in a data processing system |
| JPH07175663A (ja) * | 1993-12-16 | 1995-07-14 | Fuji Xerox Co Ltd | 情報処理装置の処理高速化方法 |
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| US5535351A (en) * | 1994-04-04 | 1996-07-09 | Motorola, Inc. | Address translator with by-pass circuit and method of operation |
| US6154826A (en) | 1994-11-16 | 2000-11-28 | University Of Virginia Patent Foundation | Method and device for maximizing memory system bandwidth by accessing data in a dynamically determined order |
| US6185657B1 (en) | 1998-04-20 | 2001-02-06 | Motorola Inc. | Multi-way cache apparatus and method |
| US6442664B1 (en) * | 1999-06-01 | 2002-08-27 | International Business Machines Corporation | Computer memory address translation system |
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| US6859875B1 (en) | 2000-06-12 | 2005-02-22 | Freescale Semiconductor, Inc. | Processor having selective branch prediction |
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| US6728859B1 (en) | 2001-07-13 | 2004-04-27 | Mips Technologies, Inc. | Programmable page table access |
| KR100450675B1 (ko) | 2002-03-19 | 2004-10-01 | 삼성전자주식회사 | 성능향상 및 전력소모를 감소시킬 수 있는 tlb |
| US6725289B1 (en) * | 2002-04-17 | 2004-04-20 | Vmware, Inc. | Transparent address remapping for high-speed I/O |
| JP4026753B2 (ja) * | 2002-07-25 | 2007-12-26 | 株式会社日立製作所 | 半導体集積回路 |
| US6829762B2 (en) * | 2002-10-10 | 2004-12-07 | International Business Machnies Corporation | Method, apparatus and system for allocating and accessing memory-mapped facilities within a data processing system |
| US6925542B2 (en) | 2003-03-21 | 2005-08-02 | Freescale Semiconductor, Inc. | Memory management in a data processing system |
| US6963963B2 (en) | 2003-03-25 | 2005-11-08 | Freescale Semiconductor, Inc. | Multiprocessor system having a shared main memory accessible by all processor units |
| US7243208B2 (en) | 2003-08-13 | 2007-07-10 | Renesas Technology Corp. | Data processor and IP module for data processor |
| US7159095B2 (en) | 2003-12-09 | 2007-01-02 | International Business Machines Corporation | Method of efficiently handling multiple page sizes in an effective to real address translation (ERAT) table |
| CN100426259C (zh) * | 2005-08-18 | 2008-10-15 | 北京中星微电子有限公司 | 一种存储器文件数据虚拟存取方法 |
-
2006
- 2006-02-23 US US11/360,926 patent/US7376807B2/en active Active
- 2006-04-28 US US11/413,430 patent/US7447867B2/en not_active Expired - Fee Related
-
2007
- 2007-01-29 CN CN2007800063456A patent/CN101390062B/zh not_active Expired - Fee Related
- 2007-01-29 WO PCT/US2007/061191 patent/WO2007117746A2/en not_active Ceased
- 2007-01-29 JP JP2008556490A patent/JP5144542B2/ja not_active Expired - Fee Related
- 2007-01-30 TW TW096103283A patent/TW200817900A/zh unknown
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