CN101390062B - 具有地址转换旁路的数据处理系统及其方法 - Google Patents

具有地址转换旁路的数据处理系统及其方法 Download PDF

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Publication number
CN101390062B
CN101390062B CN2007800063456A CN200780006345A CN101390062B CN 101390062 B CN101390062 B CN 101390062B CN 2007800063456 A CN2007800063456 A CN 2007800063456A CN 200780006345 A CN200780006345 A CN 200780006345A CN 101390062 B CN101390062 B CN 101390062B
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address
logical address
bypass
logical
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CN101390062A (zh
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W·C.·莫耶
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Lanbushi Co
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Freescale Semiconductor Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
CN2007800063456A 2006-02-23 2007-01-29 具有地址转换旁路的数据处理系统及其方法 Expired - Fee Related CN101390062B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/360,926 2006-02-23
US11/360,926 US7376807B2 (en) 2006-02-23 2006-02-23 Data processing system having address translation bypass and method therefor
PCT/US2007/061191 WO2007117746A2 (en) 2006-02-23 2007-01-29 Data processing system having address translation bypass and method therefor

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CN101390062A CN101390062A (zh) 2009-03-18
CN101390062B true CN101390062B (zh) 2011-02-23

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US (2) US7376807B2 (enExample)
JP (1) JP5144542B2 (enExample)
CN (1) CN101390062B (enExample)
TW (1) TW200817900A (enExample)
WO (1) WO2007117746A2 (enExample)

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Also Published As

Publication number Publication date
US7376807B2 (en) 2008-05-20
WO2007117746A3 (en) 2008-10-30
US20070198804A1 (en) 2007-08-23
TW200817900A (en) 2008-04-16
WO2007117746A2 (en) 2007-10-18
US7447867B2 (en) 2008-11-04
US20070198805A1 (en) 2007-08-23
JP2009527861A (ja) 2009-07-30
JP5144542B2 (ja) 2013-02-13
CN101390062A (zh) 2009-03-18

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