JP2009521131A - 半導体装置とその形成方法 - Google Patents
半導体装置とその形成方法 Download PDFInfo
- Publication number
- JP2009521131A JP2009521131A JP2008550308A JP2008550308A JP2009521131A JP 2009521131 A JP2009521131 A JP 2009521131A JP 2008550308 A JP2008550308 A JP 2008550308A JP 2008550308 A JP2008550308 A JP 2008550308A JP 2009521131 A JP2009521131 A JP 2009521131A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor
- region
- semiconductor region
- layer
- concentration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/65—Lateral DMOS [LDMOS] FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0221—Manufacture or treatment of FETs having insulated gates [IGFET] having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended-drain MOSFETs [EDMOS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
- H10D30/0281—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of lateral DMOS [LDMOS] FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs
- H10D30/603—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/113—Isolations within a component, i.e. internal isolations
- H10D62/115—Dielectric isolations, e.g. air gaps
- H10D62/116—Dielectric isolations, e.g. air gaps adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/351—Substrate regions of field-effect devices
- H10D62/357—Substrate regions of field-effect devices of FETs
- H10D62/364—Substrate regions of field-effect devices of FETs of IGFETs
- H10D62/371—Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/264,068 US7276419B2 (en) | 2005-10-31 | 2005-10-31 | Semiconductor device and method for forming the same |
| PCT/US2006/040873 WO2008076092A2 (en) | 2005-10-31 | 2006-10-18 | Semiconductor device and method for forming the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2009521131A true JP2009521131A (ja) | 2009-05-28 |
| JP2009521131A5 JP2009521131A5 (enExample) | 2009-12-03 |
Family
ID=37995144
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008550308A Pending JP2009521131A (ja) | 2005-10-31 | 2006-10-18 | 半導体装置とその形成方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US7276419B2 (enExample) |
| EP (1) | EP1966826A4 (enExample) |
| JP (1) | JP2009521131A (enExample) |
| KR (1) | KR20080073313A (enExample) |
| TW (1) | TWI409946B (enExample) |
| WO (1) | WO2008076092A2 (enExample) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010258226A (ja) * | 2009-04-24 | 2010-11-11 | Renesas Electronics Corp | 半導体装置およびその製造方法 |
| JP2011108758A (ja) * | 2009-11-13 | 2011-06-02 | Fujitsu Semiconductor Ltd | 高耐圧mosトランジスタおよび半導体集積回路装置、高耐圧半導体装置 |
| JP2013145792A (ja) * | 2012-01-13 | 2013-07-25 | Toshiba Corp | 半導体装置 |
| JP2014143363A (ja) * | 2013-01-25 | 2014-08-07 | Rohm Co Ltd | nチャネル二重拡散MOS型トランジスタおよび半導体複合素子 |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100875159B1 (ko) * | 2007-05-25 | 2008-12-22 | 주식회사 동부하이텍 | 반도체 소자 및 그의 제조 방법 |
| KR20090007053A (ko) * | 2007-07-13 | 2009-01-16 | 매그나칩 반도체 유한회사 | 고전압 소자 및 그 제조방법 |
| JP5338433B2 (ja) * | 2008-09-30 | 2013-11-13 | 富士電機株式会社 | 窒化ガリウム半導体装置およびその製造方法 |
| US8471340B2 (en) * | 2009-11-30 | 2013-06-25 | International Business Machines Corporation | Silicon-on-insulator (SOI) structure configured for reduced harmonics and method of forming the structure |
| US8698244B2 (en) * | 2009-11-30 | 2014-04-15 | International Business Machines Corporation | Silicon-on-insulator (SOI) structure configured for reduced harmonics, design structure and method |
| TWI668864B (zh) | 2018-08-09 | 2019-08-11 | 江啟文 | 具有電流路徑方向控制的半導體結構 |
| CN117457747B (zh) * | 2023-12-22 | 2024-06-04 | 粤芯半导体技术股份有限公司 | 一种嵌入式闪存工艺的demos结构及其制备方法 |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000260988A (ja) * | 1999-03-12 | 2000-09-22 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
| JP2001168210A (ja) * | 1999-10-27 | 2001-06-22 | Texas Instr Inc <Ti> | 集積回路用ドレイン拡張型トランジスタ |
| JP2003197791A (ja) * | 2001-12-28 | 2003-07-11 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
| WO2004042826A2 (en) * | 2002-10-31 | 2004-05-21 | Freescale Semiconductor, Inc. | Semiconductor component comprising a resur transistor and method of manufacturing same |
| JP2007027641A (ja) * | 2005-07-21 | 2007-02-01 | Toshiba Corp | 半導体装置及びその製造方法 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5387553A (en) * | 1992-03-24 | 1995-02-07 | International Business Machines Corporation | Method for forming a lateral bipolar transistor with dual collector, circular symmetry and composite structure |
| US6573562B2 (en) * | 2001-10-31 | 2003-06-03 | Motorola, Inc. | Semiconductor component and method of operation |
| KR100958421B1 (ko) * | 2002-09-14 | 2010-05-18 | 페어차일드코리아반도체 주식회사 | 전력 소자 및 그 제조방법 |
| US6693339B1 (en) * | 2003-03-14 | 2004-02-17 | Motorola, Inc. | Semiconductor component and method of manufacturing same |
-
2005
- 2005-10-31 US US11/264,068 patent/US7276419B2/en active Active
-
2006
- 2006-10-18 EP EP06851955.2A patent/EP1966826A4/en not_active Withdrawn
- 2006-10-18 JP JP2008550308A patent/JP2009521131A/ja active Pending
- 2006-10-18 KR KR1020087013091A patent/KR20080073313A/ko not_active Ceased
- 2006-10-18 WO PCT/US2006/040873 patent/WO2008076092A2/en not_active Ceased
- 2006-10-30 TW TW095139951A patent/TWI409946B/zh not_active IP Right Cessation
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000260988A (ja) * | 1999-03-12 | 2000-09-22 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
| JP2001168210A (ja) * | 1999-10-27 | 2001-06-22 | Texas Instr Inc <Ti> | 集積回路用ドレイン拡張型トランジスタ |
| JP2003197791A (ja) * | 2001-12-28 | 2003-07-11 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
| WO2004042826A2 (en) * | 2002-10-31 | 2004-05-21 | Freescale Semiconductor, Inc. | Semiconductor component comprising a resur transistor and method of manufacturing same |
| JP2007027641A (ja) * | 2005-07-21 | 2007-02-01 | Toshiba Corp | 半導体装置及びその製造方法 |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010258226A (ja) * | 2009-04-24 | 2010-11-11 | Renesas Electronics Corp | 半導体装置およびその製造方法 |
| JP2011108758A (ja) * | 2009-11-13 | 2011-06-02 | Fujitsu Semiconductor Ltd | 高耐圧mosトランジスタおよび半導体集積回路装置、高耐圧半導体装置 |
| JP2013145792A (ja) * | 2012-01-13 | 2013-07-25 | Toshiba Corp | 半導体装置 |
| JP2014143363A (ja) * | 2013-01-25 | 2014-08-07 | Rohm Co Ltd | nチャネル二重拡散MOS型トランジスタおよび半導体複合素子 |
| US9812565B2 (en) | 2013-01-25 | 2017-11-07 | Rohm Co., Ltd. | N-channel double diffusion MOS transistor with p-type buried layer underneath n-type drift and drain layers, and semiconductor composite device |
Also Published As
| Publication number | Publication date |
|---|---|
| EP1966826A4 (en) | 2013-06-19 |
| WO2008076092A2 (en) | 2008-06-26 |
| US20070096225A1 (en) | 2007-05-03 |
| TWI409946B (zh) | 2013-09-21 |
| EP1966826A2 (en) | 2008-09-10 |
| WO2008076092A3 (en) | 2009-02-12 |
| TW200725889A (en) | 2007-07-01 |
| US7276419B2 (en) | 2007-10-02 |
| KR20080073313A (ko) | 2008-08-08 |
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