JP2009218363A - Feedthrough multilayer capacitor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a feedthrough multilayer capacitor for suppressing increase of direct current (DC) resistance while suppressing increase of static capacitance. <P>SOLUTION: Within a capacitor material L1, there are arranged: internal electrodes 30 to 36 for signal including main electrodes 30a to 36a for signal and the first and the second lead electrodes 30b-36b and 30c-36c for signal extended to be led to the external surface of the capacitor material L1; and internal electrodes 20, 21 for grounding including main electrodes 20a, 21a for grounding and lead electrodes 20b, 21b, 20c, 21c for grounding extended to be led to the external surface of the capacitor material L1. The main electrodes 30a to 32a, 34a to 36a for signal of the internal electrodes 30 to 32, 34 to 36 for signal include regions opposing to other main electrodes for signal holding dielectric material layers 11, 12, 17, and 18 among these electrodes. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a feedthrough multilayer capacitor.

As a feedthrough multilayer capacitor, a capacitor body in which dielectric layers, signal internal electrodes, and ground internal electrodes are alternately stacked, and a signal terminal electrode and a ground terminal electrode formed on the capacitor body are provided. What was provided is known (for example, refer patent document 1).
Japanese Patent Laid-Open No. 01-206615

  An object of the present invention is to provide a feedthrough multilayer capacitor capable of suppressing an increase in DC resistance while suppressing an increase in capacitance.

  By the way, in a general feedthrough multilayer capacitor, when the direct current resistance increases, the heat generated from the capacitor increases. Thus, as a result of intensive studies to suppress the increase in DC resistance, the present inventors can reduce the DC resistance of the feedthrough multilayer capacitor by increasing the number of signal internal electrodes. I came to find the fact.

  However, if the number of internal electrodes arranged in the capacitor body is increased so that the number of signal internal electrodes is increased, the capacitance of the feedthrough multilayer capacitor is increased. When the capacitance of the feedthrough multilayer capacitor increases, it becomes difficult to cope with higher frequencies.

  Accordingly, the present inventors have further conducted intensive research on a feedthrough multilayer capacitor that can satisfy both requirements of suppression of capacitance and suppression of DC resistance. As a result, the present inventors find a new fact that both the capacitance and the DC resistance are suppressed by increasing the number of signal internal electrodes and making the signal internal electrodes face each other. It came to.

  Based on the research results, the feedthrough multilayer capacitor according to the present invention has a rectangular first and second main surfaces facing each other and a relative extension extending so as to connect the first and second main surfaces. First and second side surfaces facing each other and opposing third and fourth side surfaces extending so as to connect the first and second main surfaces as outer surfaces, and having dielectric properties , A first number of signal internal electrodes and a second number of ground internal electrodes disposed in the capacitor body, and first and second disposed on the outer surface of the capacitor body. Signal terminal electrodes and grounding terminal electrodes, and each signal internal electrode extends so as to be drawn from the signal main electrode portion and the signal main electrode portion to the outer surface of the capacitor body. A first signal lead electrode portion connected to the first signal terminal electrode; A second signal lead electrode portion extending from the signal main electrode portion to be drawn to the outer surface of the capacitor element body and connected to the second signal terminal electrode. A grounding main electrode portion; and a grounding lead electrode portion extending from the grounding main electrode portion to be drawn to the outer surface of the capacitor body and connected to the grounding terminal electrode, and the first number of signals The signal main electrode portion of at least one signal internal electrode of the internal electrode for use is at least one of the second number of ground internal electrodes with a first dielectric region that is a part of the capacitor body interposed therebetween. The signal main electrode portion of the at least one signal internal electrode of the first number of signal internal electrodes is a part of the capacitor element body and has a region facing the ground main electrode portion of the ground internal electrode. Of another signal internal electrode with a second dielectric region in between It has issue for main electrode area opposed to, the first number may be greater than the second number.

  In this feedthrough multilayer capacitor, the number of signal internal electrodes (first number) is larger than the number of ground internal electrodes (second number). Therefore, in this feedthrough multilayer capacitor, it is possible to suppress an increase in DC resistance. The signal main electrode portion of at least one signal internal electrode of the signal internal electrode is opposed to the signal main electrode portion of another signal internal electrode with the second dielectric region of the capacitor body interposed therebetween. It has the area to do. Therefore, in this feedthrough multilayer capacitor, it is possible to suppress an increase in capacitance even if the number of signal internal electrodes (first number) is increased.

  Each of the grounding inner electrodes is a quarter of the distance from the first main surface of the capacitor element body when the first and second main surfaces face each other when viewed in the opposing direction of the first and second main surfaces. It is preferable to arrange in the area up to the distance or in the area up to a quarter distance from the second main surface of the distance where the first and second main surfaces face each other. Each grounding internal electrode has a first main surface side or a second main surface side relative to any of the first number of signal internal electrodes when viewed in the opposing direction of the first and second main surfaces. It is preferable to arrange | position.

  In these cases, since the grounding inner electrode is disposed at a position close to the outer surface of the capacitor body, when the capacitor body is manufactured by barrel polishing, the grounding inner electrode is pulled out to the outer surface of the capacitor body. It becomes easy to be. In the feedthrough multilayer capacitor, since the number of grounding internal electrodes is smaller than that of the signal internal electrodes, the grounding internal electrodes are preferably connected to the grounding terminal electrode easily and reliably.

  The length of the first dielectric region in the opposing direction of the first and second main surfaces is preferably longer than the length of the second dielectric region in the opposing direction of the first and second main surfaces. In this case, since the distance between the signal internal electrode and the ground internal electrode is longer than the distance between the signal internal electrodes, the ground internal electrode is easily disposed outside the capacitor body. By disposing the grounding internal electrode outside the capacitor body, the grounding internal electrode is easily and reliably connected to the grounding terminal electrode.

  The first and second signal terminal electrodes are respectively disposed on the first or second side surface, and the first signal lead electrode portion of each signal internal electrode is formed by the first signal terminal electrode. The second signal lead-out electrode portion of each signal internal electrode extends so as to be drawn out to the arranged first or second side face, and the second signal terminal electrode is arranged in the first or second side. You may extend so that it may be pulled out to the side. In this case, it is easy to form land patterns on the substrate connected to the first and second signal terminal electrodes which are signal input / output terminals.

  In each signal internal electrode, the width of the signal main electrode portion in the opposing direction of the third and fourth side surfaces and the width of the first signal lead-out electrode portion in the opposing direction of the third and fourth side surfaces It is preferable that the width of the second signal extraction electrode portion in the opposing direction of the third and fourth side surfaces is the same. In this case, the connection between the signal internal electrode and the signal terminal electrode can be more reliably realized.

  In each signal internal electrode, the width of the signal main electrode portion in the opposing direction of the third and fourth side surfaces is the width of the first signal extraction electrode portion in the opposing direction of the third and fourth side surfaces. In addition, it is preferable that the width of the second signal extraction electrode portion is wider than the width of the second signal extraction electrode portion in the opposing direction of the third and fourth side surfaces. In this case, the width of the first and second signal terminal electrodes can be reduced. As a result, occurrence of a short circuit between the signal terminal electrode and the ground terminal electrode on the outer surface of the capacitor body is suppressed.

  The width of the signal main electrode portion in the opposing direction of the third and fourth side surfaces is preferably wider than the width of the grounding main electrode portion in the opposing direction of the third and fourth side surfaces. Thus, by increasing the width of the signal main electrode portion, the direct current resistance of the feedthrough multilayer capacitor is suppressed from increasing. In addition, by increasing the width of the signal main electrode portion, in this feedthrough multilayer capacitor, the electrostatic capacitance formed between the signal main electrode portion and the ground main electrode portion is smaller in the signal main electrode portion. In other words, it is defined by the size of the main electrode portion for grounding. For this reason, even if the signal internal electrode and the ground internal electrode are arranged out of the desired position, the capacitance formed between them is ultimately determined by the size of the ground main electrode portion. The deviation from the desired value is suppressed. As a result, variation in capacitance between feedthrough multilayer capacitors is suppressed.

  The ground terminal electrode is disposed on the third or fourth side surface, and the ground lead electrode portion of the ground internal electrode is led out to the third or fourth side surface on which the ground terminal electrode is disposed. The width of the ground lead electrode portion in the opposing direction of the first and second side surfaces is the width of the first signal lead electrode portion in the opposing direction of the third and fourth side surfaces, and the third and It is preferable that the width is larger than any of the widths of the second signal extraction electrode portions in the opposing direction of the fourth side surface. In this case, the value of the equivalent series inductance (ESL) can be reduced.

  According to the present invention, it is possible to provide a feedthrough multilayer capacitor capable of suppressing an increase in DC resistance while suppressing an increase in capacitance.

Hereinafter, preferred embodiments will be described in detail with reference to the accompanying drawings. In the description, the same reference numerals are used for the same elements or elements having the same function, and redundant description is omitted.
(First embodiment)

  The structure of the feedthrough multilayer capacitor according to the first embodiment will be described with reference to FIGS. FIG. 1 is a perspective view of the feedthrough multilayer capacitor according to the present embodiment. 2 is a cross-sectional view of the feedthrough multilayer capacitor shown in FIG. 1 taken along the line II-II. 3 is a cross-sectional view of the feedthrough multilayer capacitor shown in FIG. 1 taken along the line III-III. FIG. 4 is an exploded perspective view of the capacitor body included in the feedthrough multilayer capacitor according to the first embodiment.

  As shown in FIG. 1, the feedthrough multilayer capacitor C1 includes a capacitor body L1 having dielectric characteristics, first and second signal terminal electrodes 1 and 2, and first and second signal terminal electrodes 1 and 2 disposed on the outer surface of the capacitor body L1. 1 and second grounding terminal electrodes 3 and 4.

  As shown in FIG. 1, the capacitor body L1 has a rectangular parallelepiped shape, and has rectangular first and second main faces L1a and L1b opposite to each other as outer surfaces thereof, and first and second main faces. The opposing first and second side faces L1c, L1d extending in the short side direction of the first and second main faces and the first and second main faces are connected so as to connect the faces. As described above, the first and second main surfaces have opposite third and fourth side faces L1e and L1f extending in the long side direction.

  The first signal terminal electrode 1 is disposed on the first side face L1c of the capacitor body L1. The first signal terminal electrode 1 covers the entire surface of the first side face L1c so that the first and second main faces L1a and L1b and the end portions of the third and fourth side faces L1e and L1f (first (The end on the side face L1c side). The second signal terminal electrode 2 is disposed on the second side face L1d of the capacitor body L1. The second signal terminal electrode 2 covers the entire surface of the second side face L1d, and ends of the first and second main faces L1a, L1b and the third and fourth side faces L1e, L1f (second (The end on the side face L1d side).

  The first signal terminal electrode 1 and the second signal terminal electrode 2 face each other in the direction in which the first side face L1c and the second side face L1d face each other.

  The first ground terminal electrode 3 is disposed on the third side face L1e of the capacitor body L1. The first ground terminal electrode 3 has a part of the substantially central portion in the opposing direction of the first and second side faces L1c, L1d of the third side face L1e and the first and second main faces L1a, L1b. It covers so as to cross along the direction. The first ground terminal electrode 3 further covers part of the end portions of the first and second main surfaces L1a and L1b on the third side face L1e side.

  The second ground terminal electrode 4 is disposed on the fourth side face L1f of the capacitor body L1. The second grounding terminal electrode 4 has a part of the substantially central portion in the opposing direction of the first and second side faces L1c, L1d of the fourth side face L1f, and the first and second main faces L1a, L1b. It covers so as to cross along the direction. The second ground terminal electrode 4 further covers part of the end portions of the first and second main surfaces L1a and L1b on the fourth side face L1f side.

  The first ground terminal electrode 3 and the second ground terminal electrode 4 face each other in the direction in which the third side face L1e and the fourth side face L1f face each other.

  The first and second signal terminal electrodes 1 and 2 and the first and second ground terminal electrodes 3 and 4 are made of, for example, conductive paste containing conductive metal powder and glass frit on the outer surface of the capacitor body. Formed by applying and baking. If necessary, a plating layer may be formed on the baked terminal electrode. The first and second signal terminal electrodes 1 and 2 and the first and second ground terminal electrodes 3 and 4 are formed on the surface of the capacitor body L1 so as to be electrically insulated from each other. Yes.

  In the feedthrough multilayer capacitor C1, the first main surface L1a or the second main surface L1b is preferably mounted on a circuit board or the like as a mounting surface for other components (for example, a circuit board or an electronic component). For example, when the feedthrough multilayer capacitor C1 is mounted so that the second main surface L1b of the capacitor body L1 faces the circuit board, the first and second signal terminal electrodes 1 and 2 are formed on the board. The third and fourth grounding terminal electrodes 3 and 4 are formed on the substrate and connected to the ground electrode connected to the ground wiring.

As shown in FIGS. 2 to 4, the capacitor body L <b> 1 includes a plurality (10 layers in this embodiment) of dielectric layers 10 stacked in the opposing direction of the first and second main surfaces L <b> 1 a and L <b> 1 b. ~ 19. Each of the dielectric layers 10 to 19 is made of a ceramic green sheet containing dielectric ceramic (dielectric ceramic such as BaTiO ₃ series, Ba (Ti, Zr) O ₃ series, or (Ba, Ca) TiO ₃ series). Consists of union. Note that the actual capacitor body L1 is integrated so that the boundary between the dielectric layers 10 to 19 is not visible.

  As shown in FIGS. 2 to 4, the dielectric layers 13 to 16 are opposed to the first and second main surfaces L1a and L1b in comparison with the dielectric layers 10 to 12 and 17 to 19. Thick. Each of the dielectric layers 10 to 19 may be composed of a sintered body of a single ceramic green sheet or may be composed of a sintered body of a plurality of ceramic green sheets. Therefore, even if the dielectric layers 13 to 16 are made of a sintered body of ceramic green sheets having a large number of laminated layers, the dielectric layers 13 to 16 are thicker than the dielectric layers 10 to 12 and 17 to 19. Alternatively, it may be thicker than the dielectric layers 10 to 12 and 17 to 19 by being composed of a sintered body of one ceramic green sheet having a large thickness.

  A first number (seven layers in this embodiment) of signal internal electrodes 30 to 36 and a second number (two layers in this embodiment) of grounding internal electrodes 20 and 21 are arranged on the capacitor body L1. Has been. The first number that is the number of the signal internal electrodes 30 to 36 is larger than the second number that is the number of the grounding internal electrodes 20 and 21.

  Each of the signal internal electrodes 30 to 36 has a signal main electrode portion 30a to 36a and a first signal signal extending so as to be drawn from the signal main electrode portions 30a to 36a to the first side face L1c of the capacitor body L1. The lead electrode portions 30b to 36b and the second signal lead electrode portions 30c to 36c extending so as to be drawn from the signal main electrode portions 30a to 36a to the second side face L1d of the capacitor body L1. The signal main electrode portions 30a to 36a, the first signal lead electrode portions 30b to 36b, and the second signal lead electrode portions 30c to 36c are integrally formed.

  The signal main electrode portions 30a to 36a have a rectangular shape in which the opposing direction of the first and second side faces L1c and L1d is the long side direction and the opposing direction of the third and fourth side faces L1e and L1f is the short side direction. Presents.

  The first signal extraction electrode portions 30b to 36b extend from the ends of the signal main electrode portions 30a to 36a on the first side face L1c side. The first signal extraction electrode portions 30b to 36b have the same width in the opposing direction of the signal main electrode portions 30a to 36a and the third and fourth side faces L1e and L1f. The ends of the first signal lead electrode portions 30b to 36b are exposed at the first side face L1c, and the exposed end portions are connected to the first signal terminal electrode 1.

  The second signal lead electrode portions 30c to 36c extend from the end portions on the second side face L1d side of the signal main electrode portions 30a to 36a. The second signal extraction electrode portions 30c to 36c have the same width in the opposing direction of the signal main electrode portions 30a to 36a and the third and fourth side faces L1e and L1f. The ends of the second signal lead electrode portions 30c to 36c are exposed at the second side face L1d, and the exposed end portions are connected to the second signal terminal electrode 2.

  The first signal terminal electrode 1 is formed so as to cover all the exposed portions of the first signal lead electrode portions 30b to 36b on the first side face L1c, and the first signal lead electrode portion 30b. ˜36b are physically and electrically connected to the first signal terminal electrode 1. As a result, the signal internal electrodes 30 to 36 are connected to the first signal terminal electrode 1.

  The second signal terminal electrode 2 is formed so as to cover all the portions exposed to the second side face L1d of the second signal lead electrode portions 30c to 36c, and the second signal lead electrode portion 30c. ˜36c are physically and electrically connected to the second signal terminal electrode 2. As a result, the signal internal electrodes 30 to 36 are connected to the second signal terminal electrode 2.

  Each of the grounding internal electrodes 20 and 21 is connected to the grounding main electrode parts 20a and 21a and the first grounding electrode extending so as to be drawn from the grounding main electrode parts 20a and 21a to the third side face L1e of the capacitor body L1. The lead electrode portions 20b and 21b and the second ground lead electrode portions 20c and 21c extending so as to be drawn from the ground main electrode portions 20a and 21a to the fourth side face L1f of the capacitor body L1. The grounding main electrode portions 20a and 21a, the first grounding lead electrode portions 20b and 21b, and the second ground lead electrode portions 20c and 21c are integrally formed.

  The grounding main electrode portions 20a and 21a have a rectangular shape in which the opposing direction of the first and second side faces L1c and L1d is the long side direction and the opposing direction of the third and fourth side faces L1e and L1f is the short side direction. Presents.

  The first ground lead electrode portions 20b and 21b extend from substantially the center of the long side which is the end portion on the third side face L1e side of the ground main electrode portions 20a and 21a. The first ground lead electrode portions 20b and 21b have a smaller width in the facing direction of the first and second side faces L1c and L1d than the ground main electrode portions 20a and 21a. The ends of the first ground lead electrode portions 20b and 21b are exposed at the third side face L1e, and are connected to the first ground terminal electrode 3 at the exposed end portions.

  The second ground lead electrode portions 20c, 21c extend from the approximate center of the long side, which is the end portion on the fourth side face L1f side of the ground main electrode portions 20a, 21a. The second ground lead electrode portions 20c and 21c have a smaller width in the facing direction of the first and second side faces L1c and L1d than the ground main electrode portions 20a and 21a. The ends of the second ground lead electrode portions 20c and 21c are exposed at the fourth side face L1f, and the exposed end portions are connected to the second ground terminal electrode 4.

  The first ground terminal electrode 3 is formed so as to cover all the exposed portions of the first ground lead electrode portions 20b and 21b on the third side face L1e, and the first ground lead electrode portion 20b. , 21 b are physically and electrically connected to the first ground terminal electrode 3. As a result, the grounding internal electrodes 20 and 21 are connected to the first grounding terminal electrode 3.

  The second ground terminal electrode 4 is formed so as to cover all the exposed portions of the second ground lead electrode portions 20c, 21c on the fourth side face L1f, and the second ground lead electrode portion 20c. , 21 c are physically and electrically connected to the second ground terminal electrode 4. As a result, the grounding internal electrodes 20 and 21 are connected to the second grounding terminal electrode 4.

  In the present embodiment, the signal internal electrodes 30 to 36 and the grounding internal electrodes 20 and 21 are positioned substantially at the center along the opposing direction of the first and second main surfaces L1a and L1b. The grounding internal electrodes 20, 21 are located on both sides of the grounding internal electrodes 20, and the signal internal electrodes 32, 31, 30 are arranged from the grounding internal electrode 20 toward the first main surface L1a. Signal internal electrodes 34, 35, and 36 are arranged toward the second main surface L1b.

  The signal main electrode portion 32a of the signal internal electrode 32 has the dielectric layer 13 (first dielectric region) that is a part of the capacitor body L1 interposed therebetween, and the ground main electrode of the ground internal electrode 20 is interposed therebetween. It includes regions facing each other in the stacking direction of the portion 20a and the dielectric layers 10-19 (opposing directions of the first and second main faces L1a, L1b). That is, the signal internal electrode 32 and the ground internal electrode 20 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b. Therefore, a portion of the dielectric layer 13 that overlaps the signal main electrode portion 32a of the signal internal electrode 32 and the ground main electrode portion 20a of the ground internal electrode 20 substantially generates a capacitance component. It is an area.

  The signal main electrode portion 33a of the signal internal electrode 33 has a dielectric layer 14 (first dielectric region) that is a part of the capacitor body L1 and sandwiches the ground main electrode of the ground internal electrode 20 therebetween. It includes regions facing each other in the stacking direction of the portion 20a and the dielectric layers 10-19. That is, the signal internal electrode 33 and the ground internal electrode 20 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b. Therefore, a portion of the dielectric layer 14 that overlaps the signal main electrode portion 33a of the signal internal electrode 33 and the ground main electrode portion 20a of the ground internal electrode 20 substantially generates a capacitance component. It is an area.

  The signal main electrode portion 33a of the signal internal electrode 33 is a ground main electrode of the ground internal electrode 21 with the dielectric layer 15 (first dielectric region) which is a part of the capacitor body L1 interposed therebetween. The region 21a and the dielectric layers 10 to 19 include regions facing each other in the stacking direction. That is, the signal internal electrode 33 and the ground internal electrode 21 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b. Therefore, a portion of the dielectric layer 15 that overlaps the signal main electrode portion 33a of the signal internal electrode 33 and the ground main electrode portion 21a of the ground internal electrode 21 substantially generates a capacitance component. It is an area.

  The signal main electrode portion 34a of the signal internal electrode 34 has the dielectric layer 16 (first dielectric region) which is a part of the capacitor body L1 interposed therebetween, and the ground main electrode of the ground internal electrode 21 is sandwiched therebetween. The region 21a and the dielectric layers 10 to 19 include regions facing each other in the stacking direction. That is, the signal internal electrode 34 and the ground internal electrode 21 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b. Therefore, a portion of the dielectric layer 16 that overlaps the signal main electrode portion 34a of the signal internal electrode 34 and the ground main electrode portion 21a of the ground internal electrode 21 substantially generates a capacitance component. It is an area.

  The signal main electrode portion 30a of the signal internal electrode 30 is a signal main electrode portion of the signal internal electrode 31 with a dielectric layer 11 (second dielectric region) that is a part of the capacitor body L1 interposed therebetween. 31a and a region facing each other. That is, the signal internal electrodes 30 and 31 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b.

  The signal main electrode portion 31a of the signal internal electrode 31 is a signal main electrode portion of the signal internal electrode 32 with the dielectric layer 12 (second dielectric region) which is a part of the capacitor body L1 interposed therebetween. 32a and a region facing each other. That is, the signal internal electrodes 31 and 32 have regions overlapping each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b.

  The signal main electrode portion 34a of the signal internal electrode 34 is a signal main electrode portion of the signal internal electrode 35 with the dielectric layer 17 (second dielectric region) which is a part of the capacitor body L1 interposed therebetween. 35a and a region facing each other. That is, the signal internal electrodes 34 and 35 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b.

  The signal main electrode portion 35a of the signal internal electrode 35 is a signal main electrode portion of the signal internal electrode 36 with the dielectric layer 18 (second dielectric region) which is a part of the capacitor body L1 interposed therebetween. 36a and a region facing each other. That is, the signal internal electrodes 35 and 36 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b.

  As apparent from FIGS. 2 and 3, the first dielectric region, that is, the first of the dielectric layers 13 to 16, which is a part of the capacitor body located between the signal internal electrode and the ground internal electrode. And the length of the second main surfaces L1a and L1b in the opposing direction is a second dielectric region that is a part of the capacitor body located between the signal internal electrodes, that is, the dielectric layers 11, 12, 17 and 18 are longer than the length in the opposing direction of the first and second main surfaces L1a and L1b.

As shown in FIG. 4, the third and fourth side faces L1e, grounding main electrode portion 20a in the opposing direction of L1f, 21a width of the _{d 1,} third and fourth side faces L1e, opposing direction of L1f When the width of the signal main electrode 30a~36a and _{d 2} at, _{d 1} and _{d 2} in the present embodiment is substantially the same.

  In the feedthrough multilayer capacitor C1, the number of signal internal electrodes 30 to 36 (first number) is seven layers, and the number of grounding internal electrodes 20, 21 (second number) is two layers. That is, the first number is greater than the second number. Therefore, the feedthrough multilayer capacitor C1 can suppress an increase in DC resistance.

  In the feedthrough multilayer capacitor C1, the large number of signal internal electrodes 30 to 36 are signal main electrode portions 30a, 31a, 35a, 36a of the signal internal electrodes 30, 31, 35, 36, which are a part of the signal internal electrodes 30-36. However, it has the area | region which opposes on both sides of the dielectric material layers 11, 12, 17, and 18 which are the 2nd dielectric material area | regions of the capacitor | condenser body L1. Therefore, in the feedthrough multilayer capacitor C1, it is possible to prevent the capacitance from increasing even if the number of signal internal electrodes is increased to suppress an increase in DC resistance.

  In a general feedthrough capacitor, an arrangement in which only one of the signal internal electrode and the ground internal electrode is increased and the internal electrodes of the same type are opposed to each other does not contribute to the formation of the capacitance. Do not do it. In the feedthrough multilayer capacitor C1 according to the present embodiment, the DC resistance is increased while suppressing an increase in capacitance by intentionally adopting the above-described arrangement that is not employed in a normal feedthrough multilayer capacitor. It is possible to suppress.

  In the feedthrough multilayer capacitor C1, the thicknesses (lengths) of the dielectric layers 13 to 16 in the opposing direction of the first and second main surfaces L1a and L1b are the first and second dielectric layers 11, 12, 17, and 18. It is thicker (longer) than the thickness (length) in the facing direction of the first and second main faces L1a, L1b. Therefore, the distance between the signal internal electrodes 32-34 and the ground internal electrodes 20, 21 is longer than the distance between the signal internal electrodes 30-32, 34-36. 21 is easily disposed outside the capacitor body L1.

  Capacitor body L1 is generally barrel-polished after sintering and before terminal electrodes are formed on the outer surface. In the barrel polishing, the polishing progresses toward the outer side of the capacitor body L1, and the extraction electrode portion extended so as to be drawn out to the side surface is more easily exposed to the outer surface. Therefore, by arranging the grounding inner electrodes 20 and 21 outside the capacitor body L1, the grounding inner electrodes 20 and 21 can be easily and reliably connected to the first and second grounding terminal electrodes 3 and 4. It becomes easy to be connected.

In the feedthrough multilayer capacitor C1, in the signal internal electrodes 30 to 36, the widths of the signal main electrode portions 30a to 36a and the third and fourth side surfaces L1e in the opposing direction of the third and fourth side faces L1e and L1f. , The widths of the first signal lead electrode portions 30b to 36b in the facing direction of L1f and the widths of the second signal lead electrode portions 30c to 36c in the facing direction of the third and fourth side faces L1e and L1f Are the same. Therefore, the connection between the signal internal electrodes 30 to 36 and the first and second signal terminal electrodes 1 and 2 can be more reliably realized.
As described above, the feedthrough multilayer capacitor C1 according to the present embodiment extends so as to connect the opposing first and second main surfaces of the rectangular shape and the first and second main surfaces. The first and second side surfaces facing each other and the third and fourth side surfaces facing each other extending so as to connect the first and second main surfaces as outer surfaces, and A capacitor body having dielectric characteristics, a plurality of signal internal electrodes, a group of signal internal electrodes disposed in the capacitor body, a grounding internal electrode disposed in the capacitor body, and the capacitor First and second signal terminal electrodes and grounding terminal electrodes disposed on the outer surface of the element body, and the signal internal electrode group and the grounding internal electrode include the first and second grounding terminal electrodes. And juxtaposed along the opposing direction of the second main surface, The signal internal electrode includes a signal main electrode portion, and a first signal electrode extending from the signal main electrode portion so as to be drawn to the outer surface of the capacitor element body and connected to the first signal terminal electrode. A signal lead electrode portion; a second signal lead electrode portion extending from the signal main electrode portion to be drawn to the outer surface of the capacitor element body and connected to the second signal terminal electrode; And the grounding internal electrode is connected to the grounding terminal electrode by extending from the grounding main electrode part so as to be drawn to the outer surface of the capacitor body. A signal main electrode portion of at least one signal internal electrode of the plurality of signal internal electrodes, wherein a part of the capacitor body is sandwiched between the ground internal electrodes. Opposite to the main electrode for grounding And having a that region.

Here, FIG. 5 shows an exploded perspective view of a capacitor body included in a modification of the feedthrough multilayer capacitor according to the present embodiment. As shown in FIG. 5, the third and fourth side faces L1e, the width _{d 2} of the signal main electrode 30a~36a in the opposing direction of L1f, the third and fourth side faces L1e, in the opposing direction of the L1f It may be wider than the width d ₁ of the grounding main electrode portions 20, 21.

  Thus, the DC resistance of the feedthrough multilayer capacitor according to the modification of the first embodiment is increased by making the widths of the signal main electrode portions 30a to 36a wider than those of the grounding main electrode portions 20a and 21a. This is further suppressed.

Further, by increasing the width of the signal main electrode portions 30a to 36a, in the modified example of the feedthrough multilayer capacitor C1, the signal main electrode portions 32a to 34a and the grounding main electrode portions 20a and 21a are formed. The capacitance to be determined is defined not by the signal main electrode portions 32a to 34a but by the size of the grounding main electrode portions 20a and 21a. Therefore, even if the signal internal electrodes 32 to 34 and the grounding internal electrodes 20 and 21 are arranged out of a desired position, the capacitance formed between them is the grounding main electrode portion 20a. , 21a is finally determined, so that deviation from a desired value is suppressed. That is, even when a stacking shift occurs between the signal internal electrodes 32 to 34 and the grounding internal electrodes 20 and 21, it is possible to suppress the influence on the capacitance formed between them. It becomes. As a result, variation in the capacitance of the feedthrough multilayer capacitor according to the modification of the first embodiment is suppressed.
(Second Embodiment)

  A configuration of the feedthrough multilayer capacitor according to the second embodiment will be described with reference to FIGS. FIG. 6 is a cross-sectional view of the feedthrough multilayer capacitor according to the second embodiment, corresponding to the cross-sectional view taken along the line II-II of the feedthrough multilayer capacitor according to the first embodiment shown in FIG. FIG. 7 is a cross-sectional view of the feedthrough multilayer capacitor according to the second embodiment corresponding to the cross-sectional view taken along the line III-III of the feedthrough multilayer capacitor according to the first embodiment shown in FIG. FIG. 8 is an exploded perspective view of a capacitor body included in the feedthrough multilayer capacitor according to the second embodiment.

  The feedthrough multilayer capacitor C2 according to the second embodiment is different from the feedthrough multilayer capacitor C1 according to the first embodiment in the arrangement of the grounding internal electrodes 20 and 21 in the capacitor body L1.

  The feedthrough multilayer capacitor C2 according to the second embodiment includes a capacitor body L1, first and second signal terminal electrodes 1 and 2, and first and second signal terminals 1 and 2 disposed on the outer surface of the capacitor body L1. Ground terminal electrodes 3 and 4 are provided. The first and second signal terminal electrodes 1 and 2 and the first and second ground terminal electrodes 3 and 4 have the same arrangement as the feedthrough multilayer capacitor C1 according to the first embodiment shown in FIG. It arrange | positions on the outer surface of the element | base_body L1.

  In the feedthrough multilayer capacitor C2, the first main surface L1a or the second main surface L1b is preferably mounted on a circuit board or the like as a mounting surface for other components (for example, a circuit board or an electronic component).

  As shown in FIGS. 6 to 8, the capacitor body L <b> 1 includes a plurality (10 layers in this embodiment) of dielectric layers 10 stacked in the opposing direction of the first and second main surfaces L <b> 1 a and L <b> 1 b. ~ 19.

  As shown in FIGS. 6 to 8, the dielectric layers 11, 12, 17 and 18 are formed on the first and second main surfaces L <b> 1 a and L <b> 1 b as compared with the dielectric layers 10, 13 to 16 and 19. Thick in the opposite direction. Each of the dielectric layers 10 to 19 may be composed of a sintered body of a single ceramic green sheet or may be composed of a sintered body of a plurality of ceramic green sheets.

  The capacitor body L1 of the feedthrough multilayer capacitor C2 includes a first number (seven layers in this embodiment) of signal internal electrodes 30 to 36 and a second number (two layers in this embodiment) of grounding internals. Electrodes 20 and 21 are arranged. The first number that is the number of the signal internal electrodes 30 to 36 is larger than the second number that is the number of the grounding internal electrodes 20 and 21.

  In the present embodiment, the signal internal electrodes 30 to 36 and the grounding internal electrodes 20 and 21 are the signal internal electrodes 33 located substantially in the center along the opposing direction of the first and second main surfaces L1a and L1b. Two layers of signal internal electrodes 32 and 31, a ground internal electrode 20, and a signal internal electrode 30 are arranged in this order from the signal internal electrode 33 toward the first main surface L1a. Two layers of signal internal electrodes 34, 35, grounding internal electrode 21, and signal internal electrode 36 are arranged in this order toward the two major surfaces L1b.

In the feedthrough multilayer capacitor C2, the grounding internal electrode 20 is opposed to the first and second main surfaces L1a and L1b of the capacitor body L1 when viewed in the opposing direction of the first and second main surfaces L1a and L1b. It arranged in the region of up to 1 in 4 minutes from the first major surface L1a distance h ₁ to. In other words, the distance h ₂ between the first main surface L1a and the grounding internal electrode 20 when viewed in the opposing direction of the first and second main surfaces L1a, L1b is the first and _second of the capacitor body L1. second main surfaces L1a, 1 less than a quarter of the distance _{h 1} which L1b is opposed.

In the feedthrough multilayer capacitor C2, the grounding internal electrode 21 is opposed to the first and second main surfaces L1a and L1b of the capacitor body L1 when viewed in the opposing direction of the first and second main surfaces L1a and L1b. It arranged in the region of up to 1 in 4 minutes from the second major surface L1b distance h ₁ to. In other words, the distance h ₃ between the second main surface L1b and the grounding internal electrode 21 when viewed in the opposing direction of the first and second main surfaces L1a, L1b is the first and second of the capacitor body L1. second main surfaces L1a, 1 less than a quarter of the distance _{h 1} which L1b is opposed.

  Thus, in the feedthrough multilayer capacitor C2, the grounding inner electrodes 20, 21 are arranged at positions close to the outer surface of the capacitor body L1.

  The signal main electrode portion 30a of the signal internal electrode 30 has a grounding main electrode of the grounding internal electrode 20 with a dielectric layer 11 (first dielectric region) which is a part of the capacitor body L1 interposed therebetween. It includes regions facing each other in the stacking direction of the portion 20a and the dielectric layers 10-19 (opposing directions of the first and second main faces L1a, L1b). That is, the signal internal electrode 30 and the ground internal electrode 20 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b. Accordingly, a portion of the dielectric layer 11 that overlaps the signal main electrode portion 30a of the signal internal electrode 30 and the ground main electrode portion 20a of the ground internal electrode 20 substantially generates a capacitance component. It is an area.

  The signal main electrode portion 31a of the signal internal electrode 31 has the dielectric layer 12 (first dielectric region) that is a part of the capacitor body L1 interposed therebetween, and the ground main electrode of the ground internal electrode 20 It includes regions facing each other in the stacking direction of the portion 20a and the dielectric layers 10-19. That is, the signal internal electrode 31 and the ground internal electrode 20 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b. Therefore, a portion of the dielectric layer 12 that overlaps the signal main electrode portion 31a of the signal internal electrode 31 and the ground main electrode portion 20a of the ground internal electrode 20 substantially generates a capacitance component. It is an area.

  The signal main electrode portion 35a of the signal internal electrode 35 has a grounding main electrode of the grounding internal electrode 21 with the dielectric layer 17 (first dielectric region) which is a part of the capacitor body L1 interposed therebetween. The region 21a and the dielectric layers 10 to 19 include regions facing each other in the stacking direction. That is, the signal internal electrode 35 and the ground internal electrode 21 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b. Therefore, a portion of the dielectric layer 17 that overlaps the signal main electrode portion 35a of the signal internal electrode 35 and the ground main electrode portion 21a of the ground internal electrode 21 substantially generates a capacitance component. It is an area.

  The signal main electrode portion 36a of the signal internal electrode 36 has the dielectric layer 18 (first dielectric region) that is a part of the capacitor body L1 interposed therebetween, and the ground main electrode of the ground internal electrode 21 is sandwiched therebetween. The region 21a and the dielectric layers 10 to 19 include regions facing each other in the stacking direction. That is, the signal internal electrode 36 and the ground internal electrode 21 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b. Therefore, a portion of the dielectric layer 18 that overlaps the signal main electrode portion 36a of the signal internal electrode 36 and the ground main electrode portion 21a of the ground internal electrode 21 substantially generates a capacitance component. It is an area.

  The signal main electrode portion 31a of the signal internal electrode 31 is a signal main electrode portion of the signal internal electrode 32 with the dielectric layer 13 (second dielectric region) which is a part of the capacitor body L1 interposed therebetween. 32a and a region facing each other. That is, the signal internal electrodes 31 and 32 have regions overlapping each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b.

  The signal main electrode portion 32a of the signal internal electrode 32 is a signal main electrode portion of the signal internal electrode 33 with the dielectric layer 14 (second dielectric region) as a part of the capacitor body L1 interposed therebetween. 33a and a region facing each other. That is, the signal internal electrodes 32 and 33 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b.

  The signal main electrode portion 33a of the signal internal electrode 33 is a signal main electrode portion of the signal internal electrode 34 with the dielectric layer 15 (second dielectric region) which is a part of the capacitor body L1 interposed therebetween. 35a and a region facing each other. That is, the signal internal electrodes 33 and 34 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b.

  The signal main electrode portion 34a of the signal internal electrode 34 is a signal main electrode portion of the signal internal electrode 35 with the dielectric layer 16 (second dielectric region) as a part of the capacitor body L1 interposed therebetween. 35a and a region facing each other. That is, the signal internal electrodes 34 and 35 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b.

  As is apparent from FIGS. 6 and 7, a first dielectric region that is a part of the capacitor body located between the signal internal electrode and the ground internal electrode, that is, the dielectric layers 11, 12, 17, 18 is a second dielectric region in which the length of the first and second main surfaces L1a and L1b in the opposing direction is a part of the capacitor body located between the signal internal electrodes, that is, a dielectric layer It is longer than the length of the first and second main surfaces L1a and L1b of 13 to 16 in the facing direction.

As shown in FIG. 8, third and fourth side faces L1e, grounding main electrode portion 20a in the opposing direction of L1f, 21a width of the _{d 1,} third and fourth side faces L1e, opposing direction of L1f When the width of the signal main electrode 30a~36a and _{d 2} at, _{d 1} and _{d 2} in the present embodiment is substantially the same.

  In the feedthrough multilayer capacitor C2, the number of signal internal electrodes 30 to 36 (first number) is seven layers, and the number of grounding internal electrodes 20, 21 (second number) is two layers. That is, the first number is greater than the second number. Therefore, the feedthrough multilayer capacitor C2 can suppress an increase in DC resistance.

  In the feedthrough multilayer capacitor C2, the signal main electrode portions 31a to 35a of the signal internal electrodes 31 to 35, which are a part of the signal internal electrodes 30 to 36 having a large number, are interposed between the dielectric layers 13 to 16. It has a region that faces when sandwiched between. Therefore, in the feedthrough multilayer capacitor C2, even if the number of signal internal electrodes is increased to suppress an increase in DC resistance, it is possible to suppress an increase in capacitance. Therefore, the feedthrough multilayer capacitor C2 can suppress an increase in DC resistance while suppressing an increase in capacitance.

  In the feedthrough multilayer capacitor C2, the grounding inner electrodes 20, 21 are arranged at positions close to the outer surface of the capacitor body L1. Therefore, for example, in the capacitor body L1 manufactured by barrel polishing after sintering, the grounding internal electrodes 20 and 21 are easily pulled out to the outer surface of the capacitor body L1. Therefore, the grounding internal electrodes 20 and 21 are easily and reliably connected to the first and second grounding terminal electrodes 3 and 4.

  In the feedthrough multilayer capacitor C2, the number of grounding inner electrodes 20, 21 is smaller than that of the signal inner electrodes 30-36. Therefore, it is particularly preferable that the grounding internal electrodes 20 and 21 are connected to the grounding terminal electrodes 3 and 4 easily and reliably.

  In the feedthrough multilayer capacitor C2, the thicknesses (lengths) of the dielectric layers 11, 12, 17, and 18 in the opposing direction of the first and second main surfaces L1a and L1b are the same as those of the dielectric layers 13 to 16. It is thicker (longer) than the thickness (length) in the facing direction of the first and second main faces L1a, L1b. Therefore, the distance between the signal internal electrodes 30, 31, 35, 36 and the ground internal electrodes 20, 21 is longer than the distance between the signal internal electrodes 31-35. 21 is easily disposed outside the capacitor body L1. As a result, the grounding internal electrodes 20 and 21 are easily and reliably connected to the first and second grounding terminal electrodes 3 and 4.

  In the feedthrough multilayer capacitor C2, in the signal internal electrodes 30 to 36, the widths of the signal main electrode portions 30a to 36a and the third and fourth side surfaces L1e in the opposing direction of the third and fourth side faces L1e and L1f. , The widths of the first and second signal extraction electrode portions 30b to 36b and 30c to 36c in the opposing direction of L1f are the same. Therefore, the connection between the signal internal electrodes 30 to 36 and the first and second signal terminal electrodes 1 and 2 can be more reliably realized.

Here, FIG. 9 shows an exploded perspective view of a capacitor body included in a modification of the feedthrough multilayer capacitor according to the present embodiment. As shown in FIG. 9, the third and fourth side faces L1e, the width _{d 2} of the signal main electrode 30a~36a in the opposing direction of L1f, the third and fourth side faces L1e, in the opposing direction of the L1f It may be wider than the width d ₁ of the grounding main electrode portions 20, 21.

  Thus, by increasing the width of the signal main electrode portions 30a to 36a as compared with the grounding main electrode portions 20a and 21a, the DC resistance of the feedthrough multilayer capacitor according to the modification of the second embodiment is increased. This is further suppressed.

Further, by increasing the width of the signal main electrode portions 30a to 36a, even if a stacking shift occurs between the signal internal electrodes 30, 31, 35, 36 and the ground internal electrodes 20, 21. It is possible to suppress the influence on the capacitance formed between them.
(Third embodiment)

  The structure of the feedthrough multilayer capacitor according to the third embodiment will be described with reference to FIGS. FIG. 10 is a cross-sectional view of the feedthrough multilayer capacitor in accordance with the third embodiment corresponding to the cross-sectional view taken along the line II-II of the feedthrough multilayer capacitor in accordance with the first embodiment shown in FIG. FIG. 11 is a cross-sectional view of the feedthrough multilayer capacitor according to the third embodiment, corresponding to the cross section taken along the line III-III of the feedthrough multilayer capacitor according to the first embodiment shown in FIG. FIG. 12 is an exploded perspective view of a capacitor body included in the feedthrough multilayer capacitor according to the third embodiment.

  The feedthrough multilayer capacitor C3 according to the third embodiment is different from the feedthrough multilayer capacitor C1 according to the first embodiment in the arrangement of the grounding internal electrodes 20 and 21 in the capacitor body L1.

  The feedthrough multilayer capacitor C3 according to the third embodiment includes a capacitor body L1, first and second signal terminal electrodes 1 and 2 and first and second signal terminals 1 and 2 disposed on the outer surface of the capacitor body L1. Ground terminal electrodes 3 and 4 are provided. The first and second signal terminal electrodes 1 and 2 and the first and second ground terminal electrodes 3 and 4 have the same arrangement as the feedthrough multilayer capacitor C1 according to the first embodiment shown in FIG. It arrange | positions on the outer surface of the element | base_body L1.

  In the feedthrough multilayer capacitor C3, it is preferable to mount the first main surface L1a or the second main surface L1b on a circuit board or the like as a mounting surface for other components (for example, a circuit board or an electronic component).

  As shown in FIGS. 10 to 12, the capacitor body L <b> 1 includes a plurality of (10 layers in this embodiment) dielectric layers 10 stacked in the opposing direction of the first and second main surfaces L <b> 1 a and L <b> 1 b. ~ 19.

  As shown in FIGS. 10 to 12, the dielectric layers 10, 11, 18, and 19 are in a direction opposite to the first and second main surfaces L <b> 1 a and L <b> 1 b as compared with the dielectric layers 12 to 17. Thick. Each of the dielectric layers 10 to 19 may be composed of a sintered body of a single ceramic green sheet or may be composed of a sintered body of a plurality of ceramic green sheets.

  The capacitor body L1 of the feedthrough multilayer capacitor C3 includes a first number (seven layers in the present embodiment) of signal internal electrodes 30 to 36 and a second number (two layers in the present embodiment) of grounding internals. Electrodes 20 and 21 are arranged. The first number that is the number of the signal internal electrodes 30 to 36 is larger than the second number that is the number of the grounding internal electrodes 20 and 21.

  In the present embodiment, the signal internal electrodes 30 to 36 and the grounding internal electrodes 20 and 21 are the signal internal electrodes 33 located substantially in the center along the opposing direction of the first and second main surfaces L1a and L1b. The three layers of signal internal electrodes 32, 31, 30 and the ground internal electrode 20 are arranged in this order from the first main surface L1a to the first main surface L1a, and from the signal internal electrode 33 to the second main surface. Toward L1b, three layers of signal internal electrodes 34, 35, and 36 and a grounding internal electrode 21 are arranged in this order.

  In the feedthrough multilayer capacitor C3, the grounding internal electrode 20 is first than any of the first number of signal internal electrodes 30 to 36 when viewed in the opposing direction of the first and second main surfaces L1a and L1b. Is arranged on the main surface L1a side. The grounding internal electrode 21 is arranged closer to the second main surface L1b than any of the first number of signal internal electrodes 30 to 36 when viewed in the opposing direction of the first and second main surfaces L1a and L1b. Has been. As described above, in the feedthrough multilayer capacitor C3, the grounding inner electrodes 20, 21 are arranged at positions close to the outer surface of the capacitor body L1.

  The signal main electrode portion 30a of the signal internal electrode 30 has a grounding main electrode of the grounding internal electrode 20 with a dielectric layer 11 (first dielectric region) which is a part of the capacitor body L1 interposed therebetween. It includes regions facing each other in the stacking direction of the portion 20a and the dielectric layers 10-19 (opposing directions of the first and second main faces L1a, L1b). That is, the signal internal electrode 30 and the ground internal electrode 20 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b. Accordingly, a portion of the dielectric layer 11 that overlaps the signal main electrode portion 30a of the signal internal electrode 30 and the ground main electrode portion 20a of the ground internal electrode 20 substantially generates a capacitance component. It is an area.

  The signal main electrode portion 36a of the signal internal electrode 36 has the dielectric layer 18 (first dielectric region) that is a part of the capacitor body L1 interposed therebetween, and the ground main electrode of the ground internal electrode 21 is sandwiched therebetween. The region 21a and the dielectric layers 10 to 19 include regions facing each other in the stacking direction. That is, the signal internal electrode 36 and the ground internal electrode 21 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b. Therefore, a portion of the dielectric layer 18 that overlaps the signal main electrode portion 36a of the signal internal electrode 36 and the ground main electrode portion 21a of the ground internal electrode 21 substantially generates a capacitance component. It is an area.

  The signal main electrode portion 30a of the signal internal electrode 30 is a signal main electrode portion of the signal internal electrode 31 with the dielectric layer 12 (second dielectric region) which is a part of the capacitor body L1 interposed therebetween. 31a and a region facing each other. That is, the signal internal electrodes 30 and 31 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b.

  The signal main electrode portion 31a of the signal internal electrode 31 is a signal main electrode portion of the signal internal electrode 32 with the dielectric layer 13 (second dielectric region) which is a part of the capacitor body L1 interposed therebetween. 32a and a region facing each other. That is, the signal internal electrodes 31 and 32 have regions overlapping each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b.

  The signal main electrode portion 32a of the signal internal electrode 32 is a signal main electrode portion of the signal internal electrode 33 with the dielectric layer 14 (second dielectric region) as a part of the capacitor body L1 interposed therebetween. 33a and a region facing each other. That is, the signal internal electrodes 32 and 33 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b.

  The signal main electrode portion 33a of the signal internal electrode 33 is a signal main electrode portion of the signal internal electrode 34 with the dielectric layer 15 (second dielectric region) which is a part of the capacitor body L1 interposed therebetween. 34a and a region facing each other. That is, the signal internal electrodes 33 and 34 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b.

  The signal main electrode portion 34a of the signal internal electrode 34 is a signal main electrode portion of the signal internal electrode 35 with the dielectric layer 16 (second dielectric region) as a part of the capacitor body L1 interposed therebetween. 35a and a region facing each other. That is, the signal internal electrodes 34 and 35 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b.

  The signal main electrode portion 35a of the signal internal electrode 35 is a signal main electrode portion of the signal internal electrode 36 with the dielectric layer 17 (second dielectric region) as a part of the capacitor body L1 interposed therebetween. 36a and a region facing each other. That is, the signal internal electrodes 35 and 36 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L1a and L1b.

  As is apparent from FIGS. 10 and 11, the first dielectric region, that is, the first of the dielectric layers 11 and 18, which is a part of the capacitor body located between the signal internal electrode and the ground internal electrode. And the length of the second main surfaces L1a and L1b in the facing direction of the second dielectric region that is a part of the capacitor body located between the signal inner electrodes, that is, the dielectric layers 12 to 17 It is longer than the length of the first and second main surfaces L1a and L1b in the facing direction.

As shown in FIG. 12, third and fourth side faces L1e, grounding main electrode portion 20a in the opposing direction of L1f, 21a width of the _{d 1,} third and fourth side faces L1e, opposing direction of L1f When the width of the signal main electrode 30a~36a and _{d 2} at, _{d 1} and _{d 2} in the present embodiment is substantially the same.

  In the feedthrough multilayer capacitor C3, the number of signal inner electrodes 30 to 36 (first number) is seven layers, and the number of grounding inner electrodes 20, 21 (second number) is two layers. That is, the first number is greater than the second number. Therefore, the feedthrough multilayer capacitor C3 can suppress an increase in DC resistance.

  In the feedthrough multilayer capacitor C3, the signal main electrode portions 30a to 36a of the large number of signal internal electrodes 30 to 36 have regions facing each other with the dielectric layers 12 to 17 therebetween. . Therefore, in the feedthrough multilayer capacitor C3, even if the number of signal internal electrodes is increased to suppress an increase in DC resistance, it is possible to suppress an increase in capacitance. Therefore, in the feedthrough multilayer capacitor C3, it is possible to suppress an increase in DC resistance while suppressing an increase in capacitance.

  In the feedthrough multilayer capacitor C3, the grounding inner electrodes 20, 21 are arranged at positions close to the outer surface of the capacitor body L1. Therefore, for example, in the capacitor body L1 manufactured by barrel polishing after sintering, the grounding internal electrodes 20 and 21 are easily pulled out to the outer surface of the capacitor body L1. Therefore, the grounding internal electrodes 20 and 21 are easily and reliably connected to the first and second grounding terminal electrodes 3 and 4.

  In the feedthrough multilayer capacitor C3, the number of grounding inner electrodes 20, 21 is smaller than that of the signal inner electrodes 30-36. Therefore, it is particularly preferable that the grounding internal electrodes 20 and 21 are connected to the grounding terminal electrodes 3 and 4 easily and reliably.

  In the feedthrough multilayer capacitor C3, the thicknesses (lengths) of the dielectric layers 11 and 18 in the facing direction of the first and second main surfaces L1a and L1b are the first and second thicknesses of the dielectric layers 12 to 17, respectively. Is thicker (longer) than the thickness (length) in the opposing direction of the main surfaces L1a and L1b. Therefore, since the distance between the signal internal electrodes 30 and 36 and the ground internal electrodes 20 and 21 is longer than the distance between the signal internal electrodes 30 to 36, the ground internal electrodes 20 and 21 are not connected to the capacitor element. It becomes easy to arrange | position outside the body L1. As a result, the grounding internal electrodes 20 and 21 are easily and reliably connected to the first and second grounding terminal electrodes 3 and 4.

  In the feedthrough multilayer capacitor C3, in the signal internal electrodes 30 to 36, the widths of the signal main electrode portions 30a to 36a and the third and fourth side surfaces L1e in the opposing direction of the third and fourth side faces L1e and L1f. , The widths of the first and second signal extraction electrode portions 30b to 36b and 30c to 36c in the opposing direction of L1f are the same. Therefore, the connection between the signal internal electrodes 30 to 36 and the first and second signal terminal electrodes 1 and 2 can be more reliably realized.

Here, FIG. 13 shows an exploded perspective view of a capacitor body included in a modification of the feedthrough multilayer capacitor according to the present embodiment. As shown in FIG. 13, the width d ₂ of the signal main electrode portions 30a to 36a in the facing direction of the third and fourth side faces L1e, L1f is the facing direction of the third and fourth side faces L1e, L1f. It may be wider than the width d ₁ of the grounding main electrode portions 20, 21.

  Thus, by making the width of the signal main electrode portions 30a to 36a wider than the grounding main electrode portions 20a and 21a, the DC resistance of the feedthrough multilayer capacitor according to the modification of the third embodiment is increased. This is further suppressed.

Further, by increasing the width of the signal main electrode portions 30a to 36a, even if a stacking deviation occurs between the signal internal electrodes 30 and 36 and the ground internal electrodes 20 and 21, between these It is possible to suppress the influence on the capacitance formed by the above.
(Fourth embodiment)

  The structure of the feedthrough multilayer capacitor according to the fourth embodiment will be described with reference to FIGS. FIG. 14 is a perspective view of the feedthrough multilayer capacitor according to the present embodiment. 15 is a cross-sectional view of the feedthrough multilayer capacitor shown in FIG. 14 taken along arrows XV-XV. 16 is a cross-sectional view of the feedthrough multilayer capacitor shown in FIG. 14 taken along arrows XVI-XVI. FIG. 17 is an exploded perspective view of a capacitor body included in the feedthrough multilayer capacitor according to the fourth embodiment.

  As shown in FIG. 14, the feedthrough multilayer capacitor C4 includes a capacitor element L2 having dielectric characteristics, first and second signal terminal electrodes 1 and 2, and first and second signal terminal electrodes 1 and 2 arranged on the outer surface of the capacitor element L2. 1 and second grounding terminal electrodes 3 and 4.

  As shown in FIG. 14, the capacitor body L2 has a rectangular parallelepiped shape, and has rectangular first and second main faces L2a and L2b opposite to each other as outer surfaces thereof, and first and second main faces. The opposing first and second side faces L2c and L2d extending in the short side direction of the first and second main faces and the first and second main faces are connected so as to connect the faces. As described above, the first and second main surfaces have opposite third and fourth side faces L2e and L2f extending in the long side direction.

  The first signal terminal electrode 1 is disposed on the first side face L2c of the capacitor body L2. The first signal terminal electrode 1 is formed such that a part of a substantially central portion in the opposing direction of the third and fourth side faces L2e and L2f of the first side face L2c is opposed to the first and second main faces L2a and L2b. It covers so as to cross along the direction. The first signal terminal electrode 1 further covers part of the end portions of the first and second main surfaces L2a, L2b on the first side face L2c side.

  The second signal terminal electrode 2 is disposed on the second side face L2d of the capacitor body L2. The second signal terminal electrode 2 is formed so that a part of the substantial center in the facing direction of the third and fourth side faces L2e, L2f of the second side face L2d is opposed to the first and second main faces L2a, L2b. It covers so as to cross along the direction. The second signal terminal electrode 2 further covers part of the ends of the first and second main faces L2a, L2b on the second side face L2d side.

  The first signal terminal electrode 1 and the second signal terminal electrode 2 face each other in the direction in which the first side face L2c and the second side face L2d face each other.

  The first ground terminal electrode 3 is disposed on the third side face L2e of the capacitor body L2. The first ground terminal electrode 3 covers the entire surface of the third side face L2e so that the first and second main faces L2a, L2b and the end portions of the first and second side faces L2c, L2d (third It is formed over the side L2e side end). The second ground terminal electrode 4 is disposed on the fourth side face L2f of the capacitor body L2. The second ground terminal electrode 4 covers the entire surface of the fourth side face L2f, and the end portions of the first and second main faces L2a, L2b and the first and second side faces L2c, L2d (fourth (The end on the side face L2f side).

  The first ground terminal electrode 3 and the second ground terminal electrode 4 face each other in the direction in which the third side face L2e and the fourth side face L2f face each other.

  The first and second signal terminal electrodes 1 and 2 and the first and second ground terminal electrodes 3 and 4 are formed on the surface of the capacitor body L2 so as to be electrically insulated from each other. Yes.

  In the feedthrough multilayer capacitor C4, it is preferable that the first main surface L2a or the second main surface L2b is mounted on a circuit board or the like as a mounting surface for other components (for example, a circuit board or an electronic component). For example, when the feedthrough multilayer capacitor C4 is mounted so that the second main surface L2b of the capacitor body L2 faces the circuit board, the first and second signal terminal electrodes 1 and 2 are formed on the board. The first and second ground terminal electrodes 3 and 4 are formed on the substrate and connected to the ground electrode connected to the ground wiring.

As shown in FIGS. 15 to 17, the capacitor body L <b> 2 includes a plurality (10 layers in this embodiment) of dielectric layers 50 stacked in the opposing direction of the first and second main surfaces L <b> 2 a and L <b> 2 b. ~ 59. Each of the dielectric layers 50 to 59 is formed by firing a ceramic green sheet containing dielectric ceramic (dielectric ceramic such as BaTiO ₃ series, Ba (Ti, Zr) O ₃ series, or (Ba, Ca) TiO ₃ series). Consists of union. Note that the actual capacitor body L2 is integrated so that the boundary between the dielectric layers 50 to 59 is not visible.

  As shown in FIGS. 15 to 17, the dielectric layers 53 to 56 are opposed to the first and second main surfaces L <b> 2 a and L <b> 2 b in comparison with the dielectric layers 50 to 52 and 57 to 59. Thick. Each of the dielectric layers 50 to 59 may be composed of a sintered body of one ceramic green sheet, or may be composed of a sintered body of a plurality of ceramic green sheets. Therefore, even if the dielectric layers 53 to 56 are made of a sintered body of ceramic green sheets having a large number of laminated layers, the dielectric layers 53 to 56 are thicker than the dielectric layers 50 to 52 and 57 to 59. Alternatively, it may be thicker than the dielectric layers 50 to 52 and 57 to 59 by being composed of a sintered body of one ceramic green sheet having a large thickness.

  A first number (seven layers in this embodiment) of signal internal electrodes 70 to 76 and a second number (two layers in this embodiment) of grounding internal electrodes 60 and 61 are arranged on the capacitor body L2. Has been. The first number that is the number of the signal internal electrodes 70 to 76 is larger than the second number that is the number of the grounding internal electrodes 60 and 61.

  Each of the signal internal electrodes 70 to 76 extends from the signal main electrode portions 70a to 76a and the signal main electrode portions 70a to 76a so as to be drawn to the first side face L2c of the capacitor body L2. The lead electrode portions 70b to 76b and the second signal lead electrode portions 70c to 76c extending so as to be drawn from the signal main electrode portions 70a to 76a to the second side face L2d of the capacitor body L2. The signal main electrode portions 70a to 76a, the first signal lead electrode portions 70b to 76b, and the second signal lead electrode portions 70c to 76c are integrally formed.

  The signal main electrode portions 70a to 76a have a rectangular shape in which the opposing direction of the first and second side faces L2c and L2d is the long side direction and the opposing direction of the third and fourth side faces L2e and L2f is the short side direction. Presents.

  The first signal lead electrode portions 70b to 76b extend from substantially the center of the short side which is the end portion on the first side face L2c side of the signal main electrode portions 70a to 76a. The first signal extraction electrode portions 70b to 76b have a smaller width in the facing direction of the third and fourth side faces L2e and L2f than the signal main electrode portions 70a to 76a. The ends of the first signal lead electrode portions 70b to 76b are exposed at the first side face L2c, and the exposed end portions are connected to the first signal terminal electrode 1.

  The second signal lead electrode portions 70c to 76c extend from substantially the center of the short side which is the end portion on the second side face L2d side of the signal main electrode portions 70a to 76a. The second signal extraction electrode portions 70c to 76c have a smaller width in the facing direction of the third and fourth side faces L2e and L2f than the signal main electrode portions 70a to 76a. The ends of the second signal lead electrode portions 70c to 76c are exposed at the second side face L2d, and the exposed end portions are connected to the second signal terminal electrode 2.

  The first signal terminal electrode 1 is formed so as to cover all the exposed portions of the first signal lead electrode portions 70b to 76b on the first side face L2c, and the first signal lead electrode portion 70b. ˜76b are physically and electrically connected to the first signal terminal electrode 1. As a result, the signal internal electrodes 70 to 76 are connected to the first signal terminal electrode 1.

  The second signal terminal electrode 2 is formed so as to cover all the portions exposed to the second side face L2d of the second signal lead electrode portions 70c to 76c, and the second signal lead electrode portion 70c. ˜76c are physically and electrically connected to the second signal terminal electrode 2. As a result, the signal internal electrodes 70 to 76 are connected to the second signal terminal electrode 2.

As shown in FIG. 17, the width d ₃ of the first and second ground lead electrode portions 60b, 61b, 60c, 61c in the opposing direction of the first and second side faces L2c, L2d is fourth aspect L2e, first and second signal lead-out electrode portion 70b~76b in the opposing direction of L2f, wider than the width _{d 4} of 70C～76c. In feedthrough multilayer capacitor C4 according to the present embodiment, the width and the width of the second signal lead electrode portions 70c~76c of the first signal lead electrode portions 70b~76b is a both a _{d 4,} the same Yes, but it can be different.

As shown in FIG. 17, the signal internal electrodes 70-76, third and fourth side faces L2e, width _{d 2} of the signal main electrode 70a~76a in the opposing direction of L2f is, the third and The width d ₄ of the first signal extraction electrode portions 70b to 76b in the opposing direction of the four side surfaces L2e and L2f and the second signal extraction electrode portion in the opposing direction of the third and fourth side surfaces L2e and L2f 70c~76c wider than either of the width _{d 4} of the.

  The grounding inner electrodes 60, 61 are grounded main electrode portions 60a, 61a and a first grounding electrode extending so as to be drawn from the grounding main electrode portions 60a, 61a to the third side face L2e of the capacitor body L2. The lead electrode portions 60b and 61b, and the second ground lead electrode portions 60c and 61c extending from the ground main electrode portions 60a and 61a so as to be drawn to the fourth side face L2f of the capacitor body L2. The grounding main electrode portions 60a and 61a, the first grounding lead electrode portions 60b and 61b, and the second grounding lead electrode portions 60c and 61c are integrally formed.

  The grounding main electrode portions 60a and 61a have a rectangular shape in which the opposing direction of the first and second side faces L2c and L2d is the long side direction and the opposing direction of the third and fourth side faces L2e and L2f is the short side direction. Presents.

  The first ground lead electrode portions 60b and 61b extend from substantially the center of the long side which is the end portion on the third side face L2e side of the ground main electrode portions 60a and 61a. The first ground lead electrode portions 60b and 61b have a smaller width in the facing direction of the first and second side faces L2c and L2d than the ground main electrode portions 60a and 61a. The ends of the first ground lead electrode portions 60b and 61b are exposed at the third side face L2e, and the exposed end portions are connected to the first ground terminal electrode 3.

  The second ground lead electrode portions 60c and 61c extend from substantially the center of the long side which is the end portion on the fourth side face L2f side of the ground main electrode portions 60a and 61a. The second ground lead electrode portions 60c and 61c have a smaller width in the facing direction of the first and second side faces L2c and L2d than the ground main electrode portions 60a and 61a. The ends of the second ground lead electrode portions 60c and 61c are exposed at the fourth side face L2f, and the exposed end portions are connected to the second ground terminal electrode 4.

  The first ground terminal electrode 3 is formed so as to cover all the exposed portions of the first ground lead electrode portions 60b and 61b on the third side face L2e, and the first ground lead electrode portion 60b. , 61b are physically and electrically connected to the first ground terminal electrode 3. As a result, the grounding internal electrodes 60 and 61 are connected to the first grounding terminal electrode 3.

  The second ground terminal electrode 4 is formed so as to cover all the exposed portions of the second ground lead electrode portions 60c and 61c on the fourth side face L2f, and the second ground lead electrode portion 60c. , 61 c are physically and electrically connected to the second ground terminal electrode 4. As a result, the grounding internal electrodes 60 and 61 are connected to the second grounding terminal electrode 4.

  In the present embodiment, the signal internal electrodes 70 to 76 and the grounding internal electrodes 60 and 61 are arranged so that the signal internal electrode 73 is located substantially at the center along the opposing direction of the first and second main surfaces L2a and L2b. The grounding internal electrodes 60, 61 are located on both sides of the grounding internal electrodes 60, the signal internal electrodes 72, 71, 70 are arranged from the grounding internal electrode 60 toward the first main surface L2a. Signal internal electrodes 74, 75, and 76 are arranged toward the second main surface L2b.

  The signal main electrode portion 72a of the signal internal electrode 72 is a ground main electrode of the ground internal electrode 60 with a dielectric layer 53 (first dielectric region) which is a part of the capacitor body L2 interposed therebetween. It includes regions facing each other in the stacking direction of the portion 60a and the dielectric layers 50 to 59 (the opposing direction of the first and second main faces L2a and L2b). That is, the signal internal electrode 72 and the ground internal electrode 60 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a and L2b. Therefore, a portion of the dielectric layer 53 that overlaps the signal main electrode portion 72a of the signal internal electrode 72 and the ground main electrode portion 60a of the ground internal electrode 60 substantially generates a capacitance component. It is an area.

  The signal main electrode portion 73a of the signal internal electrode 73 is a ground main electrode of the ground internal electrode 60 with a dielectric layer 54 (first dielectric region) which is a part of the capacitor body L2 interposed therebetween. The region 60a and the dielectric layers 50 to 59 include regions facing each other in the stacking direction. That is, the signal internal electrode 73 and the ground internal electrode 60 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a and L2b. Therefore, a portion of the dielectric layer 54 that overlaps the signal main electrode portion 73a of the signal internal electrode 73 and the ground main electrode portion 60a of the ground internal electrode 60 substantially generates a capacitance component. It is an area.

  The signal main electrode portion 73a of the signal internal electrode 73 is a ground main electrode of the ground internal electrode 61 with a dielectric layer 55 (first dielectric region) that is a part of the capacitor body L2 interposed therebetween. The region 61a and the dielectric layers 50 to 59 include regions facing each other in the stacking direction. That is, the signal internal electrode 73 and the ground internal electrode 61 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a and L2b. Therefore, a portion of the dielectric layer 55 that overlaps the signal main electrode portion 73a of the signal internal electrode 73 and the ground main electrode portion 61a of the ground internal electrode 61 substantially generates a capacitance component. It is an area.

  The signal main electrode portion 74a of the signal internal electrode 74 has the dielectric layer 56 (first dielectric region) that is a part of the capacitor body L2 interposed therebetween, and the ground main electrode of the ground internal electrode 61. The region 61a and the dielectric layers 50 to 59 include regions facing each other in the stacking direction. That is, the signal internal electrode 74 and the ground internal electrode 61 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a and L2b. Therefore, a portion of the dielectric layer 56 that overlaps the signal main electrode portion 74a of the signal internal electrode 74 and the ground main electrode portion 61a of the ground internal electrode 61 substantially generates a capacitance component. It is an area.

  The signal main electrode portion 70a of the signal internal electrode 70 is a signal main electrode portion of the signal internal electrode 71 with a dielectric layer 51 (second dielectric region) that is a part of the capacitor body L2 interposed therebetween. The area | region which mutually opposes 71a is included. That is, the signal internal electrodes 70 and 71 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a and L2b.

  The signal main electrode portion 71a of the signal internal electrode 71 is a signal main electrode portion of the signal internal electrode 72 with a dielectric layer 52 (second dielectric region) as a part of the capacitor body L2 interposed therebetween. 72a and a region facing each other. That is, the signal internal electrodes 71 and 72 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a and L2b.

  The signal main electrode portion 74a of the signal internal electrode 74 is a signal main electrode portion of the signal internal electrode 75 with a dielectric layer 57 (second dielectric region) as a part of the capacitor body L2 interposed therebetween. 75a and a region facing each other. That is, the signal internal electrodes 74 and 75 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a and L2b.

  The signal main electrode portion 75a of the signal internal electrode 75 is a signal main electrode portion of the signal internal electrode 76 with a dielectric layer 58 (second dielectric region) as a part of the capacitor body L2 interposed therebetween. 76a and a region facing each other. That is, the signal internal electrodes 75 and 76 have regions overlapping each other when viewed from the opposing direction of the first and second main surfaces L2a and L2b.

  As is apparent from FIGS. 15 and 16, the first dielectric region that is a part of the capacitor body located between the signal internal electrode and the ground internal electrode, that is, the first dielectric layers 53 to 56. And the length of the second main surfaces L2a and L2b in the opposing direction is a second dielectric region that is a part of the capacitor body located between the signal internal electrodes, that is, the dielectric layers 51, 52, It is longer than the length of the first and second main faces L2a, L2b of 57, 58 in the facing direction.

As shown in FIG. 17, third and fourth side faces L2e, grounding main electrode portion 60a in the opposing direction of L2f, 61a width of the _{d 1,} third and fourth side faces L2e, opposing direction of L2f When the width of the signal main electrode 70a~76a and _{d 2} at, _{d 1} and _{d 2} in the present embodiment is substantially the same.

  In the feedthrough multilayer capacitor C4, the number of signal internal electrodes 70 to 76 (first number) is seven layers, and the number of grounding internal electrodes 60 and 61 (second number) is two layers. That is, the first number is greater than the second number. Therefore, in the feedthrough multilayer capacitor C4, it is possible to suppress an increase in DC resistance.

  Further, in the feedthrough multilayer capacitor C4, the large number of signal internal electrodes 70 to 76 are the signal main electrode portions 70a, 71a, 75a, 76a of the signal internal electrodes 70, 71, 75, 76 which are a part thereof. However, it has the area | region which opposes on both sides of the dielectric material layers 51, 52, 57, and 58 which are the 2nd dielectric area | regions of the capacitor | condenser body L2. Therefore, in the feedthrough multilayer capacitor C4, even if the number of signal internal electrodes is increased to suppress an increase in DC resistance, it is possible to suppress an increase in capacitance.

  In the feedthrough multilayer capacitor C4 according to the present embodiment, it is possible to suppress an increase in DC resistance while suppressing an increase in capacitance.

  In the feedthrough multilayer capacitor C4, the thicknesses (lengths) of the dielectric layers 53 to 56 in the opposing direction of the first and second main surfaces L2a and L2b are the same as those of the dielectric layers 51, 52, 57, and 58. It is thicker (longer) than the thickness (length) in the facing direction of the first and second main faces L2a, L2b. Therefore, since the distance between the signal internal electrodes 72 to 74 and the ground internal electrodes 60 and 61 is longer than the distance between the signal internal electrodes 70 to 72 and 74 to 76, the ground internal electrode 60, 61 is easily disposed outside the capacitor body L2.

  Capacitor body L2 is generally barrel-polished after sintering and before terminal electrodes are formed on the outer surface. In the barrel polishing, the polishing progresses toward the outer side of the capacitor body L2, and the lead electrode portion extended so as to be drawn to the side surface is more easily exposed to the outer surface. Therefore, the grounding inner electrodes 60 and 61 are arranged outside the capacitor body L2, so that the grounding inner electrodes 60 and 61 can be easily and reliably connected to the first and second grounding terminal electrodes 3 and 4. It becomes easy to be connected.

In feedthrough multilayer capacitor C4, the signal internal electrodes 70-76, third and fourth side faces L2e, the width _{d 2} of the signal main electrode 70a~76a in the opposing direction of the L2f, third and fourth aspect L2e, first and second signal lead-out electrode portion 70b~76b in the opposing direction of L2f, wider than the width _{d 4} of 70C～76c. Therefore, the widths of the first and second signal terminal electrodes 1 and 2 can be reduced. As a result, occurrence of a short circuit between the signal terminal electrodes 1 and 2 and the ground terminal electrodes 3 and 4 on the outer surface of the capacitor body L2 is suppressed.

In feedthrough multilayer capacitor C4, the first and second side surfaces L2c, the first and second ground lead electrode portions 60b in the opposite direction of L2d, 61b, 60c, 61c the width _{d 3} of the third and 4 is wider than the width d4 of the first and second signal lead electrode portions 70b to 76b and 70c to 76c in the direction in which the side surfaces L2e and L2f of the _fourth plate face each other. Therefore, the feedthrough multilayer capacitor C4 can reduce the value of the equivalent series inductance (ESL).

Here, FIG. 18 is an exploded perspective view of a capacitor body included in a modification of the feedthrough multilayer capacitor according to the present embodiment. As shown in FIG. 18, third and fourth side faces L2e, width _{d 2} of the signal main electrode 70a~76a in the opposing direction of L2f, the third and fourth side faces L2e, in the opposing direction of the L2f grounding main electrode portion 60a of the may be wider than the width _{d 1} of 61a.

  Thus, by increasing the width of the signal main electrode portions 70a to 76a as compared with the grounding main electrode portions 60a and 61a, the DC resistance of the feedthrough multilayer capacitor according to the modification of the fourth embodiment is increased. This is further suppressed.

Further, by increasing the width of the signal main electrode portions 70a to 76a, in the modification of the feedthrough multilayer capacitor C4, the signal main electrode portions 72a to 74a and the grounding main electrode portions 60a and 61a are formed. The capacitance to be determined is defined by the size of the grounding main electrode portions 60a and 61a, not the signal main electrode portions 72a to 74a. Therefore, even if the signal internal electrodes 72 to 74 and the grounding internal electrodes 60 and 61 are arranged so as to deviate from the desired positions, the capacitance formed between them is the grounding main electrode portion 60a. , 61a is ultimately determined, so that deviation from a desired value is suppressed. That is, even when a stacking shift occurs between the signal internal electrodes 72 to 74 and the ground internal electrodes 60 and 61, it is possible to suppress the influence on the capacitance formed between them. It becomes. As a result, variation in the capacitance of the feedthrough multilayer capacitor according to the modification of the fourth embodiment is suppressed.
(Fifth embodiment)

  Based on FIGS. 19-21, the structure of the feedthrough multilayer capacitor according to the fifth embodiment will be described. FIG. 19 is a cross-sectional view of the feedthrough multilayer capacitor in accordance with the fifth embodiment, corresponding to the cross section taken along the line XV-XV of the feedthrough multilayer capacitor in accordance with the fourth embodiment shown in FIG. FIG. 20 is a cross-sectional view of the feedthrough multilayer capacitor in accordance with the fifth embodiment, corresponding to the cross section taken along the line XVI-XVI of the feedthrough multilayer capacitor in accordance with the fourth embodiment shown in FIG. FIG. 21 is an exploded perspective view of a capacitor body included in the feedthrough multilayer capacitor according to the fifth embodiment.

  The feedthrough multilayer capacitor C5 according to the fifth embodiment is different from the feedthrough multilayer capacitor C4 according to the fourth embodiment in the arrangement of the grounding internal electrodes 60 and 61 in the capacitor body L2.

  The feedthrough multilayer capacitor C5 according to the fifth embodiment includes a capacitor body L2, first and second signal terminal electrodes 1 and 2, and first and second signal terminals 1 and 2 disposed on the outer surface of the capacitor body L2. Ground terminal electrodes 3 and 4 are provided. The first and second signal terminal electrodes 1 and 2 and the first and second ground terminal electrodes 3 and 4 have the same arrangement as the feedthrough multilayer capacitor C4 according to the fourth embodiment shown in FIG. It arrange | positions on the outer surface of the element | base_body L2.

  In the feedthrough multilayer capacitor C5, it is preferable that the first main surface L2a or the second main surface L2b is mounted on a circuit board or the like as a mounting surface for other components (for example, a circuit board or an electronic component).

  As shown in FIGS. 19 to 21, the capacitor body L2 includes a plurality of (10 layers in the present embodiment) dielectric layers 50 stacked in the opposing direction of the first and second main faces L2a and L2b. ~ 59.

  As shown in FIGS. 19 to 21, the dielectric layers 51, 52, 57, and 58 are formed on the first and second main surfaces L2a and L2b as compared with the dielectric layers 50, 53 to 56, and 59. Thick in the opposite direction. Each of the dielectric layers 50 to 59 may be composed of a sintered body of one ceramic green sheet, or may be composed of a sintered body of a plurality of ceramic green sheets.

  The capacitor body L2 of the feedthrough multilayer capacitor C5 includes a first number (seven layers in this embodiment) of signal internal electrodes 70 to 76 and a second number (two layers in this embodiment) of grounding internals. Electrodes 60 and 61 are disposed. The first number that is the number of the signal internal electrodes 70 to 76 is larger than the second number that is the number of the grounding internal electrodes 60 and 61.

  In the present embodiment, the signal internal electrodes 70 to 76 and the grounding internal electrodes 60 and 61 are the signal internal electrodes 73 located substantially in the center along the opposing direction of the first and second main surfaces L2a and L2b. The two layers of signal internal electrodes 72 and 71, the ground internal electrode 60, and the signal internal electrode 70 are arranged in this order from the signal internal electrode 73 toward the first main surface L2a. Two layers of signal internal electrodes 74 and 75, a ground internal electrode 61, and a signal internal electrode 76 are arranged in this order toward the second main surface L2b.

In the feedthrough multilayer capacitor C5, the grounding internal electrode 60 is opposed to the first and second main surfaces L2a and L2b of the capacitor body L2 when viewed in the opposing direction of the first and second main surfaces L2a and L2b. It arranged in the region of up to 1 in 4 minutes from the first major surface L2a distance h ₁ to. In other words, the distance h ₂ between the first main surface L2a and the grounding internal electrode 60 when viewed in the opposing direction of the first and second main surfaces L2a, L2b is the first and _second of the capacitor body L2. second main surfaces L2a, 1 less than a quarter of the distance _{h 1} which L2b is opposed.

In the feedthrough multilayer capacitor C5, the grounding internal electrode 61 is opposed to the first and second main surfaces L2a and L2b of the capacitor body L2 when viewed in the opposing direction of the first and second main surfaces L2a and L2b. It arranged in the region of up to 1 in 4 minutes from the second major surface L2b distance h ₁ to. In other words, the distance h ₃ between the second main surface L2b and the grounding internal electrode 61 when viewed in the opposing direction of the first and second main surfaces L2a, L2b is the first and second of the capacitor body L2. second main surfaces L2a, 1 less than a quarter of the distance _{h 1} which L2b is opposed.

  Thus, in the feedthrough multilayer capacitor C5, the grounding inner electrodes 60 and 61 are disposed at positions close to the outer surface of the capacitor body L2.

  The signal main electrode portion 70a of the signal internal electrode 70 is a ground main electrode of the ground internal electrode 60 with a dielectric layer 51 (first dielectric region) which is a part of the capacitor body L2 interposed therebetween. It includes regions facing each other in the stacking direction of the portion 60a and the dielectric layers 50 to 59 (the opposing direction of the first and second main faces L2a and L2b). That is, the signal internal electrode 70 and the ground internal electrode 60 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a, L2b. Accordingly, a portion of the dielectric layer 51 that overlaps the signal main electrode portion 70a of the signal internal electrode 70 and the ground main electrode portion 60a of the ground internal electrode 60 substantially generates a capacitance component. It is an area.

  The signal main electrode portion 71a of the signal internal electrode 71 is a ground main electrode of the ground internal electrode 60 with a dielectric layer 52 (first dielectric region) that is a part of the capacitor body L2 interposed therebetween. The region 60a and the dielectric layers 50 to 59 include regions facing each other in the stacking direction. That is, the signal internal electrode 71 and the ground internal electrode 60 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a, L2b. Therefore, a portion of the dielectric layer 52 that overlaps the signal main electrode portion 71a of the signal internal electrode 71 and the ground main electrode portion 60a of the ground internal electrode 60 substantially generates a capacitance component. It is an area.

  The signal main electrode portion 75a of the signal internal electrode 75 has a grounding main electrode of the grounding internal electrode 61 with a dielectric layer 57 (first dielectric region) that is a part of the capacitor body L2 interposed therebetween. The region 61a and the dielectric layers 50 to 59 include regions facing each other in the stacking direction. That is, the signal internal electrode 75 and the ground internal electrode 61 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a and L2b. Therefore, a portion of the dielectric layer 57 that overlaps the signal main electrode portion 75a of the signal internal electrode 75 and the ground main electrode portion 61a of the ground internal electrode 61 substantially generates a capacitance component. It is an area.

  The signal main electrode portion 76a of the signal internal electrode 76 has a dielectric layer 58 (first dielectric region) that is a part of the capacitor body L2 and sandwiches the ground main electrode 61 of the ground internal electrode 61. The region 61a and the dielectric layers 50 to 59 include regions facing each other in the stacking direction. That is, the signal internal electrode 76 and the grounding internal electrode 61 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a, L2b. Therefore, a portion of the dielectric layer 58 that overlaps the signal main electrode portion 76a of the signal internal electrode 76 and the ground main electrode portion 61a of the ground internal electrode 61 substantially generates a capacitance component. It is an area.

The signal main electrode portion 71a of the signal internal electrode 71 is a signal main electrode portion of the signal internal electrode 72 with a dielectric layer 53 (second dielectric region) as a part of the capacitor body L2 interposed therebetween. 72a and a region facing each other. That is, the signal internal electrodes 71 and 72 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a and L2b.
The signal main electrode portion 72a of the signal internal electrode 72 is a signal main electrode portion of the signal internal electrode 73 with a dielectric layer 54 (second dielectric region) as a part of the capacitor body L2 interposed therebetween. 73a and a region facing each other. That is, the signal internal electrodes 72 and 73 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a and L2b.

  The signal main electrode portion 73a of the signal internal electrode 73 is a signal main electrode portion of the signal internal electrode 74 with a dielectric layer 55 (second dielectric region) as a part of the capacitor body L2 interposed therebetween. 75a and a region facing each other. That is, the signal internal electrodes 73 and 74 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a and L2b.

  The signal main electrode portion 74a of the signal internal electrode 74 is a signal main electrode portion of the signal internal electrode 75 with a dielectric layer 56 (second dielectric region) that is a part of the capacitor body L2 interposed therebetween. 75a and a region facing each other. That is, the signal internal electrodes 74 and 75 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a and L2b.

  As is apparent from FIGS. 19 and 20, the first dielectric region, that is, the dielectric layers 51, 52, 57, which are part of the capacitor body located between the signal internal electrode and the ground internal electrode, 58 is a second dielectric region in which the length of the first main surface L2a and the second main surface L2b in the opposing direction is a part of the capacitor body located between the signal internal electrodes, that is, the dielectric layer It is longer than the length in the opposing direction of 53 and 56 1st and 2nd main surface L2a, L2b.

As shown in FIG. 21, third and fourth side faces L2e, grounding main electrode portion 60a in the opposing direction of L2f, 61a width of the _{d 1,} third and fourth side faces L2e, opposing direction of L2f When the width of the signal main electrode 70a~76a and _{d 2} at, _{d 1} and _{d 2} in the present embodiment is substantially the same.

As shown in FIG. 21, first and second side surfaces L2c, the first and second ground lead electrode portions 60b in the opposite direction of L2d, 61b, 60c, 61c the width _{d 3} of the third and fourth aspect L2e, first and second signal lead-out electrode portion 70b~76b in the opposing direction of L2f, wider than the width _{d 4} of 70C～76c.

In feedthrough multilayer capacitor C5 according to the present embodiment, the width and the width of the second signal lead electrode portions 70c~76c of the first signal lead electrode portions 70b~76b is a both a _{d 4,} the same Yes, but it can be different.

As shown in FIG. 21, the signal internal electrodes 70-76, third and fourth side faces L2e, width _{d 2} of the signal main electrode 70a~76a in the opposing direction of L2f is, the third and The width d ₄ of the first signal extraction electrode portions 70b to 76b in the opposing direction of the four side surfaces L2e and L2f and the second signal extraction electrode portion in the opposing direction of the third and fourth side surfaces L2e and L2f 70c~76c wider than either of the width _{d 4} of the.

  In the feedthrough multilayer capacitor C5, the number of signal internal electrodes 70 to 76 (first number) is seven layers, and the number of grounding internal electrodes 60 and 61 (second number) is two layers. That is, the first number is greater than the second number. Therefore, the feedthrough multilayer capacitor C5 can suppress an increase in DC resistance.

  In the feedthrough multilayer capacitor C5, the signal main electrode portions 71a to 75a of the signal internal electrodes 71 to 75, which are a part of the large number of signal internal electrodes 70 to 76, are interposed between the dielectric layers 53 to 56. It has a region that faces when sandwiched between. Therefore, in the feedthrough multilayer capacitor C5, even if the number of signal internal electrodes is increased to suppress an increase in DC resistance, it is possible to suppress an increase in capacitance. Therefore, in the feedthrough multilayer capacitor C5, it is possible to suppress an increase in DC resistance while suppressing an increase in capacitance.

  In the feedthrough multilayer capacitor C5, the grounding inner electrodes 60 and 61 are disposed at positions close to the outer surface of the capacitor body L2. Therefore, for example, in the capacitor body L2 manufactured by barrel polishing after sintering, the grounding internal electrodes 60 and 61 are easily drawn out to the outer surface of the capacitor body L2. Therefore, the grounding internal electrodes 60 and 61 are easily and reliably connected to the first and second grounding terminal electrodes 3 and 4.

  In the feedthrough multilayer capacitor C5, the number of grounding inner electrodes 60, 61 is smaller than that of the signal inner electrodes 70-76. Therefore, it is particularly preferable that the grounding internal electrodes 60 and 61 are connected to the grounding terminal electrodes 3 and 4 easily and reliably.

  In the feedthrough multilayer capacitor C5, the thicknesses (lengths) of the dielectric layers 51, 52, 57, and 58 in the opposing direction of the first and second main surfaces L2a and L2b are the same as those of the dielectric layers 53 to 56. It is thicker (longer) than the thickness (length) in the facing direction of the first and second main faces L2a, L2b. Therefore, since the distance between the signal internal electrodes 70, 71, 75, 76 and the ground internal electrodes 60, 61 is longer than the distance between the signal internal electrodes 71-75, the ground internal electrode 60, 61 is easily disposed outside the capacitor body L2. As a result, the grounding internal electrodes 60 and 61 are easily and reliably connected to the first and second grounding terminal electrodes 3 and 4.

In feedthrough multilayer capacitor C5, the signal internal electrodes 70-76, third and fourth side faces L2e, the width _{d 2} of the signal main electrode 70a~76a in the opposing direction of the L2f, third and fourth aspect L2e, first and second signal lead-out electrode portion 70b~76b in the opposing direction of L2f, wider than the width _{d 4} of 70C～76c. Therefore, the widths of the first and second signal terminal electrodes 1 and 2 can be reduced. As a result, occurrence of a short circuit between the signal terminal electrodes 1 and 2 and the ground terminal electrodes 3 and 4 on the outer surface of the capacitor body L2 is suppressed.

In feedthrough multilayer capacitor C5, the first and second side surfaces L2c, the first and second ground lead electrode portions 60b in the opposite direction of L2d, 61b, 60c, 61c the width _{d 3} of the third and 4 is wider than the width d4 of the first and second signal lead electrode portions 70b to 76b and 70c to 76c in the direction in which the side surfaces L2e and L2f of the _fourth plate face each other. Therefore, in the feedthrough multilayer capacitor C5, the value of the equivalent series inductance (ESL) can be reduced.

Here, FIG. 22 shows an exploded perspective view of a capacitor body included in a modification of the feedthrough multilayer capacitor according to the present embodiment. As shown in FIG. 22, third and fourth side faces L2e, width _{d 2} of the signal main electrode 70a~76a in the opposing direction of L2f, the third and fourth side faces L2e, in the opposing direction of the L2f It may be wider than the width d ₁ of the grounding main electrode portions 60, 61.

  Thus, the DC resistance of the feedthrough multilayer capacitor according to the modification of the fifth embodiment is increased by making the widths of the signal main electrode portions 70a to 76a wider than those of the grounding main electrode portions 60a and 61a. This is further suppressed.

Further, by increasing the width of the signal main electrode portions 70a to 76a, even if a stacking shift occurs between the signal internal electrodes 70, 71, 75, 76 and the grounding internal electrodes 60, 61. It is possible to suppress the influence on the capacitance formed between them.
(Sixth embodiment)

  The structure of the feedthrough multilayer capacitor according to the sixth embodiment will be described with reference to FIGS. FIG. 23 is a cross-sectional view of the feedthrough multilayer capacitor in accordance with the sixth embodiment corresponding to the cross section taken along the line XV-XV of the feedthrough multilayer capacitor in accordance with the fourth embodiment shown in FIG. FIG. 24 is a cross-sectional view of the feedthrough multilayer capacitor in accordance with the sixth embodiment, corresponding to the cross section taken along the line XVI-XVI of the feedthrough multilayer capacitor in accordance with the fourth embodiment shown in FIG. FIG. 25 is an exploded perspective view of a capacitor body included in the feedthrough multilayer capacitor according to the sixth embodiment.

  The feedthrough multilayer capacitor C6 according to the sixth embodiment is different from the feedthrough multilayer capacitor C4 according to the fourth embodiment in that the grounding internal electrodes 60 and 61 are arranged in the capacitor body L2.

  The feedthrough multilayer capacitor C6 according to the sixth embodiment includes a capacitor body L2, first and second signal terminal electrodes 1 and 2, and first and second signal terminals 1 and 2 disposed on the outer surface of the capacitor body L2. Ground terminal electrodes 3 and 4 are provided. The first and second signal terminal electrodes 1 and 2 and the first and second ground terminal electrodes 3 and 4 have the same arrangement as the feedthrough multilayer capacitor C4 according to the fourth embodiment shown in FIG. It arrange | positions on the outer surface of the element | base_body L2.

  In the feedthrough multilayer capacitor C6, it is preferable that the first main surface L2a or the second main surface L2b is mounted on a circuit board or the like as a mounting surface for other components (for example, a circuit board or an electronic component).

  As shown in FIGS. 23 to 25, the capacitor body L2 includes a plurality of (10 layers in this embodiment) dielectric layers 50 stacked in the opposing direction of the first and second main faces L2a and L2b. ~ 59.

  As shown in FIGS. 23 to 25, the dielectric layers 50, 51, 58, and 59 are in a direction opposite to the first and second main surfaces L <b> 2 a and L <b> 2 b as compared with the dielectric layers 52 to 57. Thick. Each of the dielectric layers 50 to 59 may be composed of a sintered body of one ceramic green sheet, or may be composed of a sintered body of a plurality of ceramic green sheets.

  The capacitor body L2 of the feedthrough multilayer capacitor C6 includes a first number (seven layers in this embodiment) of signal internal electrodes 70 to 76 and a second number (two layers in this embodiment) of grounding internals. Electrodes 60 and 61 are disposed. The first number that is the number of the signal internal electrodes 70 to 76 is larger than the second number that is the number of the grounding internal electrodes 60 and 61.

  In the present embodiment, the signal internal electrodes 70 to 76 and the grounding internal electrodes 60 and 61 are the signal internal electrodes 73 located substantially in the center along the opposing direction of the first and second main surfaces L2a and L2b. 3 layers of signal internal electrodes 72, 71, 70 and grounding internal electrode 60 are arranged in this order from the first main surface L2a to the first main surface L2a, and from the signal internal electrode 73 to the second main surface. Toward L2b, three layers of signal internal electrodes 74, 75, 76 and a ground internal electrode 61 are arranged in this order.

  In the feedthrough multilayer capacitor C6, the grounding inner electrode 60 is first than any of the first number of signal inner electrodes 70 to 76 when viewed in the opposing direction of the first and second main faces L2a and L2b. Is disposed on the main surface L2a side. The grounding internal electrode 61 is disposed closer to the second main surface L2b than any of the first number of signal internal electrodes 70 to 76 when viewed in the opposing direction of the first and second main surfaces L2a and L2b. Has been. As described above, in the feedthrough multilayer capacitor C6, the grounding inner electrodes 60 and 61 are disposed at positions close to the outer surface of the capacitor body L2.

  The signal main electrode portion 70a of the signal internal electrode 70 is a ground main electrode of the ground internal electrode 60 with a dielectric layer 51 (first dielectric region) which is a part of the capacitor body L2 interposed therebetween. It includes regions facing each other in the stacking direction of the portion 60a and the dielectric layers 50 to 59 (the opposing direction of the first and second main faces L2a and L2b). That is, the signal internal electrode 70 and the ground internal electrode 60 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a, L2b. Accordingly, a portion of the dielectric layer 51 that overlaps the signal main electrode portion 70a of the signal internal electrode 70 and the ground main electrode portion 60a of the ground internal electrode 60 substantially generates a capacitance component. It is an area.

  The signal main electrode portion 76a of the signal internal electrode 76 has a dielectric layer 58 (first dielectric region) that is a part of the capacitor body L2 and sandwiches the ground main electrode 61 of the ground internal electrode 61. The region 61a and the dielectric layers 50 to 59 include regions facing each other in the stacking direction. That is, the signal internal electrode 76 and the grounding internal electrode 61 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a, L2b. Therefore, a portion of the dielectric layer 58 that overlaps the signal main electrode portion 76a of the signal internal electrode 76 and the ground main electrode portion 61a of the ground internal electrode 61 substantially generates a capacitance component. It is an area.

  The signal main electrode portion 70a of the signal internal electrode 70 is a signal main electrode portion of the signal internal electrode 71 with a dielectric layer 52 (second dielectric region) that is a part of the capacitor body L2 interposed therebetween. The area | region which mutually opposes 71a is included. That is, the signal internal electrodes 70 and 71 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a and L2b.

  The signal main electrode portion 71a of the signal internal electrode 71 is a signal main electrode portion of the signal internal electrode 72 with a dielectric layer 53 (second dielectric region) as a part of the capacitor body L2 interposed therebetween. 72a and a region facing each other. That is, the signal internal electrodes 71 and 72 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a and L2b.

  The signal main electrode portion 72a of the signal internal electrode 72 is a signal main electrode portion of the signal internal electrode 73 with a dielectric layer 54 (second dielectric region) as a part of the capacitor body L2 interposed therebetween. 73a and a region facing each other. That is, the signal internal electrodes 72 and 73 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a and L2b.

  The signal main electrode portion 73a of the signal internal electrode 73 is a signal main electrode portion of the signal internal electrode 74 with a dielectric layer 55 (second dielectric region) as a part of the capacitor body L2 interposed therebetween. 74a and the area | region which mutually opposes is included. That is, the signal internal electrodes 73 and 74 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a and L2b.

  The signal main electrode portion 74a of the signal internal electrode 74 is a signal main electrode portion of the signal internal electrode 75 with a dielectric layer 56 (second dielectric region) that is a part of the capacitor body L2 interposed therebetween. 75a and a region facing each other. That is, the signal internal electrodes 74 and 75 have regions that overlap each other when viewed from the opposing direction of the first and second main surfaces L2a and L2b.

  The signal main electrode portion 75a of the signal internal electrode 75 is a signal main electrode portion of the signal internal electrode 76 with a dielectric layer 57 (second dielectric region) that is a part of the capacitor body L2 interposed therebetween. 76a and a region facing each other. That is, the signal internal electrodes 75 and 76 have regions overlapping each other when viewed from the opposing direction of the first and second main surfaces L2a and L2b.

  As is apparent from FIGS. 23 and 24, the first dielectric region, that is, the first of the dielectric layers 51 and 58, which is a part of the capacitor body located between the signal internal electrode and the ground internal electrode. And the length of the second main surfaces L2a and L2b in the facing direction of the second dielectric region that is a part of the capacitor body located between the signal internal electrodes, that is, the dielectric layers 52 to 57 It is longer than the length of the first and second main faces L2a, L2b in the facing direction.

As shown in FIG. 25, third and fourth side faces L2e, grounding main electrode portion 60a in the opposing direction of L2f, 61a width of the _{d 1,} third and fourth side faces L2e, opposing direction of L2f When the width of the signal main electrode 70a~76a and _{d 2} at, _{d 1} and _{d 2} in the present embodiment is substantially the same.

As shown in FIG. 25, the width d ₃ of the first and second ground lead electrode portions 60b, 61b, 60c, 61c in the opposing direction of the first and second side faces L2c, L2d is fourth aspect L2e, first and second signal lead-out electrode portion 70b~76b in the opposing direction of L2f, wider than the width _{d 4} of 70C～76c.

In feedthrough multilayer capacitor C6 according to the present embodiment, the width and the width of the second signal lead electrode portions 70c~76c of the first signal lead electrode portions 70b~76b is a both a _{d 4,} the same Yes, but it can be different.

As shown in FIG. 25, the signal internal electrodes 70-76, third and fourth side faces L2e, width _{d 2} of the signal main electrode 70a~76a in the opposing direction of L2f is, the third and The width d ₄ of the first signal extraction electrode portions 70b to 76b in the opposing direction of the four side surfaces L2e and L2f and the second signal extraction electrode portion in the opposing direction of the third and fourth side surfaces L2e and L2f 70c~76c wider than either of the width _{d 4} of the.

  In the feedthrough multilayer capacitor C6, the number of signal internal electrodes 70 to 76 (first number) is seven layers, and the number of ground internal electrodes 60 and 61 (second number) is two layers. That is, the first number is greater than the second number. Therefore, the feedthrough multilayer capacitor C6 can suppress an increase in DC resistance.

  In the feedthrough multilayer capacitor C6, the large number of signal main electrodes 70a to 76a of the signal internal electrodes 70 to 76 have regions facing each other with the dielectric layers 52 to 57 interposed therebetween. . Therefore, in the feedthrough multilayer capacitor C6, even if the number of signal internal electrodes is increased to suppress an increase in DC resistance, it is possible to suppress an increase in capacitance. Therefore, in the feedthrough multilayer capacitor C6, it is possible to suppress an increase in DC resistance while suppressing an increase in capacitance.

  In the feedthrough multilayer capacitor C6, the grounding inner electrodes 60 and 61 are disposed at positions close to the outer surface of the capacitor body L2. Therefore, for example, in the capacitor body L2 manufactured by barrel polishing after sintering, the grounding internal electrodes 60 and 61 are easily drawn out to the outer surface of the capacitor body L2. Therefore, the grounding internal electrodes 60 and 61 are easily and reliably connected to the first and second grounding terminal electrodes 3 and 4.

  In the feedthrough multilayer capacitor C6, the number of grounding inner electrodes 60, 61 is smaller than that of the signal inner electrodes 70-76. Therefore, it is particularly preferable that the grounding internal electrodes 60 and 61 are connected to the grounding terminal electrodes 3 and 4 easily and reliably.

  In the feedthrough multilayer capacitor C6, the thicknesses (lengths) of the dielectric layers 51, 58 in the facing direction of the first and second main surfaces L2a, L2b are the first and second thicknesses of the dielectric layers 52-57. Is thicker (longer) than the thickness (length) in the opposing direction of the main surfaces L2a and L2b. Therefore, since the distance between the signal internal electrodes 70 and 76 and the ground internal electrodes 60 and 61 is longer than the distance between the signal internal electrodes 70 to 76, the ground internal electrodes 60 and 61 are not connected to the capacitor element. It becomes easy to arrange | position outside the body L2. As a result, the grounding internal electrodes 60 and 61 are easily and reliably connected to the first and second grounding terminal electrodes 3 and 4.

In feedthrough multilayer capacitor C6, the signal internal electrodes 70-76, third and fourth side faces L2e, the width _{d 2} of the signal main electrode 70a~76a in the opposing direction of the L2f, third and fourth aspect L2e, first and second signal lead-out electrode portion 70b~76b in the opposing direction of L2f, wider than the width _{d 4} of 70C～76c. Therefore, the widths of the first and second signal terminal electrodes 1 and 2 can be reduced. As a result, occurrence of a short circuit between the signal terminal electrodes 1 and 2 and the ground terminal electrodes 3 and 4 on the outer surface of the capacitor body L2 is suppressed.

In feedthrough multilayer capacitor C6, the first and second side surfaces L2c, the first and second ground lead electrode portions 60b in the opposite direction of L2d, 61b, 60c, 61c the width _{d 3} of the third and 4 is wider than the width d4 of the first and second signal lead electrode portions 70b to 76b and 70c to 76c in the direction in which the side surfaces L2e and L2f of the _fourth plate face each other. Therefore, the feedthrough multilayer capacitor C6 can reduce the value of the equivalent series inductance (ESL).

Here, FIG. 26 is an exploded perspective view of a capacitor body included in a modification of the feedthrough multilayer capacitor according to the present embodiment. As shown in FIG. 26, third and fourth side faces L2e, width _{d 2} of the signal main electrode 70a~76a in the opposing direction of L2f, the third and fourth side faces L2e, in the opposing direction of the L2f It may be wider than the width d ₁ of the grounding main electrode portions 60, 61.

  Thus, by increasing the width of the signal main electrode portions 70a to 76a as compared with the grounding main electrode portions 60a and 61a, the DC resistance of the feedthrough multilayer capacitor according to the modification of the sixth embodiment is increased. This is further suppressed.

  Further, by increasing the width of the signal main electrode portions 70a to 76a, even when a stacking shift occurs between the signal internal electrodes 70 and 76 and the ground internal electrodes 60 and 61, the signal main electrode portions 70a to 76a It is possible to suppress the influence on the capacitance formed by the above.

  The preferred embodiments and modifications of the present invention have been described above, but the present invention is not necessarily limited to the above-described embodiments and modifications, and various modifications can be made without departing from the scope of the invention. is there.

  For example, the first and second signal terminal electrodes 1 and 2 and the first and second ground terminal electrodes 3 and 4 may be disposed on the outer surface of the capacitor bodies L1 and L2. The arrangements shown in the embodiments and the modifications may not be required.

  The first and second signal terminal electrodes 1 and 2 and the first and second ground terminal electrodes 3 and 4 have the shapes as shown in FIG. 1 and FIG. It may not be formed on the outer surface of L2. FIG. 27 shows a perspective view of a modified example of the feedthrough multilayer capacitor C1 shown in FIG. In the feedthrough multilayer capacitor shown in FIG. 27, the edges of the portions formed on the first and second main surfaces L1a and L1b of the first and second signal terminal electrodes 1 and 2 are curved. Yes. Moreover, the edge of the part formed in 1st and 2nd main surface L1a, L1b among the 1st and 2nd earthing terminal electrodes 3 and 4 has drawn the curve.

  FIG. 28 is a perspective view of a modification of the feedthrough multilayer capacitor C4 shown in FIG. In the feedthrough multilayer capacitor shown in FIG. 28, the edges of the portions of the first and second signal terminal electrodes 1 and 2 formed on the first and second main surfaces L2a and L2b are curved. Yes. Moreover, the edge of the part formed in 1st and 2nd main surface L2a, L2b among the 1st and 2nd earthing terminal electrodes 3 and 4 has drawn the curve. By forming the terminal electrodes as shown in FIGS. 27 and 28, the terminal electrodes are connected to each other, and a short circuit is prevented from occurring between the terminal electrodes.

  Further, the number of laminated dielectric layers 10 to 19 and 50 to 59 and the number of laminated internal electrodes 20, 21, 30 to 36, 60, 61, and 70 to 76 included in the capacitor bodies L1 and L2 are for signals. As long as the number of internal electrodes is larger than the number of grounding internal electrodes, the number is not limited to that shown in the above-described embodiments and modifications. The shape of each internal electrode 20, 21, 30-36, 60, 61, 70-76 is not restricted to the shape shown by embodiment and the modification mentioned above. The positions of the internal electrodes 20, 21, 30 to 36, 60, 61, and 70 to 76 in the capacitor body L1 and L2 are not limited to the positions shown in the above-described embodiments and modifications.

  The length in the opposing direction of the first and second main surfaces L1a (L2a) and L1b (L2b) of the first dielectric region is the first and second main surfaces L1a (L2a) of the second dielectric region. , L1b (L2b) is not longer than the length in the opposing direction, and may be equal, for example.

  In each of the signal internal electrodes 30 to 36 and 70 to 76, the first signal extraction electrode portions 30b to 36b and 70b to 76b in the opposing direction of the third and fourth side faces L1e (L2e) and L1f (L2f). And the widths of the second signal extraction electrode portions 30c to 36c and 70c to 76c in the opposing direction of the third and fourth side faces L1e (L2e) and L1f (L2f) may not be the same.

  In each of the signal internal electrodes 30 to 36 and 70 to 76, the first signal extraction electrode portions 30b to 36b and 70b to 76b in the opposing direction of the third and fourth side faces L1e (L2e) and L1f (L2f). And the widths of the second signal extraction electrode portions 30c to 36c and 70c to 76c in the opposing direction of the third and fourth side faces L1e (L2e) and L1f (L2f) may not be the same. Therefore, for example, in the opposing direction of the third and fourth side faces L1e (L2e) and L1f (L2f), the widths of the first signal extraction electrode portions 30b to 36b and 70b to 76b are the signal main electrode portions 30a to 30b. The widths of the second signal extraction electrode portions 30c to 36c and 70c to 76c may be smaller than the widths of the signal main electrode portions 30a to 36a and 70a to 76a. .

  In each of the signal internal electrodes 30 to 36 and 70 to 76, the widths of the signal main electrode portions 30a to 36a and 70a to 76a in the opposing direction of the third and fourth side faces L1e (L2e) and L1f (L2f) are , The widths of the first signal extraction electrode portions 30b to 36b and 70b to 76b in the opposing direction of the third and fourth side faces L1e (L2e) and L1f (L2f), and the third and fourth side faces L1e (L2e). ), The width of the second signal extraction electrode portions 30c to 36c and 70c to 76c in the opposing direction of L1f (L2f) may be narrower than one or both of them.

  The widths of the signal main electrode portions 30a to 36a and 70a to 76a in the opposing direction of the third and fourth side faces L1e (L2e) and L1f (L2f) are the same as the third and fourth side faces L1e (L2e) and L1f. It may be narrower than the width of the grounding main electrode portions 20a, 21a, 60a, 61a in the facing direction of (L2f).

  The widths of the ground extraction electrode portions 20b, 21b, 20c, 21c, 60b, 61b, 60c, 61c in the opposing direction of the first and second side faces L1c (L2c), L1d (L2d) are the third and fourth widths. Widths of the first signal extraction electrode portions 30b to 36b and 70b to 76b in the opposing direction of the side surfaces L1e (L2e) and L1f (L2f), and the third and fourth side surfaces L1e (L2e) and L1f (L2f) The width may be narrower than or equal to one or both of the widths of the second signal extraction electrode portions 30c to 36c and 70c to 76c in the opposite direction.

1 is a perspective view of a feedthrough multilayer capacitor according to a first embodiment. It is II-II arrow sectional drawing of the feedthrough multilayer capacitor shown in FIG. FIG. 3 is a cross-sectional view of the feedthrough multilayer capacitor shown in FIG. 1 is an exploded perspective view of a capacitor body included in a feedthrough multilayer capacitor according to a first embodiment. An exploded perspective view of a capacitor element body included in a modification of the feedthrough multilayer capacitor according to the first embodiment is shown. It is a figure corresponding to the II-II arrow sectional view of the feedthrough multilayer capacitor concerning a 2nd embodiment. It is a figure corresponding to the III-III arrow sectional view of the feedthrough multilayer capacitor concerning a 2nd embodiment. FIG. 6 is an exploded perspective view of a capacitor body included in a feedthrough multilayer capacitor according to a second embodiment. The disassembled perspective view of the capacitor | condenser body included in the modification of the feedthrough multilayer capacitor which concerns on 2nd Embodiment is shown. It is a figure corresponding to the II-II arrow sectional view of the feedthrough multilayer capacitor concerning a 3rd embodiment. It is a figure corresponding to the III-III arrow sectional view of the feedthrough multilayer capacitor concerning a 3rd embodiment. FIG. 6 is an exploded perspective view of a capacitor body included in a feedthrough multilayer capacitor according to a third embodiment. The disassembled perspective view of the capacitor | condenser body contained in the modification of the feedthrough multilayer capacitor which concerns on 3rd Embodiment is shown. It is a perspective view of the feedthrough multilayer capacitor according to the fourth embodiment. It is a figure corresponding to the XV-XV arrow sectional drawing of the feedthrough multilayer capacitor shown in FIG. It is a figure corresponding to the XVI-XVI arrow sectional drawing of the feedthrough multilayer capacitor shown in FIG. FIG. 10 is an exploded perspective view of a capacitor body included in a feedthrough multilayer capacitor according to a fourth embodiment. The disassembled perspective view of the capacitor | condenser body contained in the modification of the feedthrough multilayer capacitor which concerns on 4th Embodiment is shown. It is a figure corresponding to the XV-XV arrow sectional view of the feedthrough multilayer capacitor concerning a 5th embodiment. It is a figure corresponding to the XVI-XVI arrow sectional view of the feedthrough multilayer capacitor concerning a 5th embodiment. FIG. 10 is an exploded perspective view of a capacitor body included in a feedthrough multilayer capacitor according to a fifth embodiment. The disassembled perspective view of the capacitor | condenser body contained in the modification of the feedthrough multilayer capacitor which concerns on 5th Embodiment is shown. It is a figure corresponding to the XV-XV arrow sectional view of the feedthrough multilayer capacitor concerning a 6th embodiment. It is a figure corresponding to the XVI-XVI arrow sectional view of the feedthrough multilayer capacitor concerning a 6th embodiment. FIG. 10 is an exploded perspective view of a capacitor body included in a feedthrough multilayer capacitor according to a sixth embodiment. The disassembled perspective view of the capacitor | condenser body contained in the modification of the feedthrough multilayer capacitor which concerns on 6th Embodiment is shown. The perspective view of the modification of the feedthrough multilayer capacitor shown in FIG. 1 is shown. FIG. 15 is a perspective view of a modified example of the feedthrough multilayer capacitor illustrated in FIG. 14.

Explanation of symbols

C1 to C6 ... feedthrough multilayer capacitors, L1, L2 ... capacitor body, 1 ... first signal terminal electrode, 2 ... second signal terminal electrode, 3 ... first ground terminal electrode, 4 ... first 2 grounding terminal electrodes, 10 to 19, 50 to 59 ... dielectric layers, 20, 21, 60, 61 ... grounding internal electrodes, 20a, 21a, 60a, 61a ... grounding main electrode parts, 20b, 21b, 60b, 61b... First ground lead electrode portion, 20c, 21c, 60c, 61c... Second ground lead electrode portion, 30 to 36, 70 to 76... Signal internal electrode, 30a to 36a. Electrode part, 30b-36b ... 1st signal extraction electrode part, 30c-36c ... 2nd signal extraction electrode part.

Claims (9)

Opposite rectangular first and second main surfaces, opposing first and second side surfaces extending so as to connect the first and second main surfaces, and the first and second surfaces A capacitor element body having third and fourth opposite side surfaces extending so as to connect the second main surfaces as outer surfaces and having dielectric characteristics;
A first number of signal internal electrodes and a second number of ground internal electrodes disposed within the capacitor body;
First and second signal terminal electrodes and ground terminal electrodes disposed on the outer surface of the capacitor body,
Each signal internal electrode is connected to the first signal terminal electrode extending from the signal main electrode portion and the signal main electrode portion so as to be drawn to the outer surface of the capacitor body. One signal lead electrode portion and a second signal lead electrode extending from the signal main electrode portion to the outer surface of the capacitor element body and connected to the second signal terminal electrode And
Each of the grounding internal electrodes includes a grounding main electrode portion and a grounding lead electrode extending from the grounding main electrode portion to be drawn to the outer surface of the capacitor body and connected to the grounding terminal electrode And
The signal main electrode portion of at least one signal internal electrode of the first number of signal internal electrodes is the second number with a first dielectric region being a part of the capacitor body interposed therebetween. A region facing the grounding main electrode portion of at least one of the grounding internal electrodes,
The signal main electrode portion of at least one signal internal electrode of the first number of signal internal electrodes is another signal internal with a second dielectric region that is a part of the capacitor body interposed therebetween. Having a region facing the signal main electrode part of the electrode,
The feedthrough multilayer capacitor is characterized in that the first number is larger than the second number.   Each of the grounding internal electrodes is viewed from the first main surface at a distance where the first and second main surfaces of the capacitor body face each other when viewed in the opposing direction of the first and second main surfaces. It is arranged in a region up to a quarter distance or in a region up to a quarter distance from the second main surface where the first and second main surfaces face each other. The feedthrough multilayer capacitor as claimed in claim 1.   Each of the grounding internal electrodes has the first main surface side or the second main electrode more than any of the first number of signal internal electrodes when viewed in the opposing direction of the first and second main surfaces. The feedthrough multilayer capacitor according to claim 1, wherein the feedthrough multilayer capacitor is disposed on a main surface side.   The length of the first dielectric region in the facing direction of the first and second main surfaces is longer than the length of the second dielectric region in the facing direction of the first and second main surfaces. The feedthrough multilayer capacitor according to any one of claims 1 to 3, wherein the feedthrough multilayer capacitor is provided. The first and second signal terminal electrodes are respectively disposed on the first or second side surfaces,
The first signal lead electrode portion of each signal internal electrode extends so as to be drawn to the first or second side surface on which the first signal terminal electrode is disposed,
The second signal lead electrode portion of each signal internal electrode extends so as to be drawn to the first or second side surface on which the second signal terminal electrode is disposed. The feedthrough multilayer capacitor according to any one of claims 1 to 4.   In each of the signal internal electrodes, the width of the signal main electrode portion in the opposing direction of the third and fourth side surfaces and the first signal lead-out in the opposing direction of the third and fourth side surfaces 6. The feedthrough multilayer capacitor according to claim 5, wherein the width of the electrode portion and the width of the second signal lead electrode portion in the opposing direction of the third and fourth side surfaces are the same.   In each of the signal internal electrodes, the width of the signal main electrode portion in the opposing direction of the third and fourth side surfaces is set so that the width of the signal main electrode portion in the opposing direction of the third and fourth side surfaces is 6. The feedthrough multilayer capacitor according to claim 5, wherein a width of the lead electrode portion and a width of the second signal lead electrode portion in the opposing direction of the third and fourth side surfaces are wider.   The width of the signal main electrode portion in the facing direction of the third and fourth side surfaces is wider than the width of the grounding main electrode portion in the facing direction of the third and fourth side surfaces. The feedthrough multilayer capacitor according to any one of claims 5 to 7. The grounding terminal electrode is disposed on the third or fourth side surface,
The ground lead electrode portion of the ground internal electrode extends so as to be drawn to the third or fourth side surface on which the ground terminal electrode is disposed,
The width of the ground lead electrode portion in the opposing direction of the first and second side surfaces is the width of the first signal lead electrode portion in the opposing direction of the third and fourth side surfaces and the first 9. The feedthrough multilayer capacitor according to claim 5, wherein the feedthrough multilayer capacitor is wider than any of the widths of the second signal extraction electrode portions in the opposing direction of the third and fourth side surfaces.

Images