JP2009212400A - High-frequency package - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high frequency package having differential transmission lines capable of reducing interferences with surrounding wires and influences by noises and easily matching to an appropriate characteristic impedance. <P>SOLUTION: The high frequency package includes a multi-layer substrate having electronic components on it, a pair of electrode pads 20 formed on the surface of the multi-layer substrate, a pair of BGA pads 27 for external connection formed on the back of the multi-layer substrate, and differential transmission lines to transfer high frequency differential signals between the electrode pad 20 and the BGA pad 27. The differential transmission line is composed of a pair of signal lines 24 formed on a dielectric layer of the multi-layer substrate, a ground structure formed around the signal lines 24, a pair of first signal via-holes 21 connecting the electrode pad 20 to one side of the signal lines 24, a plurality of first ground via-holes 23 disposed around them, a pair of second signal via-holes 26 connecting the other end of the signal lines 24 to the BGA pad 27, and a plurality of second ground via-holes 29 disposed around them. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a high-frequency package capable of transmitting a high-frequency signal, and more particularly to a high-frequency package on which a flip-chip connected semiconductor chip is mounted and configured to transmit a high-frequency signal through a BGA pad.

2. Description of the Related Art Conventionally, a package in which an electronic component such as a semiconductor chip is mounted on a laminated substrate and a transmission line for a signal transmitted between the semiconductor chip and an external substrate is used has been used. In the case of a general lead type package, a conductor pattern serving as a signal line is formed on the surface of the multilayer substrate, and a signal can be transmitted from the pad of the semiconductor chip to the lead on the outer periphery. On the other hand, in recent years, BGA (Ball Grid Array) type packages are becoming popular. BGA type packages can be easily mounted on an external substrate by bonding solder balls to a BGA pad formed on the back surface of the multilayer substrate, so that it is not necessary to braze the leads to the package, and the manufacture of the package In addition, the productivity can be improved, and the manufacturability of mounting on an external substrate can be improved, thereby reducing the cost. As for the semiconductor chip, flip-chip connection has been adopted in addition to connection by wire bonding. When a flip chip-connected semiconductor chip is mounted on a BGA type package, it is necessary to configure a transmission line from the vicinity of the center of the surface of the multilayer substrate to the vicinity of the outer periphery of the back surface of the multilayer substrate (for example, Patent Document 1). reference).
JP 2004-158553 A

  For example, in the field of optical communication transceivers and the like, a high frequency package capable of transmitting a signal having an extremely high frequency of about 40 GHz is desired. In such a high-frequency package, it is desirable to configure a differential transmission line having excellent high-frequency characteristics and transmit a high-frequency differential signal via the differential transmission line. However, even if the differential transmission line is configured, in the frequency band of several tens of GHz, there is a risk of signal degradation due to reflection due to impedance mismatch of the transmission line, interference with surrounding wiring, and noise. In the structure as described above, the position of the pad of the semiconductor chip and the BGA pad are different in both the stacking direction and the planar direction, so it is structurally difficult to construct a differential transmission line that matches the desired characteristic impedance. It becomes. On the other hand, if a lead-type package is used, the differential transmission line and the external terminal pad (lead terminal) can be formed on the same plane, thus simplifying the line structure, characteristic impedance, noise resistance, etc. However, there are problems in terms of ease of manufacturing of a package, ease of manufacturing of mounting on an external substrate, and cost. As described above, the high-frequency package has a problem that a configuration capable of transmitting a high-frequency signal of several tens GHz with good characteristics cannot be realized.

  Therefore, the present invention has been made to solve these problems, and constitutes a differential transmission line for transmitting a high-frequency differential signal between a semiconductor chip and a BGA pad, and interference and noise with surrounding wiring. An object of the present invention is to provide a high-frequency package that can reduce the influence of noise and that can be easily matched to an appropriate characteristic impedance and can realize good transmission characteristics at low cost.

  In order to solve the above problems, a high-frequency package according to the present invention includes a laminated substrate on which electronic components are placed, and a pair formed on the surface of the laminated substrate and connected to a pair of external terminals of the electronic components. Electrode pads, a pair of BGA pads for external circuit connection formed on the back surface of the multilayer substrate, and a difference in transmitting a high-frequency differential signal between the pair of electrode pads and the pair of BGA pads A differential transmission line including a pair of signal lines formed on a predetermined dielectric layer of the multilayer substrate, and a ground structure formed so as to surround the pair of signal lines. , A pair of first signal vias that connect one end side of the pair of electrode pads and the pair of signal lines in the stacking direction, and a plurality of first signals disposed around the pair of first signal vias. A ground via, the other end of the pair of signal lines, and the And a pair second signal vias that connect the pair of BGA pad in the stacking direction, constituted by a plurality of second ground vias disposed around the pair of second signal via.

  According to the high frequency package of the present invention, the differential transmission line for transmitting the high frequency differential signal used in the electronic component extends from the pair of electrode pads on the surface of the multilayer substrate to the pair of BGA pads on the back surface of the multilayer substrate. A pair of first signal vias, a pair of signal lines, and a pair of second signal vias are connected in this order. In addition, a plurality of first ground vias around the pair of first signal vias, a ground structure surrounding the pair of signal lines, and a plurality of second ground vias around the pair of second signal vias are formed. The Therefore, the differential transmission line is configured in a path including the stacking direction and the planar direction of the stacked substrate, and has a structure in which the periphery is blocked by the ground. Therefore, even if other wiring is densely arranged around the differential transmission line, it can reduce the influence of interference and noise on the differential transmission line, and without being affected by surrounding wiring. The characteristic impedance can be matched only with the parameters of the differential transmission line. Therefore, a high frequency package having a line structure for transmitting a high frequency signal of several tens GHz can be realized with good transmission characteristics and low cost.

  In the present invention, the length of the pair of first signal vias and the plurality of first ground vias in the stacking direction is longer than the length of the pair of second signal vias and the plurality of second ground vias in the stacking direction. It may be shortened. As a result, in the region immediately below the electronic component where the electrode pads are arranged at high density in the semiconductor package, the first signal via and the first ground via can be configured to be as short as possible. In this region, the degree of freedom in arrangement (layout) of the first signal via and the first ground via is increased, and matching to an appropriate characteristic impedance is facilitated.

  In the present invention, the ground structure includes a first ground conductor layer disposed above the pair of signal lines, a second ground conductor layer disposed below the pair of signal lines, and the first ground conductor layer. A ground conductor layer and a plurality of third ground vias connecting the second ground conductor layer in the stacking direction may be included. In this case, the plurality of third ground vias may be arranged at a constant interval equal to or less than ¼ of the wavelength of the high-frequency differential signal in the extending direction of the pair of signal lines. Further, the plurality of third gran vias may be arranged in two or more rows on both sides of the pair of signal lines.

  In the present invention, the pair of signal lines constitute a pair of coplanar lines, and the plurality of third ground vias are connected to ground conductors disposed on both sides in the same plane as the pair of signal lines. You may comprise as follows.

  In the present invention, a semiconductor chip flip-chip connected to the laminated substrate may be used as the electronic component.

  In the present invention, the pair of BGA pads may have a circular shape with a diameter of 0.3 mm or less.

  In the present invention, the characteristic impedance of the differential transmission line may be matched to 100Ω.

  According to the present invention, in the high-frequency package, the differential transmission line for transmitting a high-frequency signal between the electronic component and the BGA pad is a pair of signal lines in the planar direction to each pair of signal vias in the stacking direction at both ends. And the entire structure is surrounded by a ground conductor. Therefore, the characteristic impedance can be matched with high accuracy by appropriately setting the structure of the differential transmission line and the structure of the ground conductor. In addition, since the periphery of the differential transmission line is blocked by the ground conductor, it is possible to reduce the influence of interference with other surrounding wiring and noise, and reliably prevent deterioration of the transmission signal. Furthermore, since a BGA type package with good manufacturability is adopted and no special member is required without increasing the package size, a high-performance high-frequency package can be realized at low cost.

  Hereinafter, preferred embodiments of a high-frequency package to which the present invention is applied will be described with reference to the drawings.

  FIG. 1 is a schematic plan view showing the overall configuration of the high-frequency package of the present embodiment. FIG. 1 shows a state in which a semiconductor chip 11 as an electronic component is placed on the center upper portion of the high-frequency package 10. The semiconductor chip 11 is connected to the high frequency package 10 by flip chip connection, and a plurality of pads 12 as external terminals formed on the lower surface of the semiconductor chip 11 are formed on the surface of the high frequency package 10 with a plurality of solder bumps interposed therebetween. Connected to a plurality of electrode pads. The high-frequency package 10 is formed using a laminated substrate in which a plurality of dielectric layers are laminated, and has a rectangular shape that is sufficiently larger than the semiconductor chip 11. The high frequency package 10 is a BGA type package, and a plurality of BGA pads formed on the back surface are connected to an external circuit through a plurality of solder balls 13. Compared to the pads 12 of the semiconductor chip 11, the size and pitch of the solder balls 13 are larger.

  In the present embodiment, a high frequency differential signal of several tens GHz is input / output between the semiconductor chip 11 and an external circuit via a specific pair of pads 12. Therefore, the high-frequency package 10 includes a differential transmission line 14 that connects a pair of pads 12 of the semiconductor chip 11 to a pair of solder balls 13. This differential transmission line 14 has a structure in which signal vias in the stacking direction and signal lines in the planar direction are combined, and details will be described later. The characteristic impedance of the differential transmission line 14 is matched to 100Ω, for example.

  Next, the detailed structure of the high-frequency package 10 will be described with reference to FIGS. FIG. 2 is a plan view of a portion 10a of the high-frequency package 10 including the differential transmission line 14 shown in FIG. As shown in the lower part of FIG. 2, for the sake of convenience, the extending direction of the differential transmission line 14 is defined as the X direction, and the orthogonal direction is defined as the Y direction. FIG. 3 is a conceptual diagram showing an arrangement state of main elements viewed from the side surface direction of a portion 10a of the high-frequency package 10 including the differential transmission line 14 shown in FIG. As shown in the lower part of FIG. 3, a direction orthogonal to the X direction and the Y direction (stacking direction of the stacked substrate) is defined as the Z direction.

  As shown in FIG. 3, the multilayer substrate of the high frequency package 10 has dielectric layers L1 to L7 stacked in order from the upper layer. Each of the dielectric layers L1 to L7 has a different thickness depending on the electrical characteristics required for each, and a unique conductor pattern is formed in each. The multilayer substrate composed of the dielectric layers L1 to L7 is formed by, for example, co-firing high-temperature fired multilayer ceramics (HTCC: High-Temperature Co-fired Ceramics), and has a relatively high dielectric constant (approximately 9.2 at 10 GHz). Have

  A pair of electrode pads 20 connected to the above-described pair of pads 12 of the semiconductor chip 11 is formed on the uppermost dielectric layer L1. The pair of electrode pads 20 is connected to a pair of signal vias 21 (first signal via of the present invention) that penetrate the dielectric layer L1 to the dielectric layer L3 in the Z direction. As shown in FIG. 2, the pair of electrode pads 20 and the pair of signal vias 21 are arranged at a predetermined interval in the Y direction in the region 22 where the surrounding ground pattern is removed. Around the pair of signal vias 21, a plurality of ground vias 23 (first ground vias of the present invention) penetrating the dielectric layer L1 to the dielectric layer L4 in the Z direction are formed. The plurality of ground vias 23 are connected to the ground pattern of each layer outside the region 22.

  A pair of signal lines 24 that connect between a pair of signal vias 21 and a pair of signal vias 26 described later are formed in the dielectric layer L3. The pair of signal lines 24 has a length L (FIG. 2) from the signal via 21 at one end to the signal via 26 at the other end and extends in the X direction, and each has a constant line width in the Y direction. And it arrange | positions in parallel with a fixed space | interval. Since the pair of signal lines 24 is slightly smaller than the distance between the pair of signal vias 21 and the pair of signal vias 26, both sides are partially extended in an oblique direction. On both sides of the pair of signal lines 24, a plurality of ground vias 25 (third ground via of the present invention) arranged at an equal pitch are formed. The plurality of ground vias 25 connect the ground conductor layers of the upper and lower dielectric layers L2 and L4 in the Z direction. The plurality of ground vias 25 are included in the ground structure surrounding the pair of signal lines 24, which will be described in detail later.

  A pair of signal vias 26 (second signal via of the present invention) are connected to the end of the pair of signal lines 24 opposite to the pair of signal vias 21. As shown in FIG. 3, the pair of signal vias 26 penetrates the dielectric layer L3 to the dielectric layer L7 in the Z direction and is connected to a pair of BGA pads 27 formed on the back surface of the multilayer substrate. Yes. As shown in FIG. 2, the pair of signal vias 26 and the pair of BGA pads 27 are arranged at a predetermined interval in the Y direction in the region 28 where the surrounding ground pattern is removed. Around the pair of signal vias 26, a plurality of ground vias 29 (second ground vias of the present invention) are formed penetrating in the Z direction from the dielectric layer L2 to the back surface of the dielectric layer L7. The plurality of ground vias 29 are connected to the ground pattern of each layer outside the region 28.

  As described above, in the high-frequency package 10, the differential transmission line 14 that connects between the pair of electrode pads 20 on the front surface and the BGA pad 27 on the back surface has a pair of signal vias 21 extending in the stacking direction, A pair of signal lines 24 extending in the plane direction and a pair of signal vias 26 extending in the stacking direction are included. Also, a plurality of ground vias 23 around the pair of signal vias 21, a ground structure around the pair of signal lines 24, and a plurality of ground vias 29 around the pair of signal vias 26 are formed. It has a structure that blocks interference with signal lines and noise. By adopting the structure of the first embodiment, the pair of electrode pads 20 and the pair of BGA pads 27 formed at different positions in the stacking direction on the front surface and the back surface of the high-frequency package 10 are connected, and the characteristic impedance is Can be matched with high accuracy and sufficient noise resistance can be ensured.

  Here, as can be seen from FIG. 3, the lengths of the signal vias 21 and the ground vias 23 on the electrode pad 20 side in the stacking direction are longer than the lengths of the signal vias 26 and the ground vias 29 on the BGA pad 27 side. It is getting shorter. The pads 12 of the semiconductor chip 11 are densely arranged in the center of the high-frequency package 10, and a large number of signal wiring patterns are formed at a high density in the region immediately below the pads 12. When the plurality of ground vias 23 become long, there are cases where structural restrictions are imposed on the arrangement of each. Therefore, in the first embodiment, by forming a pair of signal lines 24 in the relatively upper dielectric layer L3 in the multilayer substrate, a region below the pair of signal vias 21 and the plurality of ground vias 23 is obtained. It can be effectively used to form other signal wiring patterns. Further, since the degree of freedom of arrangement in the region below the pair of signal vias 21 and the plurality of ground vias 23 is increased, impedance matching is facilitated.

  Next, the structure of the pair of signal lines 24 in the differential transmission line 14 and the surrounding ground structure will be specifically described with reference to FIG. 4A is an enlarged view of a portion 10b of FIG. 2, and FIG. 4B is a view showing a cross section taken along the line aa of FIG. 4A. As shown in FIG. 4B, ground conductor layers 31 are arranged on both sides of the pair of signal lines 24 in the same plane in the dielectric layer L3. That is, the pair of signal lines 24 constitutes a pair of coplanar lines. As shown in FIG. 4A, the pair of signal lines 24 are arranged in parallel with an interval Ya, and are each formed with a line width Yb. In addition, each signal line 24 is arranged away from the ground conductor layer 31 by a distance Yc.

  As shown in FIG. 4B, a ground conductor layer 30 formed on the dielectric layer L2 is disposed above the pair of signal lines 24, and a dielectric is disposed below the pair of signal lines 24. A ground conductor layer 32 formed on the layer L4 is disposed. The ground conductor layer 30 and the ground conductor layer 31 face each other with a gap Za, and the ground conductor layer 31 and the ground conductor layer 32 face each other with a gap Zb. The plurality of ground vias 25 connect the ground conductor layers 30, 31, and 32. Therefore, the pair of signal lines 24 has a structure surrounded by a ground structure including the dielectric layers 30, 31, 32 and the plurality of ground vias 25 when viewed in the cross section.

  As shown in FIG. 4A, the plurality of ground vias 25 are arranged at a constant pitch Pa (pitch: interval between via centers) in the extending direction (X direction) of the signal line 24 and orthogonal directions thereof. They are arranged in two rows at a constant pitch Pb in the (Y direction). In this case, the pitch Pa in the X direction needs to be set to ¼ or less of the wavelength of the signal transmitted through the differential transmission line 14. Thereby, electromagnetic waves propagating in the plane direction of the signal line 24 can be blocked. It is desirable to set the diameter of the ground via 25 as large as possible within a manufacturable range. The plurality of ground vias 25 are desirably arranged in two or more rows in the Y direction in order to obtain a sufficient electromagnetic wave shielding effect.

  The parameters Ya, Yb, Yc, Pa, Pb, Za, and Zb related to the distance shown in FIG. 4 are respectively desired values that can match the characteristic impedance of the differential transmission line 14 to 100Ω at the frequency of the differential transmission signal. Need to design. As an example of the design conditions for each of the above parameters, when the relative dielectric constant εr = 9.2, Ya = 0.28 mm, Yb = 0.07 mm, Yc = 0.27 mm, Pa = Pb = 0.4 mm, Za = Zb = 0.3 mm can be set.

  Next, the arrangement of each pair of signal vias 21 and 26 and a plurality of ground vias 23 and 29 configured at both ends of the differential transmission line 14 will be specifically described with reference to FIG. FIG. 5A shows an arrangement of a pair of signal vias 21 and a plurality of ground vias 23 on the electrode pad 20 side. The pair of signal vias 21 are arranged side by side in the Y direction with a gap G1 therebetween. FIG. 5A shows a configuration example in which eight ground vias 23 are arranged around a pair of signal vias 21. Each of the ground vias 23 is disposed at an equal distance d1 from any one of the signal vias 21 while maintaining a substantially equal pitch with each other. However, the ground via 23 is not disposed in a region close to the pair of signal lines 24 (on the right side in FIG. 5A). The signal via 21 and the ground via 23 are both formed with a circular cross section having a diameter D1.

  FIG. 5B shows an arrangement of a pair of signal vias 26 and a plurality of ground vias 29 on the BGA pad 27 side. The pair of signal vias 26 are arranged side by side in the Y direction with a gap G2 therebetween. FIG. 5B shows a configuration example in which ten ground vias 29 are arranged around a pair of signal vias 26. The respective ground vias 29 are arranged side by side at an equal distance d2 from any one of the signal vias 26 while maintaining a substantially equal pitch with each other. The signal via 26 and the ground via 29 are both formed with a circular cross section having a diameter D2.

  Note that the parameters G1, d1, D1, G2, d2, and D2 relating to the distance and size shown in FIG. 5 are respectively desired values that can match the characteristic impedance of the differential transmission line 14 to 100Ω, as in the parameters of FIG. Need to design. As an example of the design conditions for each of the above parameters, G1 = 0.7 mm, d1 = 0.8 mm, D1 = 0.1 mm, G2 = 1 mm, d2 = 0.9 mm, and D2 = 0.13 mm. it can.

  Next, the arrangement of each of the pair of electrode pads 20 and the pair of BGA pads 27 in the semiconductor package 10 will be specifically described with reference to FIG. FIG. 6A shows the arrangement of a pair of electrode pads 20. A region 22 having a length X3 in the X direction and a length Y3 in the Y direction is formed in the ground pattern Ga of the dielectric layer L1. The ground pattern inside the region 22 is removed, and a pair of electrode pads 20 are arranged side by side in the Y direction at the same interval G1 as in FIG. The electrode pad 20 is arranged so that the center thereof coincides with the central axis of the signal via 21, and is formed in a circle having a diameter D3 larger than the diameter D1 of the signal via.

  FIG. 6B shows the arrangement of a pair of BGA pads 27. A region 28 having a length X4 in the X direction and a length Y4 in the Y direction is formed in the ground pattern Gb on the back surface of the dielectric layer L7. The ground pattern inside the region 28 is removed, and a pair of BGA pads 27 are arranged side by side in the Y direction at the same interval G2 as in FIG. The BGA pad 27 is arranged so that the center thereof coincides with the central axis of the signal via 26 and is formed in a circular shape having a diameter D4 larger than the diameter D2 of the signal via 26.

  Note that the parameters X3, Y3, D3, X4, Y4, and D4 related to the distance and size shown in FIG. 6 conform to the specifications related to the semiconductor chip 10 and the BGA, and the characteristic impedance of the differential transmission line 14 can be matched to 100Ω. It is necessary to design each with a desired value. As an example of the design conditions for each of the above parameters, X3 = 1.2 mm, Y3 = 1.9 mm, D3 = 0.15 mm, X4 = 1.4 mm, and Y4 = 2.4 mm can be set. Although there is a degree of freedom in setting the diameter D4, it is desirable to set a value that can optimize the characteristics described later.

  Next, with reference to FIG.7 and FIG.8, the transmission characteristic of the differential transmission line 14 in the high frequency package 10 of this embodiment is demonstrated. FIG. 7 shows S parameters obtained by simulation in the differential transmission line 14. Here, the case where the characteristic impedance of the differential transmission line 14 is matched to 100Ω and the diameter D4 of the BGA pad 27 is changed in three ways with respect to the transmission signal frequencies of 25 GHz and 40 GHz is compared. As shown in FIG. 7, for both S22 corresponding to the reflection characteristic on the output side and S21 corresponding to the insertion loss, the case where the diameter D4 of the BGA pad 27 is 0.3 mm has good characteristics. As the diameter D4 of the BGA pad 27 increases to 0.5 mm and 0.8 mm, both S21 and S22 deteriorate. From the result of FIG. 7, it is desirable to set the diameter D4 of the BGA pad 27 to 0.3 mm or less.

  FIG. 8 is a graph showing the frequency characteristics of the S parameter of the differential transmission line 14 when D4 = 0.3 mm. In the frequency range of 0 to 40 GHz, S11, S22, and S21 are obtained by simulation as S parameters. In the high frequency region of 25 to 40 GHz, good characteristics can be ensured for S11, S22, and S21. Thus, it was confirmed that the high-frequency package 10 of the present embodiment can ensure good transmission characteristics of the differential transmission line 14 particularly when transmitting a high-frequency signal of several tens of GHz.

  As mentioned above, although the content of this invention was concretely demonstrated based on this embodiment, this invention is not limited to each above-mentioned embodiment, A various change can be given in the range which does not deviate from the summary. . For example, in the present embodiment, the configuration in which the semiconductor chip 11 placed on the high-frequency package 10 is flip-chip connected has been described. However, the semiconductor chip 11 may be connected by another connection method (wire bonding or the like). However, the present invention can be applied. Further, the present invention is not limited to the semiconductor chip 11 and can be applied to the case where an electronic component that can be connected through the electrode pad 20 is placed on the high-frequency package 11.

It is a schematic plan view which shows the whole structure of the high frequency package of this embodiment. It is a top view of the part of the high frequency package containing the differential transmission line of this embodiment. It is the conceptual diagram seen from the side surface direction of the part of the high frequency package containing the differential transmission line of this embodiment. It is a figure which shows the structure of one pair of signal lines among the differential transmission lines of this embodiment, and the surrounding ground structure. It is a figure which shows arrangement | positioning of each pair of signal vias comprised by the both ends of the differential transmission line of this embodiment, and several ground vias. It is a figure which shows each arrangement | positioning of a pair of electrode pad and a pair of BGA pad in the semiconductor package of this embodiment. It is a figure which shows the S parameter calculated | required by simulation in the differential transmission line of this embodiment. In the differential transmission line of this embodiment, it is a graph which shows the frequency characteristic of the S parameter about D4 = 0.3mm.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... High frequency package 11 ... Semiconductor chip 12 ... Pad 13 ... Solder ball 14 ... Differential transmission line 20 ... Electrode pad 21, 26 ... Signal via 22, 28 ... Area 23, 25, 29 ... Ground via 24 ... Signal line 27 ... BGA pads 30, 31, 32 ... Ground conductor layer

Claims (9)

A multilayer substrate on which electronic components are placed;
A pair of electrode pads formed on the surface of the multilayer substrate and connected to a pair of external terminals of the electronic component;
A pair of BGA pads for external circuit connection formed on the back surface of the multilayer substrate;
A differential transmission line for transmitting a high-frequency differential signal between the pair of electrode pads and the pair of BGA pads;
With
The differential transmission line is
A pair of signal lines formed on a predetermined dielectric layer of the multilayer substrate;
A ground structure formed so as to surround the pair of signal lines;
A pair of first signal vias that connect one end side of the pair of electrode pads and the pair of signal lines in the stacking direction;
A plurality of first ground vias disposed around the pair of first signal vias;
A pair of second signal vias connecting the other end of the pair of signal lines and the pair of BGA pads in the stacking direction;
A plurality of second ground vias disposed around the pair of second signal vias;
A high-frequency package characterized by comprising:   The length of the pair of first signal vias and the plurality of first ground vias in the stacking direction is shorter than the length of the pair of second signal vias and the plurality of second ground vias in the stacking direction. The high frequency package according to claim 1. The ground structure is
A first ground conductor layer disposed on an upper layer of the pair of signal lines;
A second ground conductor layer disposed below the pair of signal lines;
A plurality of third ground vias connecting the first ground conductor layer and the second ground conductor layer in the stacking direction;
The high frequency package according to claim 1, comprising:   4. The plurality of third ground vias are arranged at a constant interval equal to or less than ¼ of the wavelength of the high-frequency differential signal in the extending direction of the pair of signal lines. High frequency package.   The high frequency package according to claim 4, wherein the plurality of third ground vias are arranged in two or more rows on both sides of the pair of signal lines.   The pair of signal lines constitute a pair of coplanar lines, and the plurality of third ground vias are connected to ground conductors arranged on both sides in the same plane as the pair of signal lines. The high frequency package according to claim 5   The high-frequency package according to claim 1, wherein the electronic component is a semiconductor chip that is flip-chip connected to the multilayer substrate.   The high frequency package according to claim 1, wherein the pair of BGA pads have a circular shape with a diameter of 0.3 mm or less.   The high frequency package according to claim 1, wherein a characteristic impedance of the differential transmission line is matched to 100Ω.

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