JP2009099938A - Method and apparatus for manufacturing semiconductor device, control program, and program recording medium - Google Patents

Method and apparatus for manufacturing semiconductor device, control program, and program recording medium Download PDF

Info

Publication number
JP2009099938A
JP2009099938A JP2008107467A JP2008107467A JP2009099938A JP 2009099938 A JP2009099938 A JP 2009099938A JP 2008107467 A JP2008107467 A JP 2008107467A JP 2008107467 A JP2008107467 A JP 2008107467A JP 2009099938 A JP2009099938 A JP 2009099938A
Authority
JP
Japan
Prior art keywords
pattern
film
semiconductor device
manufacturing
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2008107467A
Other languages
Japanese (ja)
Other versions
JP5236983B2 (en
Inventor
Koichi Hatta
浩一 八田
Eiichi Nishimura
栄一 西村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to JP2008107467A priority Critical patent/JP5236983B2/en
Priority to KR1020080056158A priority patent/KR100967924B1/en
Priority to TW097130967A priority patent/TWI389202B/en
Priority to US12/284,749 priority patent/US20090087990A1/en
Publication of JP2009099938A publication Critical patent/JP2009099938A/en
Application granted granted Critical
Publication of JP5236983B2 publication Critical patent/JP5236983B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0338—Process specially adapted to improve the resolution of the mask

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device, which can simplify processes in comparison with the conventional methods, can reduce manufacturing cost, and can improve productivity; and to provide the manufacturing apparatus, the control program, and the program recording medium of the semiconductor device. <P>SOLUTION: The method of manufacturing the semiconductor device includes: a film forming step of forming a SiO<SB>2</SB>film 104 on the pattern of a photoresist 103; an etching step of etching the SiO<SB>2</SB>film 104 so that the SiO<SB>2</SB>remains only in the sidewall section of the pattern of the photoresist 103; and a step of removing the pattern of the photoresist 103 and form the pattern of the SiO<SB>2</SB>film 104. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、フォトレジスト膜を露光、現像して得られたフォトレジストの第１パターンに基づいて、基板上の被エッチング層を所定のパターンにエッチングして、半導体装置を製造する半導体装置の製造方法、半導体装置の製造装置、制御プログラム及びプログラム記憶媒体に関する。   The present invention provides a semiconductor device for manufacturing a semiconductor device by etching an etching target layer on a substrate into a predetermined pattern based on a first pattern of a photoresist obtained by exposing and developing a photoresist film. The present invention relates to a method, a semiconductor device manufacturing apparatus, a control program, and a program storage medium.

従来から、半導体装置等の製造工程においては、半導体ウエハ等の基板にプラズマエッチング等のエッチング処理を施して、微細な回路パターン等を形成することが行われている。このようなエッチング処理工程では、フォトレジストを用いたフォトリソグラフィー工程によって、エッチングマスクを形成することが行われている。   Conventionally, in a manufacturing process of a semiconductor device or the like, a fine circuit pattern or the like is formed by performing an etching process such as plasma etching on a substrate such as a semiconductor wafer. In such an etching process, an etching mask is formed by a photolithography process using a photoresist.

このようなフォトリソグラフィー工程では、形成するパターンの微細化に対応するため、種々の技術が開発されている。その一つとして、所謂ダブルパターニングがある。このダブルパターニングは、第１のマスクパターン形成ステップと、この第１のマスクパターン形成ステップの後に行われる第２のマスクパターン形成ステップの２段階のパターニングを行うことによって、１回のパターニングでエッチングマスクを形成する場合より微細な間隔のエッチングマスクを形成できるようにしたものである（例えば、特許文献１参照。）。   In such a photolithography process, various techniques have been developed to cope with the miniaturization of a pattern to be formed. One of them is so-called double patterning. This double patterning is performed by performing a two-step patterning of a first mask pattern forming step and a second mask pattern forming step performed after the first mask pattern forming step, thereby performing an etching mask in one patterning. An etching mask with a finer interval can be formed (see, for example, Patent Document 1).

また、例えばＳｉＯ2膜やＳｉ3Ｎ4膜等を犠牲膜として使用し、１つパターンの両側側壁部分にマスクを形成して使用するＳＷＴ（side wall transfer）法を用いて、最初にフォトレジスト膜を露光、現像して得られたフォトレジストのパターンよりも微細なピッチでパターニングを行うことも知られている。すなわち、この方法では、まずフォトレジストのパターンを用いて例えばＳｉＯ2膜の犠牲膜をエッチングしてパターニングし、このＳｉＯ2膜のパターンの上にＳｉ3Ｎ4膜等を形成した後、ＳｉＯ2膜の側壁部分にのみＳｉ3Ｎ4膜が残るようにエッチバックし、この後、ウエットエッチングによりＳｉＯ2膜を除去して、残ったＳｉ3Ｎ4膜をマスクとして、下層のエッチングを行うものである。 In addition, for example, an SiO 2 film, Si 3 N 4 film or the like is used as a sacrificial film, and a mask is formed on both side wall portions of one pattern to use a SWT (side wall transfer) method. It is also known to perform patterning at a finer pitch than the pattern of a photoresist obtained by exposing and developing a film. That is, in this method, first etching for example the sacrificial layer of SiO 2 film by using a pattern of photoresist is patterned by, after an Si 3 N 4 film or the like on the pattern of the SiO 2 film, SiO 2 Etch back so that the Si 3 N 4 film remains only on the side wall of the film, and then remove the SiO 2 film by wet etching, and etch the lower layer using the remaining Si 3 N 4 film as a mask It is.

また、成膜技術においては、より低温で成膜することが要求される場合があり、このように低温で成膜する技術としては、加熱触媒体で成膜ガスを活性化させた化学気相成長によって行う方法が知られている（例えば、特許文献２参照。）。
特開２００７−０２７７４２号公報 特開２００６−１７９８１９号公報 In addition, in the film formation technique, it may be required to form a film at a lower temperature. As a technique for forming a film at such a low temperature, a chemical vapor phase in which a film formation gas is activated by a heating catalyst body is used. A method for performing growth is known (for example, see Patent Document 2).
JP 2007-027742 A JP 2006-179819 A

上記したとおり、従来技術においては、工程数が多くなり、工程が複雑化するとともに製造コストが増大し、生産性が悪化するという課題がある。また、従来のＳＷＴ法では、ウエットエッチング工程が必要であるため、ドライエッチングとウエットエッチングが混在する工程となり、工程が煩雑化する要因となっている。   As described above, in the prior art, there are problems that the number of steps increases, the steps become complicated, the manufacturing cost increases, and the productivity deteriorates. In addition, since the conventional SWT method requires a wet etching process, it is a process in which dry etching and wet etching are mixed, which is a factor that complicates the process.

本発明は、かかる従来の事情に対処してなされたもので、従来に比べて工程の簡略化と製造コストの低減を図ることができ、生産性の向上を図ることのできる半導体装置の製造方法、半導体装置の製造装置、制御プログラム及びプログラム記憶媒体を提供しようとするものである。   The present invention has been made in response to such a conventional situation, and a method of manufacturing a semiconductor device capable of simplifying the process and reducing the manufacturing cost and improving the productivity as compared with the conventional case. An object of the present invention is to provide a semiconductor device manufacturing apparatus, a control program, and a program storage medium.

請求項１の半導体装置の製造方法は、フォトレジスト膜を露光、現像して得られたフォトレジストの第１パターンに基づいて、基板上の被エッチング層を所定のパターンにエッチングして、半導体装置を製造する半導体装置の製造方法であって、前記フォトレジストの第１パターンの上にＳｉＯ2膜を成膜する成膜工程と、前記ＳｉＯ2膜を前記フォトレジストの第１パターンの側壁部にのみ残るようにエッチングするエッチング工程と、前記フォトレジストの第１パターンを除去して前記ＳｉＯ2膜の第２パターンを形成する第２パターン形成工程と、を具備したことを特徴とする。 According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device by etching a layer to be etched on a substrate into a predetermined pattern based on a first pattern of a photoresist obtained by exposing and developing a photoresist film. A method of manufacturing a semiconductor device, comprising: forming a SiO 2 film on a first pattern of the photoresist; and depositing the SiO 2 film on a sidewall portion of the first pattern of the photoresist. An etching process for etching so as to remain only, and a second pattern forming process for forming a second pattern of the SiO 2 film by removing the first pattern of the photoresist.

請求項２の半導体装置の製造方法は、請求項１記載の半導体装置の製造方法であって、前記成膜工程を、加熱触媒体で成膜ガスを活性化させた化学気相成長によって行うことを特徴とする。   A method for manufacturing a semiconductor device according to claim 2 is the method for manufacturing a semiconductor device according to claim 1, wherein the film forming step is performed by chemical vapor deposition in which a film forming gas is activated by a heating catalyst body. It is characterized by.

請求項３の半導体装置の製造方法は、請求項１又は２記載の半導体装置の製造方法であって、前記成膜工程の前に、前記フォトレジストの第１パターンをトリミングするとともに、下層の有機材料からなる反射防止膜をエッチングする工程を具備したことを特徴とする。   The method for manufacturing a semiconductor device according to claim 3 is the method for manufacturing a semiconductor device according to claim 1 or 2, wherein the first pattern of the photoresist is trimmed before the film forming step, It comprises a step of etching an antireflection film made of a material.

請求項４の半導体装置の製造方法は、請求項１〜３いずれか１項記載の半導体装置の製造方法であって、前記第２パターン形成工程の後、当該第２パターンをマスクとして下層のシリコン層又は窒化シリコン層又は酸窒化シリコン層をエッチングすることを特徴とする。   The method for manufacturing a semiconductor device according to claim 4 is the method for manufacturing a semiconductor device according to any one of claims 1 to 3, wherein after the second pattern forming step, the second pattern silicon is used as a mask. Etching a layer, a silicon nitride layer, or a silicon oxynitride layer is characterized.

請求項５の半導体装置の製造方法は、請求項１又は２記載の半導体装置の製造方法であって、前記第２パターン形成工程の後に、当該第２パターンをマスクとして下層の無機材料からなる反射防止膜をエッチングし、この後、前記無機材料からなる反射防止膜の下層の有機膜をエッチングする工程を具備したことを特徴とする。   The method for manufacturing a semiconductor device according to claim 5 is the method for manufacturing a semiconductor device according to claim 1 or 2, wherein after the second pattern forming step, the reflection made of a lower inorganic material using the second pattern as a mask. The method is characterized by comprising a step of etching the anti-reflection film and then etching the organic film under the anti-reflection film made of the inorganic material.

請求項６の半導体装置の製造方法は、請求項５記載の半導体装置の製造方法であって、前記無機材料からなる反射防止膜が、ＳＯＧ（Spin On Glass）膜、ＬＴＯ（Low Temperature Oxide）膜、ＳｉＯＮ膜のいずれかであることを特徴とする。   6. The method of manufacturing a semiconductor device according to claim 6, wherein the antireflection film made of an inorganic material is an SOG (Spin On Glass) film or an LTO (Low Temperature Oxide) film. Or a SiON film.

請求項７の半導体装置の製造方法は、基板上の被エッチング層を所定のパターンにエッチングして、半導体装置を製造する半導体装置の製造方法であって、フォトレジストからなる複数のライン状の第１パターンを形成する第１パターン形成工程と、前記第１パターンの上にＳｉＯ2膜を成膜する第１成膜工程と、前記ＳｉＯ2膜を前記フォトレジストの第１パターンの側壁部にのみ残るようにエッチングする第１エッチング工程と、前記第１パターンを除去して前記ＳｉＯ2膜の第２パターンを形成する第２パターン形成工程と、前記第２パターンをマスクとして下層の第１マスク構成層をエッチングする第２エッチング工程と、前記第１パターンと直交する方向に、フォトレジストの複数のライン状のパターンからなる第３パターンを形成する工程と、前記第３パターンの上にＳｉＯ2膜を成膜する第２成膜工程と、前記ＳｉＯ2膜を前記第３パターンの側壁部にのみ残るようにエッチングする第３エッチング工程と、前記第３パターンを除去して前記ＳｉＯ2膜の第４パターンを形成する第４パターン形成工程と、前記第４パターン及び前記第１マスク構成層をマスクとして、下層の第２マスク構成層をエッチングする第４エッチング工程と、前記第１マスク構成層と前記第２マスク構成層をマスクとして、前記被エッチング層にホール形状を形成する第５エッチング工程とを具備したことを特徴とする。 A method of manufacturing a semiconductor device according to claim 7 is a method of manufacturing a semiconductor device by etching a layer to be etched on a substrate into a predetermined pattern, wherein a plurality of line-shaped first layers made of photoresist are formed. a first pattern formation step of forming a pattern, a first film forming step of forming a SiO 2 film on the first pattern, only the SiO 2 film on the side wall portion of the first pattern of the photoresist A first etching step for etching so as to remain; a second pattern forming step for removing the first pattern to form a second pattern of the SiO 2 film; and a first mask configuration in a lower layer using the second pattern as a mask A second etching step for etching the layer, and a third pattern composed of a plurality of line-like patterns of photoresist in a direction orthogonal to the first pattern And that step, a second film forming step of forming a SiO 2 film on the third pattern, and a third etching step of etching the SiO 2 film so as to remain only on the sidewalls of the third pattern, A fourth pattern forming step of removing the third pattern to form a fourth pattern of the SiO 2 film; and etching the second mask constituent layer below using the fourth pattern and the first mask constituent layer as a mask And a fifth etching step of forming a hole shape in the etched layer using the first mask constituent layer and the second mask constituent layer as a mask.

請求項８の半導体装置の製造方法は、請求項７記載の半導体装置の製造方法であって、前記第１及び第２成膜工程を、加熱触媒体で成膜ガスを活性化させた化学気相成長によって行うことを特徴とする。   A method for manufacturing a semiconductor device according to claim 8 is the method for manufacturing a semiconductor device according to claim 7, wherein the first and second film forming steps are performed by using a heating catalyst body to activate a film forming gas. It is performed by phase growth.

請求項９の半導体装置の製造方法は、請求項７又は８記載の半導体装置の製造方法であって、前記第１成膜工程の前に、前記第１パターンをトリミングするとともに、下層の有機材料からなる反射防止膜をエッチングする工程と、前記第１成膜工程の前に、前記第３パターンをトリミングするとともに、下層の有機材料からなる反射防止膜をエッチングする工程とを具備したことを特徴とする。   A method for manufacturing a semiconductor device according to claim 9 is the method for manufacturing a semiconductor device according to claim 7 or 8, wherein the first pattern is trimmed before the first film forming step, and an organic material in a lower layer is trimmed. And a step of trimming the third pattern and etching the antireflection film made of an underlying organic material before the first film formation step. And

請求項１０の半導体装置の製造方法は、請求項７〜９いずれか１項記載の半導体装置の製造方法であって、前記第１マスク構成層がシリコンからなり、前記第２マスク構成層が窒化シリコンからなることを特徴とする。   The method for manufacturing a semiconductor device according to claim 10 is the method for manufacturing a semiconductor device according to any one of claims 7 to 9, wherein the first mask constituent layer is made of silicon, and the second mask constituent layer is nitrided. It is made of silicon.

請求項１１の半導体装置の製造装置は、基板上の被エッチング層を所定のパターンにエッチングして、半導体装置を製造する半導体装置の製造装置であって、前記基板を収容する処理チャンバーと、前記処理チャンバー内に処理ガスを供給する処理ガス供給手段と、前記処理チャンバー内で請求項１から請求項１０いずれか１項記載の半導体装置の製造方法が行われるように制御する制御部とを備えたことを特徴とする。   The semiconductor device manufacturing apparatus according to claim 11 is a semiconductor device manufacturing apparatus for manufacturing a semiconductor device by etching a layer to be etched on a substrate into a predetermined pattern, the processing chamber containing the substrate, 11. A processing gas supply means for supplying a processing gas into the processing chamber, and a control unit for controlling the semiconductor device manufacturing method according to claim 1 to be performed in the processing chamber. It is characterized by that.

請求項１２の制御プログラムは、コンピュータ上で動作し、実行時に、請求項１から請求項１０いずれか１項記載の半導体装置の製造方法が行われるよう半導体装置の製造装置を制御することを特徴とする。   A control program according to a twelfth aspect of the present invention operates on a computer and controls a semiconductor device manufacturing apparatus so that the semiconductor device manufacturing method according to any one of the first to tenth aspects is performed at the time of execution. And

請求項１３のプログラム記憶媒体は、コンピュータ上で動作する制御プログラムが記憶されプログラム記憶媒体であって、前記制御プログラムは、実行時に請求項１から請求項１０いずれか１項記載の半導体装置の製造方法が行われるように半導体装置の製造装置を制御することを特徴とする。   The program storage medium according to claim 13 is a program storage medium in which a control program operating on a computer is stored, and the control program is manufactured when the semiconductor device according to any one of claims 1 to 10 is executed. Controlling a semiconductor device manufacturing apparatus to perform the method.

本発明によれば、従来に比べて工程の簡略化と製造コストの低減を図ることができ、生産性の向上を図ることのできる半導体装置の製造方法、半導体装置の製造装置、制御プログラム及びプログラム記憶媒体を提供することができる。   According to the present invention, a method of manufacturing a semiconductor device, a manufacturing apparatus of a semiconductor device, a control program, and a program capable of simplifying the process and reducing the manufacturing cost and improving the productivity as compared with the prior art. A storage medium can be provided.

以下、本発明の一実施形態について図面を参照して説明する。   Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

図１は、本発明の第１実施形態に係る半導体ウエハの一部を拡大して模式的に示し、第１実施形態にかかる半導体装置の製造方法の工程を示すものである。図１（ａ）に示すように、この第１実施形態では、パターニングを目的とする被エッチング層としてのポリシリコン層１０１の上には、有機材料からなる反射防止膜（ＢＡＲＣ）１０２が形成されており、この反射防止膜（ＢＡＲＣ）１０２の上にフォトレジスト１０３が形成されている。フォトレジスト１０３は、露光、現像工程により、パターニングされ、所定形状を有するパターンとされている。なお、図１において１００は、ポリシリコン層１０１の下側に設けられた下地層を示している。   FIG. 1 schematically shows an enlarged part of a semiconductor wafer according to a first embodiment of the present invention, and shows the steps of a method for manufacturing a semiconductor device according to the first embodiment. As shown in FIG. 1A, in the first embodiment, an antireflection film (BARC) 102 made of an organic material is formed on a polysilicon layer 101 as an etching target layer for patterning. A photoresist 103 is formed on the antireflection film (BARC) 102. The photoresist 103 is patterned by exposure and development processes to form a pattern having a predetermined shape. In FIG. 1, reference numeral 100 denotes a base layer provided below the polysilicon layer 101.

図１（ｂ）は、上記のフォトレジスト１０３をトリミングして線幅を細くするとともに、反射防止膜（ＢＡＲＣ）１０２をエッチングした状態を示している。このフォトレジスト１０３のトリミング及び反射防止膜（ＢＡＲＣ）１０２のエッチングを行う工程は、例えば、酸素プラズマ等を用いたプラズマエッチングにより行うことができる。   FIG. 1B shows a state in which the photoresist 103 is trimmed to reduce the line width and the antireflection film (BARC) 102 is etched. The process of trimming the photoresist 103 and etching the antireflection film (BARC) 102 can be performed by, for example, plasma etching using oxygen plasma or the like.

次に、図１（ｃ）に示すように、ＳｉＯ2膜１０４を成膜する。この成膜工程では、フォトレジスト１０３の上に成膜を行うが、一般的にフォトレジスト１０３は、高温に晒されると倒れを生じる等、高温に弱いので、低温（例えば３００℃以下程度）で成膜することが好ましい。この場合、加熱触媒体で成膜ガスを活性化させた化学気相成長によって行うことができる。 Next, as shown in FIG. 1C, a SiO 2 film 104 is formed. In this film forming process, a film is formed on the photoresist 103. In general, the photoresist 103 is susceptible to high temperatures, such as being tilted when exposed to a high temperature. It is preferable to form a film. In this case, it can be performed by chemical vapor deposition in which the film forming gas is activated by the heating catalyst body.

次に、図１（ｄ）に示すように、ＳｉＯ2膜１０４をエッチングし、ＳｉＯ2膜１０４が、フォトレジスト１０３のパターンの側壁部にのみ残った状態とする。このエッチングは、例えば、ＣＦ4、Ｃ4Ｆ8、ＣＨＦ3、ＣＨ3Ｆ、ＣＨ2Ｆ2等のＣＦ系ガスと、Ａｒガス等の混合ガス、またはこの混合ガスに必要に応じて酸素を添加したガス等を用いて行うことができる。 Next, as shown in FIG. 1D, the SiO 2 film 104 is etched so that the SiO 2 film 104 remains only on the side wall portion of the pattern of the photoresist 103. For this etching, for example, CF gas such as CF 4 , C 4 F 8 , CHF 3 , CH 3 F, and CH 2 F 2 and a mixed gas such as Ar gas, or oxygen may be added to this mixed gas as necessary. It can be performed using an added gas or the like.

次に、図１（ｅ）に示すように、酸素プラズマを用いたアッシング等により、フォトレジスト１０３のパターンを除去し、側壁部に残ったＳｉＯ2膜１０４によるパターンを形成する。 Next, as shown in FIG. 1E, the pattern of the photoresist 103 is removed by ashing using oxygen plasma or the like to form a pattern of the SiO 2 film 104 remaining on the side wall.

そして、図１（ｆ）に示すように、上記のＳｉＯ2膜１０４によるパターンをマスクとして、下層のポリシリコン層１０１をエッチングする。このエッチングは、例えば、ＨＢｒガス等を用いて行うことができる。 Then, as shown in FIG. 1F, the underlying polysilicon layer 101 is etched using the pattern made of the SiO 2 film 104 as a mask. This etching can be performed using, for example, HBr gas.

上記の第１実施形態では、犠牲膜を用いることなく、ＳＷＴ法による微細なパターンの形成を行うことができる。また、工程の途中でウエットエッチングを行うことなく、エッチング工程は全てドライエッチング工程によって実施できる。したがって、従来に比べて工程の簡略化と製造コストの低減を図ることができ、生産性の向上を図ることができる。   In the first embodiment, a fine pattern can be formed by the SWT method without using a sacrificial film. In addition, the entire etching process can be performed by a dry etching process without performing wet etching in the middle of the process. Therefore, the process can be simplified and the manufacturing cost can be reduced as compared with the conventional case, and the productivity can be improved.

実際に、図１（ｃ）に示す工程で加熱触媒体で成膜ガスを活性化させた化学気相成長によって厚さ約３５ｎｍのＳｉＯ2膜１０４を成膜し、対向電極の上部電極と下部電極とに高周波電力を供給してプラズマエッチングを行う装置を用い、以下の条件で各工程のエッチングを行ったところ、ポリシリコン層１０１（厚さ約１００ｎｍ（下地層が酸化膜））を良好な形状にパターニングすることができた。
（図１（ｂ），（ｅ）のフォトレジスト１０３、反射防止膜１０２のエッチング）
エッチングガス：Ｏ2（３７４ｓｃｃｍ）
圧力：１３．３Ｐａ（１００ｍＴｏｒｒ）
電力：６００Ｗ（上部）／３０Ｗ（下部）
（図１（ｄ）のＳｉＯ2膜１０４のエッチング）
エッチングガス：Ａｒ／Ｃ4Ｆ8（５００ｓｃｃｍ／２０ｓｃｃｍ）
圧力：５．３Ｐａ（４０ｍＴｏｒｒ）
電力：６００Ｗ（上部）／１００Ｗ（下部）
（図１（ｆ）のポリシリコン層１０１のエッチング）
（メインエッチング）
エッチングガス：ＨＢｒ／Ｏ2（４００ｓｃｃｍ／２ｓｃｃｍ）
圧力：４．０Ｐａ（３０ｍＴｏｒｒ）
電力：２００Ｗ（上部）／１５０Ｗ（下部）
（オーバーエッチング）
エッチングガス：ＨＢｒ／Ｏ2（９３４ｓｃｃｍ／４ｓｃｃｍ）
圧力：２０．０Ｐａ（１５０ｍＴｏｒｒ）
電力：６５０Ｗ（上部）／２００Ｗ（下部） Actually, an SiO 2 film 104 having a thickness of about 35 nm is formed by chemical vapor deposition in which the film forming gas is activated by the heating catalyst in the step shown in FIG. Using an apparatus that performs plasma etching by supplying high-frequency power to the electrodes, etching of each step was performed under the following conditions. As a result, the polysilicon layer 101 (thickness of about 100 nm (underlayer is an oxide film)) was excellent. The pattern could be patterned.
(Etching of the photoresist 103 and the antireflection film 102 in FIGS. 1B and 1E)
Etching gas: O 2 (374 sccm)
Pressure: 13.3 Pa (100 mTorr)
Power: 600W (upper part) / 30W (lower part)
(Etching of SiO 2 film 104 in FIG. 1D)
Etching gas: Ar / C 4 F 8 (500 sccm / 20 sccm)
Pressure: 5.3 Pa (40 mTorr)
Power: 600W (upper part) / 100W (lower part)
(Etching of polysilicon layer 101 in FIG. 1 (f))
(Main etching)
Etching gas: HBr / O 2 (400 sccm / 2 sccm)
Pressure: 4.0 Pa (30 mTorr)
Power: 200W (top) / 150W (bottom)
(Over-etching)
Etching gas: HBr / O 2 (934 sccm / 4 sccm)
Pressure: 20.0 Pa (150 mTorr)
Power: 650W (upper part) / 200W (lower part)

図２は、上記した第１実施形態におけるポリシリコン層１０１と反射防止膜（ＢＡＲＣ）１０２との間に、他の膜、例えばＳｉ3Ｎ4膜１２０が形成されている第２実施形態の半導体装置の製造工程を示すものである。この第２実施形態の場合、図１に示した第１実施形態の場合と同様にして図２（ａ）〜（ｅ）の工程を行う。そしてこの後、ＳｉＯ2膜１０４によるパターンをマスクとして、下層のＳｉ3Ｎ4膜１２０をエッチングし（ｆ）、このＳｉ3Ｎ4膜１２０等をマスクとしてポリシリコン層１０１をエッチングする（ｇ）。なお、図２の場合において、Ｓｉ3Ｎ4膜１２０に代えてＳｉＯＮ（酸窒化シリコン）膜を用いてもよい。 FIG. 2 shows a semiconductor according to the second embodiment in which another film, for example, a Si 3 N 4 film 120 is formed between the polysilicon layer 101 and the antireflection film (BARC) 102 in the first embodiment. The manufacturing process of an apparatus is shown. In the case of the second embodiment, the steps of FIGS. 2A to 2E are performed in the same manner as in the case of the first embodiment shown in FIG. Thereafter, the lower Si 3 N 4 film 120 is etched using the pattern formed by the SiO 2 film 104 as a mask (f), and the polysilicon layer 101 is etched using the Si 3 N 4 film 120 and the like as a mask (g). . In the case of FIG. 2, a SiON (silicon oxynitride) film may be used instead of the Si 3 N 4 film 120.

図３は、第３実施形態の半導体装置の製造方法の工程を示すものである。図３（ａ）に示すように、この第３実施形態では、例えば、酸化膜、窒化膜、ポリシリコン等からなり、パターニングを目的とする被エッチング層１３１の上には、有機膜１３２が形成されており、この有機膜１３２の上に、無機材料からなる反射防止膜としてＳＯＧ膜（又はＬＴＯ膜）１３３が形成されており、このＳＯＧ膜（又はＬＴＯ膜）１３３の上にフォトレジスト１３４が形成されている。フォトレジスト１３４は、露光、現像工程により、パターニングされ、所定形状を有するパターンとされている。   FIG. 3 shows the steps of the semiconductor device manufacturing method according to the third embodiment. As shown in FIG. 3A, in the third embodiment, for example, an organic film 132 is formed on an etching target layer 131 made of an oxide film, a nitride film, polysilicon, or the like for the purpose of patterning. On the organic film 132, an SOG film (or LTO film) 133 is formed as an antireflection film made of an inorganic material. A photoresist 134 is formed on the SOG film (or LTO film) 133. Is formed. The photoresist 134 is patterned by an exposure and development process to form a pattern having a predetermined shape.

図３（ｂ）は、上記のフォトレジスト１３４をトリミングして線幅を細くした状態を示している。このフォトレジスト１３４のトリミングを行う工程は、例えば、酸素プラズマ等を用いたプラズマエッチングにより行うことができる。なお、このトリミング工程は、必要に応じて行うものであり、フォトレジスト１３４が所望の線幅となっている場合は、省略される。   FIG. 3B shows a state where the photoresist 134 is trimmed to reduce the line width. The step of trimming the photoresist 134 can be performed by, for example, plasma etching using oxygen plasma or the like. This trimming step is performed as necessary, and is omitted when the photoresist 134 has a desired line width.

次に、図３（ｃ）に示すように、ＳｉＯ2膜１３５を成膜する。この成膜工程では、フォトレジスト１３４の上に成膜を行うため、前述したように、低温（例えば３００℃以下程度）で成膜することが好ましく、加熱触媒体で成膜ガスを活性化させた化学気相成長等によって行うことができる。 Next, as shown in FIG. 3C, a SiO 2 film 135 is formed. In this film forming process, since the film is formed on the photoresist 134, it is preferable to form the film at a low temperature (for example, about 300 ° C. or less) as described above, and the film forming gas is activated by the heating catalyst body. It can be performed by chemical vapor deposition or the like.

次に、図３（ｄ）に示すように、ＳｉＯ2膜１３５をエッチングし、ＳｉＯ2膜１３５が、フォトレジスト１３４のパターンの側壁部にのみ残った状態とする。このエッチングは、例えば、ＣＦ4、Ｃ4Ｆ8、ＣＨＦ3、ＣＨ3Ｆ、ＣＨ2Ｆ2等のＣＦ系ガスと、Ａｒガス等の混合ガス、またはこの混合ガスに必要に応じて酸素を添加したガス等を用いて行うことができる。 Next, as shown in FIG. 3D, the SiO 2 film 135 is etched so that the SiO 2 film 135 remains only on the side wall portion of the pattern of the photoresist 134. For this etching, for example, CF gas such as CF 4 , C 4 F 8 , CHF 3 , CH 3 F, and CH 2 F 2 and a mixed gas such as Ar gas, or oxygen may be added to this mixed gas as necessary. It can be performed using an added gas or the like.

次に、図３（ｅ）に示すように、酸素プラズマを用いたアッシング等により、フォトレジスト１３４のパターンを除去し、側壁部に残ったＳｉＯ2膜１３５によるパターンを形成する。 Next, as shown in FIG. 3E, the pattern of the photoresist 134 is removed by ashing using oxygen plasma or the like, and a pattern of the SiO 2 film 135 remaining on the side wall is formed.

この後、図３（ｆ）に示すように、上記のＳｉＯ2膜１３５によるパターンをマスクとして、下層のＳＯＧ膜（又はＬＴＯ膜）１３３をエッチングし、さらに、図３（ｇ）に示すように、下層の有機膜１３２をエッチングする。そして、パターニングされた有機膜１３２を含むマスクを介して下層の被エッチング層１３１をエッチングする。この場合被エッチング層１３１は、ポリシリコン等の他、酸化膜、窒化膜等の無機材料からなる膜であってもよい。なお、ＳＯＧ膜（又はＬＴＯ膜）１３３のエッチングは、前述したＣＦ系ガス等からなる混合ガスを用いて行うことができ、有機膜１３２のエッチングは、酸素又は窒素等のガスを用いて行うことができる。 Thereafter, as shown in FIG. 3 (f), the underlying SOG film (or LTO film) 133 is etched using the pattern of the SiO 2 film 135 as a mask, and further, as shown in FIG. 3 (g). Then, the lower organic film 132 is etched. Then, the lower etching target layer 131 is etched through a mask including the patterned organic film 132. In this case, the layer to be etched 131 may be a film made of an inorganic material such as an oxide film or a nitride film in addition to polysilicon. Note that the etching of the SOG film (or LTO film) 133 can be performed using the above-described mixed gas composed of a CF-based gas or the like, and the etching of the organic film 132 is performed using a gas such as oxygen or nitrogen. Can do.

図４は、上記した第３実施形態におけるＳＯＧ膜（又はＬＴＯ膜）１３３の代わりに反射防止膜としてＳｉＯＮ膜１４０が形成されている第４実施形態の半導体装置の製造工程を示すものである。この第４実施形態の場合、図３に示した第３実施形態の場合の図３（ａ）〜（ｇ）の工程と同様にして図４（ａ）〜（ｇ）の工程を行う。   FIG. 4 shows a manufacturing process of the semiconductor device of the fourth embodiment in which the SiON film 140 is formed as an antireflection film instead of the SOG film (or LTO film) 133 in the third embodiment. In the case of the fourth embodiment, the steps of FIGS. 4A to 4G are performed in the same manner as the steps of FIGS. 3A to 3G in the case of the third embodiment shown in FIG.

次に、図６乃至１０を参照して、第５実施形態について説明する。図６（ａ）に示すように、この第５実施形態では、パターニングを目的とする被エッチング層としての酸化シリコン層５００の上には、第２マスク構成層としての窒化シリコン層５０１が形成されている。この窒化シリコン層５０１の上には、第１マスク構成層としてのアモルファスシリコン層５０２が形成されている。このアモルファスシリコン層５０２は、ポリシリコン層であってもよい。このアモルファスシリコン層５０２の上に、有機材料からなる反射防止膜（ＢＡＲＣ）５０３が形成されている。そして、この反射防止膜（ＢＡＲＣ）５０３の上にフォトレジスト５０４が形成されている。フォトレジスト５０４は、露光、現像工程により、パターニングされ、複数のライン形状を有する所定パターン（第１パターン）とされている。このフォトレジスト５０４のライン形状のパターンは、例えば、ラインの幅（線幅）が６０ｎｍ、ラインとラインとの間の間隔が６０ｎｍ等とされる。   Next, a fifth embodiment will be described with reference to FIGS. As shown in FIG. 6A, in the fifth embodiment, a silicon nitride layer 501 as a second mask constituting layer is formed on a silicon oxide layer 500 as an etching target layer for patterning. ing. On the silicon nitride layer 501, an amorphous silicon layer 502 as a first mask constituent layer is formed. The amorphous silicon layer 502 may be a polysilicon layer. On the amorphous silicon layer 502, an antireflection film (BARC) 503 made of an organic material is formed. A photoresist 504 is formed on the antireflection film (BARC) 503. The photoresist 504 is patterned by exposure and development processes to form a predetermined pattern (first pattern) having a plurality of line shapes. The line-shaped pattern of the photoresist 504 has, for example, a line width (line width) of 60 nm, an interval between lines of 60 nm, and the like.

図６（ｂ）は、上記のフォトレジスト５０４をトリミングして線幅を細くする（例えば、３０ｎｍとする）とともに、反射防止膜（ＢＡＲＣ）５０３をエッチングした状態を示している。このフォトレジスト５０４のトリミング及び反射防止膜（ＢＡＲＣ）５０３のエッチングを行う工程は、例えば、酸素プラズマ等を用いたプラズマエッチングにより行うことができる。   FIG. 6B shows a state in which the photoresist 504 is trimmed to reduce the line width (for example, 30 nm) and the antireflection film (BARC) 503 is etched. The process of trimming the photoresist 504 and etching the antireflection film (BARC) 503 can be performed by, for example, plasma etching using oxygen plasma or the like.

次に、図６（ｃ）に示すように、フォトレジスト５０４の上に、ＳｉＯ2膜５０５を成膜する第１成膜工程を行う。この成膜工程は、前述した実施形態と同様に、加熱触媒体で成膜ガスを活性化させた化学気相成長等によって行う。 Next, as shown in FIG. 6C, a first film forming step for forming a SiO 2 film 505 on the photoresist 504 is performed. This film forming step is performed by chemical vapor deposition or the like in which the film forming gas is activated by the heating catalyst as in the embodiment described above.

次に、図６（ｄ）に示すように、ＳｉＯ2膜５０５をエッチングし、ＳｉＯ2膜５０５が、フォトレジスト５０４のパターンの側壁部にのみ残った状態とする第１エッチング工程を行う。このエッチングは、例えば、ＣＦ4、Ｃ4Ｆ8、ＣＨＦ3、ＣＨ3Ｆ、ＣＨ2Ｆ2等のＣＦ系ガスと、Ａｒガス等の混合ガス、またはこの混合ガスに必要に応じて酸素を添加したガス等を用いて行うことができる。 Next, as shown in FIG. 6D, a first etching step is performed in which the SiO 2 film 505 is etched so that the SiO 2 film 505 remains only on the sidewalls of the photoresist 504 pattern. For this etching, for example, CF gas such as CF 4 , C 4 F 8 , CHF 3 , CH 3 F, and CH 2 F 2 and a mixed gas such as Ar gas, or oxygen may be added to this mixed gas as necessary. It can be performed using an added gas or the like.

次に、図６（ｅ）に示すように、酸素プラズマを用いたアッシング等により、フォトレジスト５０４のパターンを除去して、側壁部に残ったＳｉＯ2膜５０５によるパターン（第２パターン）を形成する第２パターン形成工程を行い、このＳｉＯ2膜５０５によるパターンをマスクとしてアモルファスシリコン層５０２をエッチングする第２エッチング工程を行う。アモルファスシリコン層５０２のエッチングは、例えば、ＨＢｒガス等を用いて行うことができる。 Next, as shown in FIG. 6E, the pattern of the photoresist 504 is removed by ashing using oxygen plasma or the like, and a pattern (second pattern) is formed by the SiO 2 film 505 remaining on the side wall. A second pattern forming step is performed, and a second etching step is performed in which the amorphous silicon layer 502 is etched using the pattern formed by the SiO 2 film 505 as a mask. The etching of the amorphous silicon layer 502 can be performed using, for example, HBr gas.

そして、図６（ｆ）に示すように、エッチングマスクとして使用したＳｉＯ2膜５０５を除去する。以上の工程によって、図７の平面図に示すように、半導体ウエハを上から見たときに、アモルファスシリコン層５０２がライン状（線幅例えば３０ｎｍ、間隔例えば３０ｎｍ）に形成され、これらのアモルファスシリコン層５０２の間に、下層の窒化シリコン層５０１が露出した状態となる。なお、図６（ｆ）は、図７の一点鎖線で示すＡ断面の断面図である。 Then, as shown in FIG. 6F, the SiO 2 film 505 used as an etching mask is removed. Through the above steps, as shown in the plan view of FIG. 7, when the semiconductor wafer is viewed from above, the amorphous silicon layer 502 is formed in a line shape (line width of 30 nm, interval of 30 nm, for example). The lower silicon nitride layer 501 is exposed between the layers 502. FIG. 6F is a cross-sectional view of the A cross section indicated by the alternate long and short dash line in FIG.

次に、上記した図６（ｆ）の状態から、図８（Ｂ１）、（Ｃ１）に示すように、反射防止膜（ＢＡＲＣ）５１３を形成し、その上に塗布、露光、現像工程によってパターニングしたフォトレジスト５１４（第３パターン）を形成する第３パターン形成工程を行う。このフォトレジスト５１４は、図７に示したライン状のアモルファスシリコン層５０２と直行する方向のライン状のパターンで、例えば、ラインの幅（線幅）が６０ｎｍ、ラインとラインとの間の間隔が６０ｎｍのパターンからなる。なお、図８の左側には、後述する図９に示す平面図におけるＢ断面、図８の右側には、Ｃ断面を示してある。   Next, as shown in FIGS. 8B1 and 8C1, the antireflection film (BARC) 513 is formed from the state shown in FIG. A third pattern forming process is performed to form the photoresist 514 (third pattern). This photoresist 514 is a line-shaped pattern in a direction orthogonal to the line-shaped amorphous silicon layer 502 shown in FIG. 7, for example, the line width (line width) is 60 nm, and the distance between the lines is It consists of a 60 nm pattern. The left side of FIG. 8 shows a B section in a plan view shown in FIG. 9 to be described later, and the right side of FIG. 8 shows a C section.

図８（Ｂ２），（Ｃ２）は、上記のフォトレジスト５１４をトリミングして線幅を細くする（例えば、３０ｎｍとする）とともに、反射防止膜（ＢＡＲＣ）５１３をエッチングした状態を示している。このフォトレジスト５１４のトリミング及び反射防止膜（ＢＡＲＣ）５１３のエッチングを行う工程は、例えば、酸素プラズマ等を用いたプラズマエッチングにより行うことができる。   FIGS. 8B2 and 8C2 show a state in which the photoresist 514 is trimmed to reduce the line width (for example, 30 nm) and the antireflection film (BARC) 513 is etched. The process of trimming the photoresist 514 and etching the antireflection film (BARC) 513 can be performed by, for example, plasma etching using oxygen plasma or the like.

次に、図８（Ｂ３），（Ｃ３）に示すように、ＳｉＯ2膜５１５を成膜する第２成膜工程を行う。この成膜工程は、前述した実施形態と同様に、例えば、加熱触媒体で成膜ガスを活性化させた化学気相成長等によって行う。 Next, as shown in FIGS. 8B3 and 8C3, a second film forming process for forming the SiO 2 film 515 is performed. This film forming step is performed, for example, by chemical vapor deposition in which a film forming gas is activated by a heating catalyst body, as in the above-described embodiment.

次に、図８（Ｂ４），（Ｃ４）に示すように、ＳｉＯ2膜５１５をエッチングし、ＳｉＯ2膜５１５が、フォトレジスト５１４のパターンの側壁部にのみ残った状態とする第３エッチング工程を行う。このエッチングは、例えば、ＣＦ4、Ｃ4Ｆ8、ＣＨＦ3、ＣＨ3Ｆ、ＣＨ2Ｆ2等のＣＦ系ガスと、Ａｒガス等の混合ガス、またはこの混合ガスに必要に応じて酸素を添加したガス等を用いて行うことができる。 Next, as shown in FIGS. 8B4 and 8C4, the SiO 2 film 515 is etched so that the SiO 2 film 515 remains only on the sidewalls of the photoresist 514 pattern. I do. For this etching, for example, CF gas such as CF 4 , C 4 F 8 , CHF 3 , CH 3 F, and CH 2 F 2 and a mixed gas such as Ar gas, or oxygen may be added to this mixed gas as necessary. It can be performed using an added gas or the like.

次に、図８（Ｂ５），（Ｃ５）に示すように、酸素プラズマを用いたアッシング等により、フォトレジスト５１４のパターンを除去して、側壁部に残ったＳｉＯ2膜５１５によるパターン（第４パターン）を形成する第４パターン形成工程を行う。 Next, as shown in FIGS. 8B5 and 8C5, the pattern of the photoresist 514 is removed by ashing using oxygen plasma or the like, and the pattern (fourth pattern) formed by the SiO 2 film 515 remaining on the side wall portion. A fourth pattern forming step for forming (pattern) is performed.

次に、図８（Ｂ６），（Ｃ６）に示すように、ＳｉＯ2膜５１５によるパターン及びアモルファスシリコン層５０２をマスクとして、窒化シリコン層５０１をエッチングする第４エッチング工程を行う。窒化シリコン層５０１のエッチングは、例えば、例えば、ＣＦ4、Ｃ4Ｆ8、ＣＨＦ3、ＣＨ3Ｆ、ＣＨ2Ｆ2等のＣＦ系ガスと、Ａｒガス等の混合ガス、またはこの混合ガスに必要に応じて酸素を添加したガス等を用いて行うことができる。この状態では、図９の平面図に示すように、半導体ウエハを上から見たときに、ライン状のＳｉＯ2膜５１５と、このライン状のＳｉＯ2膜５１５の間の矩形状のアモルファスシリコン層５０２に囲まれて矩形状に酸化シリコン層５００が露出した領域が形成された状態となっている。 Next, as shown in FIGS. 8B6 and 8C6, a fourth etching process for etching the silicon nitride layer 501 is performed using the pattern of the SiO 2 film 515 and the amorphous silicon layer 502 as a mask. Etching of the silicon nitride layer 501 is performed by, for example, using a CF-based gas such as CF 4 , C 4 F 8 , CHF 3 , CH 3 F, or CH 2 F 2 , a mixed gas such as Ar gas, or this mixed gas. It can be performed using a gas to which oxygen is added as required. In this state, as shown in the plan view of FIG. 9, when the semiconductor wafer is viewed from above, a line-shaped SiO 2 film 515 and a rectangular amorphous silicon layer between the line-shaped SiO 2 film 515 are obtained. A region where the silicon oxide layer 500 is exposed in a rectangular shape surrounded by 502 is formed.

次に、図１０に示すように、ＳｉＯ2膜５１５を除去するとともに、アモルファスシリコン層５０２及び窒化シリコン層５０１をマスクとして、酸化シリコン層５００をエッチングする第５エッチング工程を行う。以上の工程によって、図１０に示すように、酸化シリコン層５００にシリコンウエハＷの表面が露出するホール形状を形成する。なお、図１０（ａ）は平面図、図１０（ｂ）は、図１０（ａ）に示す一点鎖線Ｂに沿った断面図、図１０（ｃ）は、図１０（ａ）に示す一点鎖線Ｃに沿った断面図である。 Next, as shown in FIG. 10, the SiO 2 film 515 is removed, and a fifth etching process is performed to etch the silicon oxide layer 500 using the amorphous silicon layer 502 and the silicon nitride layer 501 as a mask. Through the above steps, as shown in FIG. 10, a hole shape in which the surface of the silicon wafer W is exposed is formed in the silicon oxide layer 500. 10A is a plan view, FIG. 10B is a cross-sectional view taken along the alternate long and short dash line B shown in FIG. 10A, and FIG. 10C is the alternate long and short dash line shown in FIG. It is sectional drawing along C.

上記の第５実施形態によれば、例えば、１辺が３０ｎｍ等の微細なホール形状のパターンを形成することができる。   According to the fifth embodiment, for example, a fine hole-shaped pattern with one side of 30 nm or the like can be formed.

図５は、上記の半導体装置の製造方法を実施するための半導体装置の製造装置の構成の一例を模式的に示す上面図である。半導体装置の製造装置１の中央部分には、真空搬送チャンバ１０が設けられており、この真空搬送チャンバ１０に沿って、その周囲には、複数（本実施形態では６個）の処理チャンバ１１〜１６が配設されている。これらの処理チャンバーは、内部でプラズマエッチング及び加熱触媒体で成膜ガスを活性化させた化学気相成長を行うものである。   FIG. 5 is a top view schematically showing an example of the configuration of a semiconductor device manufacturing apparatus for carrying out the semiconductor device manufacturing method described above. A vacuum transfer chamber 10 is provided in the central portion of the semiconductor device manufacturing apparatus 1, and a plurality of (six in the present embodiment) processing chambers 11 are provided around the vacuum transfer chamber 10. 16 is disposed. These processing chambers perform chemical vapor deposition in which a film forming gas is activated by plasma etching and a heating catalyst inside.

真空搬送チャンバ１０の手前側（図中下側）には、２つのロードロックチャンバ１７が設けられ、これらのロードロックチャンバ１７のさらに手前側（図中下側）には、大気中で基板（本実施形態では半導体ウエハＷ）を搬送するための搬送チャンバ１８が設けられている。また、搬送チャンバ１８のさらに手前側（図中下側）には、複数枚の半導体ウエハＷを収容可能とされた基板収容ケース（カセット又はフープ）が配置される載置部１９が複数（図５では３つ）設けられており、搬送チャンバ１８の側方（図中左側）には、オリエンテーションフラット或いはノッチにより半導体ウエハＷの位置を検出するオリエンタ２０が設けられている。   Two load lock chambers 17 are provided on the front side (lower side in the figure) of the vacuum transfer chamber 10, and a substrate (in the atmosphere) on the further front side (lower side in the figure) of these load lock chambers 17. In the present embodiment, a transfer chamber 18 for transferring the semiconductor wafer W) is provided. In addition, on the further front side (lower side in the drawing) of the transfer chamber 18, there are a plurality of mounting portions 19 (in the drawing) in which a substrate storage case (cassette or hoop) capable of storing a plurality of semiconductor wafers W is disposed. 3 is provided on the side of the transfer chamber 18 (left side in the figure), and an orienter 20 for detecting the position of the semiconductor wafer W by an orientation flat or notch is provided.

ロードロックチャンバ１７と搬送チャンバ１８との間、ロードロックチャンバ１７と真空搬送チャンバ１０との間、真空搬送チャンバ１０と処理チャンバ１１〜１６との間には、夫々ゲートバルブ２２が設けられ、これらの間を気密に閉塞及び開放できるようになっている。また、真空搬送チャンバ１０内には真空搬送機構３０が設けられている。この真空搬送機構３０は、第１のピック３１と第２のピック３２を具備し、これらによって２枚の半導体ウエハＷを支持可能に構成されており、各処理チャンバ１１〜１６、ロードロック室１７に、半導体ウエハＷを搬入、搬出できるよう構成されている。   Gate valves 22 are provided between the load lock chamber 17 and the transfer chamber 18, between the load lock chamber 17 and the vacuum transfer chamber 10, and between the vacuum transfer chamber 10 and the processing chambers 11 to 16, respectively. It is possible to block and open the space between the two. A vacuum transfer mechanism 30 is provided in the vacuum transfer chamber 10. The vacuum transfer mechanism 30 includes a first pick 31 and a second pick 32, and is configured so as to be able to support two semiconductor wafers W. The processing chambers 11 to 16 and the load lock chamber 17 are supported by these. In addition, the semiconductor wafer W can be loaded and unloaded.

また、搬送チャンバ１８内には、大気搬送機構４０が設けられている。この大気搬送機構４０は、第１のピック４１と第２のピック４２とを具備しており、これらによって２枚の半導体ウエハＷを支持可能に構成されている。大気搬送機構４０は、載置部１９に載置された各カセット又はフープ、ロードロック室１７、オリエンタ２０に半導体ウエハＷを搬入、搬出できるよう構成されている。   An atmospheric transfer mechanism 40 is provided in the transfer chamber 18. The atmospheric transfer mechanism 40 includes a first pick 41 and a second pick 42, and is configured to support two semiconductor wafers W by these. The atmospheric transfer mechanism 40 is configured so that the semiconductor wafer W can be loaded into and unloaded from each cassette or hoop, the load lock chamber 17, and the orienter 20 mounted on the mounting unit 19.

上記構成の半導体装置の製造装置１は、制御部６０によって、その動作が統括的に制御される。この制御部６０には、ＣＰＵを備え半導体装置の製造装置１の各部を制御するプロセスコントローラ６１と、ユーザインターフェース部６２と、記憶部６３とが設けられている。   The operation of the semiconductor device manufacturing apparatus 1 having the above-described configuration is comprehensively controlled by the control unit 60. The control unit 60 includes a CPU, a process controller 61 that controls each unit of the semiconductor device manufacturing apparatus 1, a user interface unit 62, and a storage unit 63.

ユーザインターフェース部６２は、工程管理者が半導体装置の製造装置１を管理するためにコマンドの入力操作を行うキーボードや、半導体装置の製造装置１の稼働状況を可視化して表示するディスプレイ等から構成されている。   The user interface unit 62 includes a keyboard that allows a process manager to input commands to manage the semiconductor device manufacturing apparatus 1, a display that visualizes and displays the operating status of the semiconductor device manufacturing apparatus 1, and the like. ing.

記憶部６３には、半導体装置の製造装置１で実行される各種処理をプロセスコントローラ６１の制御にて実現するための制御プログラム（ソフトウエア）や処理条件データ等が記憶されたレシピが格納されている。そして、必要に応じて、ユーザインターフェース部６２からの指示等にて任意のレシピを記憶部６３から呼び出してプロセスコントローラ６１に実行させることで、プロセスコントローラ６１の制御下で、半導体装置の製造装置１での所望の処理が行われる。また、制御プログラムや処理条件データ等のレシピは、コンピュータで読取り可能なプログラム記憶媒体（例えば、ハードディスク、ＣＤ、フレキシブルディスク、半導体メモリ等）などに格納された状態のものを利用したり、或いは、他の装置から、例えば専用回線を介して随時伝送させてオンラインで利用したりすることも可能である。   The storage unit 63 stores a recipe that stores a control program (software), processing condition data, and the like for realizing various processes executed by the semiconductor device manufacturing apparatus 1 under the control of the process controller 61. Yes. If necessary, an arbitrary recipe is called from the storage unit 63 according to an instruction from the user interface unit 62 and is executed by the process controller 61, so that the semiconductor device manufacturing apparatus 1 is controlled under the process controller 61. The desired processing at is performed. In addition, recipes such as control programs and processing condition data may be stored in a computer-readable program storage medium (eg, hard disk, CD, flexible disk, semiconductor memory, etc.), or It is also possible to transmit the data from other devices as needed via a dedicated line and use it online.

上記構成の半導体装置の製造装置１を用いて、第１〜５実施形態に示した一連の工程を実施することができる。なお、成膜工程については、一旦半導体ウエハＷを上記の半導体装置の製造装置１から搬出して他の装置によって行ってもよい。また、フォトレジストの塗布、露光、現像工程については、他の塗布装置、露光装置、現像装置によって行う。   A series of steps shown in the first to fifth embodiments can be performed using the semiconductor device manufacturing apparatus 1 having the above-described configuration. In addition, about the film-forming process, you may carry out semiconductor wafer W once from the said semiconductor device manufacturing apparatus 1 and another apparatus. The photoresist coating, exposure, and development processes are performed by other coating apparatuses, exposure apparatuses, and development apparatuses.

本発明の第１実施形態の工程を模式的に示す図。The figure which shows the process of 1st Embodiment of this invention typically. 本発明の第２実施形態の工程を模式的に示す図。The figure which shows typically the process of 2nd Embodiment of this invention. 本発明の第３実施形態の工程を模式的に示す図。The figure which shows the process of 3rd Embodiment of this invention typically. 本発明の第４実施形態の工程を模式的に示す図。The figure which shows the process of 4th Embodiment of this invention typically. 本発明の一実施形態に使用する装置の概略構成を模式的に示す図。The figure which shows typically schematic structure of the apparatus used for one Embodiment of this invention. 本発明の第５実施形態の工程を模式的に示す図。The figure which shows typically the process of 5th Embodiment of this invention. 本発明の第５実施形態の工程における平面構成を模式的に示す図。The figure which shows typically the planar structure in the process of 5th Embodiment of this invention. 本発明の第５実施形態の工程を模式的に示す図。The figure which shows typically the process of 5th Embodiment of this invention. 本発明の第５実施形態の工程における平面構成を模式的に示す図。The figure which shows typically the planar structure in the process of 5th Embodiment of this invention. 本発明の第５実施形態の工程における平面構成及び断面構成を模式的に示す図。The figure which shows typically the planar structure and cross-sectional structure in the process of 5th Embodiment of this invention.

符号の説明Explanation of symbols

１００……下地層、１０１……ポリシリコン層、１０２……反射防止膜（ＢＡＲＣ）、１０３……フォトレジスト、１０４……ＳｉＯ2膜。 100 ...... underlayer 101 ...... polysilicon layer, 102 ...... antireflection film (BARC), 103 ...... photoresist, 104 ...... SiO 2 film.

Claims (13)

フォトレジスト膜を露光、現像して得られたフォトレジストの第１パターンに基づいて、基板上の被エッチング層を所定のパターンにエッチングして、半導体装置を製造する半導体装置の製造方法であって、
前記フォトレジストの第１パターンの上にＳｉＯ2膜を成膜する成膜工程と、
前記ＳｉＯ2膜を前記フォトレジストの第１パターンの側壁部にのみ残るようにエッチングするエッチング工程と、
前記フォトレジストの第１パターンを除去して前記ＳｉＯ2膜の第２パターンを形成する第２パターン形成工程と、
を具備したことを特徴とする半導体装置の製造方法。 A semiconductor device manufacturing method for manufacturing a semiconductor device by etching a layer to be etched on a substrate into a predetermined pattern based on a first pattern of a photoresist obtained by exposing and developing a photoresist film. ,
A film forming step of forming a SiO 2 film on the first pattern of the photoresist;
An etching step of etching the SiO 2 film so as to remain only on the sidewall of the first pattern of the photoresist;
Removing a first pattern of the photoresist to form a second pattern of the SiO 2 film;
A method for manufacturing a semiconductor device, comprising: 請求項１記載の半導体装置の製造方法であって、
前記成膜工程を、加熱触媒体で成膜ガスを活性化させた化学気相成長によって行うことを特徴とする半導体装置の製造方法。 A method of manufacturing a semiconductor device according to claim 1,
A method of manufacturing a semiconductor device, wherein the film forming step is performed by chemical vapor deposition in which a film forming gas is activated by a heating catalyst body. 請求項１又は２記載の半導体装置の製造方法であって、
前記成膜工程の前に、前記フォトレジストの第１パターンをトリミングするとともに、下層の有機材料からなる反射防止膜をエッチングする工程を具備したことを特徴とする半導体装置の製造方法。 A method of manufacturing a semiconductor device according to claim 1 or 2,
A method of manufacturing a semiconductor device comprising: trimming the first pattern of the photoresist and etching an antireflection film made of an underlying organic material before the film forming step. 請求項１〜３いずれか１項記載の半導体装置の製造方法であって、
前記第２パターン形成工程の後、当該第２パターンをマスクとして下層のシリコン層又は窒化シリコン層又は酸窒化シリコン層をエッチングすることを特徴とする半導体装置の製造方法。 A method of manufacturing a semiconductor device according to claim 1,
After the second pattern forming step, the lower silicon layer, silicon nitride layer, or silicon oxynitride layer is etched using the second pattern as a mask. 請求項１又は２記載の半導体装置の製造方法であって、
前記第２パターン形成工程の後に、当該第２パターンをマスクとして下層の無機材料からなる反射防止膜をエッチングし、この後、前記無機材料からなる反射防止膜の下層の有機膜をエッチングする工程を具備したことを特徴とする半導体装置の製造方法。 A method of manufacturing a semiconductor device according to claim 1 or 2,
After the second pattern forming step, etching the antireflection film made of the lower inorganic material using the second pattern as a mask, and then etching the organic film under the antireflection film made of the inorganic material. A method for manufacturing a semiconductor device, comprising: 請求項５記載の半導体装置の製造方法であって、
前記無機材料からなる反射防止膜が、ＳＯＧ膜、ＬＴＯ膜、ＳｉＯＮ膜のいずれかであることを特徴とする半導体装置の製造方法。 A method of manufacturing a semiconductor device according to claim 5,
A method of manufacturing a semiconductor device, wherein the antireflection film made of an inorganic material is one of an SOG film, an LTO film, and an SiON film. 基板上の被エッチング層を所定のパターンにエッチングして、半導体装置を製造する半導体装置の製造方法であって、
フォトレジストからなる複数のライン状の第１パターンを形成する第１パターン形成工程と、
前記第１パターンの上にＳｉＯ2膜を成膜する第１成膜工程と、
前記ＳｉＯ2膜を前記フォトレジストの第１パターンの側壁部にのみ残るようにエッチングする第１エッチング工程と、
前記第１パターンを除去して前記ＳｉＯ2膜の第２パターンを形成する第２パターン形成工程と、
前記第２パターンをマスクとして下層の第１マスク構成層をエッチングする第２エッチング工程と、
前記第１パターンと直交する方向に、フォトレジストの複数のライン状のパターンからなる第３パターンを形成する工程と、
前記第３パターンの上にＳｉＯ2膜を成膜する第２成膜工程と、
前記ＳｉＯ2膜を前記第３パターンの側壁部にのみ残るようにエッチングする第３エッチング工程と、
前記第３パターンを除去して前記ＳｉＯ2膜の第４パターンを形成する第４パターン形成工程と、
前記第４パターン及び前記第１マスク構成層をマスクとして、下層の第２マスク構成層をエッチングする第４エッチング工程と、
前記第１マスク構成層と前記第２マスク構成層をマスクとして、前記被エッチング層にホール形状を形成する第５エッチング工程と
を具備したことを特徴とする半導体装置の製造方法。 A method for manufacturing a semiconductor device for manufacturing a semiconductor device by etching a layer to be etched on a substrate into a predetermined pattern,
A first pattern forming step of forming a plurality of line-shaped first patterns made of photoresist;
A first film forming step of forming a SiO 2 film on the first pattern;
A first etching step of etching the SiO 2 film so as to remain only on a sidewall portion of the first pattern of the photoresist;
A second pattern forming step of removing the first pattern to form a second pattern of the SiO 2 film;
A second etching step of etching the underlying first mask constituent layer using the second pattern as a mask;
Forming a third pattern comprising a plurality of line-like patterns of photoresist in a direction orthogonal to the first pattern;
A second film forming step of forming a SiO 2 film on the third pattern;
A third etching step of etching the SiO 2 film so as to remain only on the side walls of the third pattern;
A fourth pattern forming step of removing the third pattern to form a fourth pattern of the SiO 2 film;
A fourth etching step of etching a lower second mask constituent layer using the fourth pattern and the first mask constituent layer as a mask;
A method of manufacturing a semiconductor device, comprising: a fifth etching step of forming a hole shape in the layer to be etched using the first mask constituent layer and the second mask constituent layer as a mask. 請求項７記載の半導体装置の製造方法であって、
前記第１及び第２成膜工程を、加熱触媒体で成膜ガスを活性化させた化学気相成長によって行うことを特徴とする半導体装置の製造方法。 A method for manufacturing a semiconductor device according to claim 7, comprising:
A method of manufacturing a semiconductor device, wherein the first and second film forming steps are performed by chemical vapor deposition in which a film forming gas is activated by a heating catalyst body. 請求項７又は８記載の半導体装置の製造方法であって、
前記第１成膜工程の前に、前記第１パターンをトリミングするとともに、下層の有機材料からなる反射防止膜をエッチングする工程と、
前記第２成膜工程の前に、前記第３パターンをトリミングするとともに、下層の有機材料からなる反射防止膜をエッチングする工程と
を具備したことを特徴とする半導体装置の製造方法。 A method of manufacturing a semiconductor device according to claim 7 or 8,
Trimming the first pattern and etching an antireflection film made of an underlying organic material before the first film forming step;
And a step of trimming the third pattern and etching an antireflection film made of an underlying organic material before the second film forming step. 請求項７〜９いずれか１項記載の半導体装置の製造方法であって、
前記第１マスク構成層がシリコンからなり、前記第２マスク構成層が窒化シリコンからなることを特徴とする半導体装置の製造方法。 A method for manufacturing a semiconductor device according to claim 7, wherein:
The method of manufacturing a semiconductor device, wherein the first mask constituent layer is made of silicon and the second mask constituent layer is made of silicon nitride. 基板上の被エッチング層を所定のパターンにエッチングして、半導体装置を製造する半導体装置の製造装置であって、
前記基板を収容する処理チャンバーと、
前記処理チャンバー内に処理ガスを供給する処理ガス供給手段と、
前記処理チャンバー内で請求項１から請求項１０いずれか１項記載の半導体装置の製造方法が行われるように制御する制御部と
を備えたことを特徴とする半導体装置の製造装置。 A semiconductor device manufacturing apparatus for manufacturing a semiconductor device by etching a layer to be etched on a substrate into a predetermined pattern,
A processing chamber containing the substrate;
A processing gas supply means for supplying a processing gas into the processing chamber;
11. A semiconductor device manufacturing apparatus, comprising: a control unit that controls the semiconductor device manufacturing method according to claim 1 to be performed in the processing chamber. コンピュータ上で動作し、実行時に、請求項１から請求項１０いずれか１項記載の半導体装置の製造方法が行われるよう半導体装置の製造装置を制御することを特徴とする制御プログラム。   11. A control program that operates on a computer and controls a semiconductor device manufacturing apparatus so that the semiconductor device manufacturing method according to claim 1 is performed at the time of execution. コンピュータ上で動作する制御プログラムが記憶されプログラム記憶媒体であって、
前記制御プログラムは、実行時に請求項１から請求項１０いずれか１項記載の半導体装置の製造方法が行われるように半導体装置の製造装置を制御することを特徴とするプログラム記憶媒体。 A program storage medium storing a control program that operates on a computer,
11. A program storage medium for controlling a semiconductor device manufacturing apparatus so that the method for manufacturing a semiconductor device according to claim 1 is performed when the control program is executed.
JP2008107467A 2007-09-28 2008-04-17 Semiconductor device manufacturing method, semiconductor device manufacturing apparatus, control program, and program storage medium Expired - Fee Related JP5236983B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2008107467A JP5236983B2 (en) 2007-09-28 2008-04-17 Semiconductor device manufacturing method, semiconductor device manufacturing apparatus, control program, and program storage medium
KR1020080056158A KR100967924B1 (en) 2007-09-28 2008-06-16 Method for manufacturing semiconductor apparatus, device for manufacturing semiconductor apparatus, and storage medium for program
TW097130967A TWI389202B (en) 2007-09-28 2008-08-14 Method of manufacturing semiconductor device, apparatus for manufacturing semiconductor device, control program, and program storage medium
US12/284,749 US20090087990A1 (en) 2007-09-28 2008-09-24 Manufacturing method, manufacturing apparatus, control program and program recording medium of semiconductor device

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2007253409 2007-09-28
JP2007253409 2007-09-28
JP2008107467A JP5236983B2 (en) 2007-09-28 2008-04-17 Semiconductor device manufacturing method, semiconductor device manufacturing apparatus, control program, and program storage medium

Publications (2)

Publication Number Publication Date
JP2009099938A true JP2009099938A (en) 2009-05-07
JP5236983B2 JP5236983B2 (en) 2013-07-17

Family

ID=40517629

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008107467A Expired - Fee Related JP5236983B2 (en) 2007-09-28 2008-04-17 Semiconductor device manufacturing method, semiconductor device manufacturing apparatus, control program, and program storage medium

Country Status (4)

Country Link
JP (1) JP5236983B2 (en)
KR (1) KR100967924B1 (en)
CN (1) CN101399189A (en)
TW (1) TWI389202B (en)

Cited By (340)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010085977A (en) * 2008-09-03 2010-04-15 Shin-Etsu Chemical Co Ltd Patterning process
JP2011059579A (en) * 2009-09-14 2011-03-24 Tokyo Electron Ltd Method of forming mask pattern and method for manufacturing semiconductor device
WO2011102140A1 (en) * 2010-02-19 2011-08-25 東京エレクトロン株式会社 Method for manufacturing a semiconductor device
WO2011125605A1 (en) * 2010-04-02 2011-10-13 東京エレクトロン株式会社 Mask pattern formation method and manufacturing method for semiconductor device
US8298951B1 (en) 2011-04-13 2012-10-30 Asm Japan K.K. Footing reduction using etch-selective layer
KR20130092471A (en) 2012-02-10 2013-08-20 도오꾜오까고오교 가부시끼가이샤 Method of forming pattern
JP2014035421A (en) * 2012-08-08 2014-02-24 Fujifilm Corp Pattern forming method, method for manufacturing electronic device using the same, and electronic device
US8809207B2 (en) 2011-02-22 2014-08-19 Tokyo Electron Limited Pattern-forming method and method for manufacturing semiconductor device
US8853087B2 (en) 2009-12-25 2014-10-07 Tokyo Electron Limited Method of manufacturing semiconductor device and system for manufacturing semiconductor device
WO2014175279A1 (en) * 2013-04-26 2014-10-30 東京エレクトロン株式会社 Etching method
JP2014211541A (en) * 2013-04-18 2014-11-13 Jsr株式会社 Method for forming fine pattern
US8901016B2 (en) 2010-12-28 2014-12-02 Asm Japan K.K. Method of forming metal oxide hardmask
JP2015069173A (en) * 2013-09-30 2015-04-13 富士フイルム株式会社 Pattern forming method, pattern mask forming method, method for manufacturing electronic device and electronic device
US9324811B2 (en) 2012-09-26 2016-04-26 Asm Ip Holding B.V. Structures and devices including a tensile-stressed silicon arsenic layer and methods of forming same
US9349952B1 (en) 2014-12-08 2016-05-24 Sony Corporation Methods for fabricating a memory device with an enlarged space between neighboring bottom electrodes
US9384987B2 (en) 2012-04-04 2016-07-05 Asm Ip Holding B.V. Metal oxide protective layer for a semiconductor device
US9394608B2 (en) 2009-04-06 2016-07-19 Asm America, Inc. Semiconductor processing reactor and components thereof
US9404587B2 (en) 2014-04-24 2016-08-02 ASM IP Holding B.V Lockout tagout for semiconductor vacuum valve
US9412564B2 (en) 2013-07-22 2016-08-09 Asm Ip Holding B.V. Semiconductor reaction chamber with plasma capabilities
US9447498B2 (en) 2014-03-18 2016-09-20 Asm Ip Holding B.V. Method for performing uniform processing in gas system-sharing multiple reaction chambers
US9455138B1 (en) 2015-11-10 2016-09-27 Asm Ip Holding B.V. Method for forming dielectric film in trenches by PEALD using H-containing gas
US9478415B2 (en) 2015-02-13 2016-10-25 Asm Ip Holding B.V. Method for forming film having low resistance and shallow junction depth
US9484191B2 (en) 2013-03-08 2016-11-01 Asm Ip Holding B.V. Pulsed remote plasma method and system
JP2016207915A (en) * 2015-04-27 2016-12-08 東京エレクトロン株式会社 Method of processing object to be processed
US9543180B2 (en) 2014-08-01 2017-01-10 Asm Ip Holding B.V. Apparatus and method for transporting wafers between wafer carrier and process tool under vacuum
US9558931B2 (en) 2012-07-27 2017-01-31 Asm Ip Holding B.V. System and method for gas-phase sulfur passivation of a semiconductor surface
US9556516B2 (en) 2013-10-09 2017-01-31 ASM IP Holding B.V Method for forming Ti-containing film by PEALD using TDMAT or TDEAT
US9589770B2 (en) 2013-03-08 2017-03-07 Asm Ip Holding B.V. Method and systems for in-situ formation of intermediate reactive species
US9605342B2 (en) 2012-09-12 2017-03-28 Asm Ip Holding B.V. Process gas management for an inductively-coupled plasma deposition reactor
US9607837B1 (en) 2015-12-21 2017-03-28 Asm Ip Holding B.V. Method for forming silicon oxide cap layer for solid state diffusion process
US9627221B1 (en) 2015-12-28 2017-04-18 Asm Ip Holding B.V. Continuous process incorporating atomic layer etching
US9640416B2 (en) 2012-12-26 2017-05-02 Asm Ip Holding B.V. Single-and dual-chamber module-attachable wafer-handling chamber
US9647114B2 (en) 2015-08-14 2017-05-09 Asm Ip Holding B.V. Methods of forming highly p-type doped germanium tin films and structures and devices including the films
US9659799B2 (en) 2012-08-28 2017-05-23 Asm Ip Holding B.V. Systems and methods for dynamic semiconductor process scheduling
US9657845B2 (en) 2014-10-07 2017-05-23 Asm Ip Holding B.V. Variable conductance gas distribution apparatus and method
US9711345B2 (en) 2015-08-25 2017-07-18 Asm Ip Holding B.V. Method for forming aluminum nitride-based film by PEALD
US9735024B2 (en) 2015-12-28 2017-08-15 Asm Ip Holding B.V. Method of atomic layer etching using functional group-containing fluorocarbon
US9754779B1 (en) 2016-02-19 2017-09-05 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US9793148B2 (en) 2011-06-22 2017-10-17 Asm Japan K.K. Method for positioning wafers in multiple wafer transport
US9793115B2 (en) 2013-08-14 2017-10-17 Asm Ip Holding B.V. Structures and devices including germanium-tin films and methods of forming same
US9790595B2 (en) 2013-07-12 2017-10-17 Asm Ip Holding B.V. Method and system to reduce outgassing in a reaction chamber
US9793135B1 (en) 2016-07-14 2017-10-17 ASM IP Holding B.V Method of cyclic dry etching using etchant film
US9812320B1 (en) 2016-07-28 2017-11-07 Asm Ip Holding B.V. Method and apparatus for filling a gap
US9859151B1 (en) 2016-07-08 2018-01-02 Asm Ip Holding B.V. Selective film deposition method to form air gaps
US9887082B1 (en) 2016-07-28 2018-02-06 Asm Ip Holding B.V. Method and apparatus for filling a gap
US9890456B2 (en) 2014-08-21 2018-02-13 Asm Ip Holding B.V. Method and system for in situ formation of gas-phase compounds
US9892908B2 (en) 2011-10-28 2018-02-13 Asm America, Inc. Process feed management for semiconductor substrate processing
US9891521B2 (en) 2014-11-19 2018-02-13 Asm Ip Holding B.V. Method for depositing thin film
US9899291B2 (en) 2015-07-13 2018-02-20 Asm Ip Holding B.V. Method for protecting layer by forming hydrocarbon-based extremely thin film
US9899405B2 (en) 2014-12-22 2018-02-20 Asm Ip Holding B.V. Semiconductor device and manufacturing method thereof
US9909214B2 (en) 2015-10-15 2018-03-06 Asm Ip Holding B.V. Method for depositing dielectric film in trenches by PEALD
US9916980B1 (en) 2016-12-15 2018-03-13 Asm Ip Holding B.V. Method of forming a structure on a substrate
US9960072B2 (en) 2015-09-29 2018-05-01 Asm Ip Holding B.V. Variable adjustment for precise matching of multiple chamber cavity housings
US10032628B2 (en) 2016-05-02 2018-07-24 Asm Ip Holding B.V. Source/drain performance through conformal solid state doping
US10043661B2 (en) 2015-07-13 2018-08-07 Asm Ip Holding B.V. Method for protecting layer by forming hydrocarbon-based extremely thin film
US10083836B2 (en) 2015-07-24 2018-09-25 Asm Ip Holding B.V. Formation of boron-doped titanium metal films with high work function
US10090316B2 (en) 2016-09-01 2018-10-02 Asm Ip Holding B.V. 3D stacked multilayer semiconductor memory using doped select transistor channel
US10087525B2 (en) 2015-08-04 2018-10-02 Asm Ip Holding B.V. Variable gap hard stop design
US10087522B2 (en) 2016-04-21 2018-10-02 Asm Ip Holding B.V. Deposition of metal borides
USD830981S1 (en) 2017-04-07 2018-10-16 Asm Ip Holding B.V. Susceptor for semiconductor substrate processing apparatus
US10103040B1 (en) 2017-03-31 2018-10-16 Asm Ip Holding B.V. Apparatus and method for manufacturing a semiconductor device
US10134757B2 (en) 2016-11-07 2018-11-20 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by using the method
US10167557B2 (en) 2014-03-18 2019-01-01 Asm Ip Holding B.V. Gas distribution system, reactor including the system, and methods of using the same
US10177025B2 (en) 2016-07-28 2019-01-08 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10179947B2 (en) 2013-11-26 2019-01-15 Asm Ip Holding B.V. Method for forming conformal nitrided, oxidized, or carbonized dielectric film by atomic layer deposition
US10190213B2 (en) 2016-04-21 2019-01-29 Asm Ip Holding B.V. Deposition of metal borides
US10211308B2 (en) 2015-10-21 2019-02-19 Asm Ip Holding B.V. NbMC layers
US10229833B2 (en) 2016-11-01 2019-03-12 Asm Ip Holding B.V. Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10236177B1 (en) 2017-08-22 2019-03-19 ASM IP Holding B.V.. Methods for depositing a doped germanium tin semiconductor and related semiconductor device structures
US10249577B2 (en) 2016-05-17 2019-04-02 Asm Ip Holding B.V. Method of forming metal interconnection and method of fabricating semiconductor apparatus using the method
US10249524B2 (en) 2017-08-09 2019-04-02 Asm Ip Holding B.V. Cassette holder assembly for a substrate cassette and holding member for use in such assembly
US10262859B2 (en) 2016-03-24 2019-04-16 Asm Ip Holding B.V. Process for forming a film on a substrate using multi-port injection assemblies
US10269558B2 (en) 2016-12-22 2019-04-23 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10276355B2 (en) 2015-03-12 2019-04-30 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US10283353B2 (en) 2017-03-29 2019-05-07 Asm Ip Holding B.V. Method of reforming insulating film deposited on substrate with recess pattern
US10290508B1 (en) 2017-12-05 2019-05-14 Asm Ip Holding B.V. Method for forming vertical spacers for spacer-defined patterning
US10312055B2 (en) 2017-07-26 2019-06-04 Asm Ip Holding B.V. Method of depositing film by PEALD using negative bias
US10319588B2 (en) 2017-10-10 2019-06-11 Asm Ip Holding B.V. Method for depositing a metal chalcogenide on a substrate by cyclical deposition
US10322384B2 (en) 2015-11-09 2019-06-18 Asm Ip Holding B.V. Counter flow mixer for process chamber
US10340135B2 (en) 2016-11-28 2019-07-02 Asm Ip Holding B.V. Method of topologically restricted plasma-enhanced cyclic deposition of silicon or metal nitride
US10343920B2 (en) 2016-03-18 2019-07-09 Asm Ip Holding B.V. Aligned carbon nanotubes
US10361201B2 (en) 2013-09-27 2019-07-23 Asm Ip Holding B.V. Semiconductor structure and device formed using selective epitaxial process
US10364496B2 (en) 2011-06-27 2019-07-30 Asm Ip Holding B.V. Dual section module having shared and unshared mass flow controllers
US10367080B2 (en) 2016-05-02 2019-07-30 Asm Ip Holding B.V. Method of forming a germanium oxynitride film
US10381226B2 (en) 2016-07-27 2019-08-13 Asm Ip Holding B.V. Method of processing substrate
US10381219B1 (en) 2018-10-25 2019-08-13 Asm Ip Holding B.V. Methods for forming a silicon nitride film
US10378106B2 (en) 2008-11-14 2019-08-13 Asm Ip Holding B.V. Method of forming insulation film by modified PEALD
US10388513B1 (en) 2018-07-03 2019-08-20 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10388509B2 (en) 2016-06-28 2019-08-20 Asm Ip Holding B.V. Formation of epitaxial layers via dislocation filtering
US10395919B2 (en) 2016-07-28 2019-08-27 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10403504B2 (en) 2017-10-05 2019-09-03 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
US10410943B2 (en) 2016-10-13 2019-09-10 Asm Ip Holding B.V. Method for passivating a surface of a semiconductor and related systems
US10435790B2 (en) 2016-11-01 2019-10-08 Asm Ip Holding B.V. Method of subatmospheric plasma-enhanced ALD using capacitively coupled electrodes with narrow gap
US10446393B2 (en) 2017-05-08 2019-10-15 Asm Ip Holding B.V. Methods for forming silicon-containing epitaxial layers and related semiconductor device structures
US10458018B2 (en) 2015-06-26 2019-10-29 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
US10468251B2 (en) 2016-02-19 2019-11-05 Asm Ip Holding B.V. Method for forming spacers using silicon nitride film for spacer-defined multiple patterning
US10468261B2 (en) 2017-02-15 2019-11-05 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US10483099B1 (en) 2018-07-26 2019-11-19 Asm Ip Holding B.V. Method for forming thermally stable organosilicon polymer film
JP2019204815A (en) * 2018-05-21 2019-11-28 東京エレクトロン株式会社 Substrate processing method and substrate processing apparatus
US10501866B2 (en) 2016-03-09 2019-12-10 Asm Ip Holding B.V. Gas distribution apparatus for improved film uniformity in an epitaxial system
US10504742B2 (en) 2017-05-31 2019-12-10 Asm Ip Holding B.V. Method of atomic layer etching using hydrogen plasma
US10510536B2 (en) 2018-03-29 2019-12-17 Asm Ip Holding B.V. Method of depositing a co-doped polysilicon film on a surface of a substrate within a reaction chamber
US10529563B2 (en) 2017-03-29 2020-01-07 Asm Ip Holdings B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
US10529542B2 (en) 2015-03-11 2020-01-07 Asm Ip Holdings B.V. Cross-flow reactor and method
US10529554B2 (en) 2016-02-19 2020-01-07 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US10535516B2 (en) 2018-02-01 2020-01-14 Asm Ip Holdings B.V. Method for depositing a semiconductor structure on a surface of a substrate and related semiconductor structures
US10541333B2 (en) 2017-07-19 2020-01-21 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US10559458B1 (en) 2018-11-26 2020-02-11 Asm Ip Holding B.V. Method of forming oxynitride film
US10590535B2 (en) 2017-07-26 2020-03-17 Asm Ip Holdings B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
US10600673B2 (en) 2015-07-07 2020-03-24 Asm Ip Holding B.V. Magnetic susceptor to baseplate seal
US10607895B2 (en) 2017-09-18 2020-03-31 Asm Ip Holdings B.V. Method for forming a semiconductor device structure comprising a gate fill metal
US10605530B2 (en) 2017-07-26 2020-03-31 Asm Ip Holding B.V. Assembly of a liner and a flange for a vertical furnace as well as the liner and the vertical furnace
US10612136B2 (en) 2018-06-29 2020-04-07 ASM IP Holding, B.V. Temperature-controlled flange and reactor system including same
USD880437S1 (en) 2018-02-01 2020-04-07 Asm Ip Holding B.V. Gas supply plate for semiconductor manufacturing apparatus
US10612137B2 (en) 2016-07-08 2020-04-07 Asm Ip Holdings B.V. Organic reactants for atomic layer deposition
US10643826B2 (en) 2016-10-26 2020-05-05 Asm Ip Holdings B.V. Methods for thermally calibrating reaction chambers
US10643904B2 (en) 2016-11-01 2020-05-05 Asm Ip Holdings B.V. Methods for forming a semiconductor device and related semiconductor device structures
US10658205B2 (en) 2017-09-28 2020-05-19 Asm Ip Holdings B.V. Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US10658181B2 (en) 2018-02-20 2020-05-19 Asm Ip Holding B.V. Method of spacer-defined direct patterning in semiconductor fabrication
US10655221B2 (en) 2017-02-09 2020-05-19 Asm Ip Holding B.V. Method for depositing oxide film by thermal ALD and PEALD
US10685834B2 (en) 2017-07-05 2020-06-16 Asm Ip Holdings B.V. Methods for forming a silicon germanium tin layer and related semiconductor device structures
US10683571B2 (en) 2014-02-25 2020-06-16 Asm Ip Holding B.V. Gas supply manifold and method of supplying gases to chamber using same
US10692741B2 (en) 2017-08-08 2020-06-23 Asm Ip Holdings B.V. Radiation shield
US10707106B2 (en) 2011-06-06 2020-07-07 Asm Ip Holding B.V. High-throughput semiconductor-processing apparatus equipped with multiple dual-chamber modules
US10714335B2 (en) 2017-04-25 2020-07-14 Asm Ip Holding B.V. Method of depositing thin film and method of manufacturing semiconductor device
US10714350B2 (en) 2016-11-01 2020-07-14 ASM IP Holdings, B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10714315B2 (en) 2012-10-12 2020-07-14 Asm Ip Holdings B.V. Semiconductor reaction chamber showerhead
US10714385B2 (en) 2016-07-19 2020-07-14 Asm Ip Holding B.V. Selective deposition of tungsten
US10731249B2 (en) 2018-02-15 2020-08-04 Asm Ip Holding B.V. Method of forming a transition metal containing film on a substrate by a cyclical deposition process, a method for supplying a transition metal halide compound to a reaction chamber, and related vapor deposition apparatus
US10734244B2 (en) 2017-11-16 2020-08-04 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by the same
US10734497B2 (en) 2017-07-18 2020-08-04 Asm Ip Holding B.V. Methods for forming a semiconductor device structure and related semiconductor device structures
US10755922B2 (en) 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10770336B2 (en) 2017-08-08 2020-09-08 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US10767789B2 (en) 2018-07-16 2020-09-08 Asm Ip Holding B.V. Diaphragm valves, valve components, and methods for forming valve components
US10770286B2 (en) 2017-05-08 2020-09-08 Asm Ip Holdings B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
US10797133B2 (en) 2018-06-21 2020-10-06 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
US10804098B2 (en) 2009-08-14 2020-10-13 Asm Ip Holding B.V. Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species
US10811256B2 (en) 2018-10-16 2020-10-20 Asm Ip Holding B.V. Method for etching a carbon-containing feature
USD900036S1 (en) 2017-08-24 2020-10-27 Asm Ip Holding B.V. Heater electrical connector and adapter
US10818758B2 (en) 2018-11-16 2020-10-27 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US10829852B2 (en) 2018-08-16 2020-11-10 Asm Ip Holding B.V. Gas distribution device for a wafer processing apparatus
US10847366B2 (en) 2018-11-16 2020-11-24 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US10847371B2 (en) 2018-03-27 2020-11-24 Asm Ip Holding B.V. Method of forming an electrode on a substrate and a semiconductor device structure including an electrode
US10847365B2 (en) 2018-10-11 2020-11-24 Asm Ip Holding B.V. Method of forming conformal silicon carbide film by cyclic CVD
US10844484B2 (en) 2017-09-22 2020-11-24 Asm Ip Holding B.V. Apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US10854498B2 (en) 2011-07-15 2020-12-01 Asm Ip Holding B.V. Wafer-supporting device and method for producing same
USD903477S1 (en) 2018-01-24 2020-12-01 Asm Ip Holdings B.V. Metal clamp
US10858737B2 (en) 2014-07-28 2020-12-08 Asm Ip Holding B.V. Showerhead assembly and components thereof
US10867786B2 (en) 2018-03-30 2020-12-15 Asm Ip Holding B.V. Substrate processing method
US10865475B2 (en) 2016-04-21 2020-12-15 Asm Ip Holding B.V. Deposition of metal borides and silicides
US10867788B2 (en) 2016-12-28 2020-12-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10872771B2 (en) 2018-01-16 2020-12-22 Asm Ip Holding B. V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
US10883175B2 (en) 2018-08-09 2021-01-05 Asm Ip Holding B.V. Vertical furnace for processing substrates and a liner for use therein
US10886123B2 (en) 2017-06-02 2021-01-05 Asm Ip Holding B.V. Methods for forming low temperature semiconductor layers and related semiconductor device structures
US10892156B2 (en) 2017-05-08 2021-01-12 Asm Ip Holding B.V. Methods for forming a silicon nitride film on a substrate and related semiconductor device structures
US10896820B2 (en) 2018-02-14 2021-01-19 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10910262B2 (en) 2017-11-16 2021-02-02 Asm Ip Holding B.V. Method of selectively depositing a capping layer structure on a semiconductor device structure
US10914004B2 (en) 2018-06-29 2021-02-09 Asm Ip Holding B.V. Thin-film deposition method and manufacturing method of semiconductor device
US10923344B2 (en) 2017-10-30 2021-02-16 Asm Ip Holding B.V. Methods for forming a semiconductor structure and related semiconductor structures
US10928731B2 (en) 2017-09-21 2021-02-23 Asm Ip Holding B.V. Method of sequential infiltration synthesis treatment of infiltrateable material and structures and devices formed using same
US10934619B2 (en) 2016-11-15 2021-03-02 Asm Ip Holding B.V. Gas supply unit and substrate processing apparatus including the gas supply unit
US10941490B2 (en) 2014-10-07 2021-03-09 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
KR20210033442A (en) 2018-07-23 2021-03-26 도쿄엘렉트론가부시키가이샤 Etching method and etching apparatus
US10975470B2 (en) 2018-02-23 2021-04-13 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11001925B2 (en) 2016-12-19 2021-05-11 Asm Ip Holding B.V. Substrate processing apparatus
US11015245B2 (en) 2014-03-19 2021-05-25 Asm Ip Holding B.V. Gas-phase reactor and system having exhaust plenum and components thereof
US11018047B2 (en) 2018-01-25 2021-05-25 Asm Ip Holding B.V. Hybrid lift pin
US11018002B2 (en) 2017-07-19 2021-05-25 Asm Ip Holding B.V. Method for selectively depositing a Group IV semiconductor and related semiconductor device structures
US11024523B2 (en) 2018-09-11 2021-06-01 Asm Ip Holding B.V. Substrate processing apparatus and method
US11022879B2 (en) 2017-11-24 2021-06-01 Asm Ip Holding B.V. Method of forming an enhanced unexposed photoresist layer
US11031242B2 (en) 2018-11-07 2021-06-08 Asm Ip Holding B.V. Methods for depositing a boron doped silicon germanium film
USD922229S1 (en) 2019-06-05 2021-06-15 Asm Ip Holding B.V. Device for controlling a temperature of a gas supply unit
US11049751B2 (en) 2018-09-14 2021-06-29 Asm Ip Holding B.V. Cassette supply system to store and handle cassettes and processing apparatus equipped therewith
US11056567B2 (en) 2018-05-11 2021-07-06 Asm Ip Holding B.V. Method of forming a doped metal carbide film on a substrate and related semiconductor device structures
US11053591B2 (en) 2018-08-06 2021-07-06 Asm Ip Holding B.V. Multi-port gas injection system and reactor system including same
US11056344B2 (en) 2017-08-30 2021-07-06 Asm Ip Holding B.V. Layer forming method
US11069510B2 (en) 2017-08-30 2021-07-20 Asm Ip Holding B.V. Substrate processing apparatus
US11081345B2 (en) 2018-02-06 2021-08-03 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
US11088002B2 (en) 2018-03-29 2021-08-10 Asm Ip Holding B.V. Substrate rack and a substrate processing system and method
US11087997B2 (en) 2018-10-31 2021-08-10 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
US11114294B2 (en) 2019-03-08 2021-09-07 Asm Ip Holding B.V. Structure including SiOC layer and method of forming same
US11114283B2 (en) 2018-03-16 2021-09-07 Asm Ip Holding B.V. Reactor, system including the reactor, and methods of manufacturing and using same
USD930782S1 (en) 2019-08-22 2021-09-14 Asm Ip Holding B.V. Gas distributor
US11127589B2 (en) 2019-02-01 2021-09-21 Asm Ip Holding B.V. Method of topology-selective film formation of silicon oxide
US11127617B2 (en) 2017-11-27 2021-09-21 Asm Ip Holding B.V. Storage device for storing wafer cassettes for use with a batch furnace
USD931978S1 (en) 2019-06-27 2021-09-28 Asm Ip Holding B.V. Showerhead vacuum transport
US11139308B2 (en) 2015-12-29 2021-10-05 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US11139191B2 (en) 2017-08-09 2021-10-05 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11158513B2 (en) 2018-12-13 2021-10-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
USD935572S1 (en) 2019-05-24 2021-11-09 Asm Ip Holding B.V. Gas channel plate
US11171025B2 (en) 2019-01-22 2021-11-09 Asm Ip Holding B.V. Substrate processing device
US11205585B2 (en) 2016-07-28 2021-12-21 Asm Ip Holding B.V. Substrate processing apparatus and method of operating the same
US11217444B2 (en) 2018-11-30 2022-01-04 Asm Ip Holding B.V. Method for forming an ultraviolet radiation responsive metal oxide-containing film
US11222772B2 (en) 2016-12-14 2022-01-11 Asm Ip Holding B.V. Substrate processing apparatus
USD940837S1 (en) 2019-08-22 2022-01-11 Asm Ip Holding B.V. Electrode
US11227789B2 (en) 2019-02-20 2022-01-18 Asm Ip Holding B.V. Method and apparatus for filling a recess formed within a substrate surface
US11227782B2 (en) 2019-07-31 2022-01-18 Asm Ip Holding B.V. Vertical batch furnace assembly
US11232963B2 (en) 2018-10-03 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US11230766B2 (en) 2018-03-29 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US11251068B2 (en) 2018-10-19 2022-02-15 Asm Ip Holding B.V. Substrate processing apparatus and substrate processing method
US11251040B2 (en) 2019-02-20 2022-02-15 Asm Ip Holding B.V. Cyclical deposition method including treatment step and apparatus for same
USD944946S1 (en) 2019-06-14 2022-03-01 Asm Ip Holding B.V. Shower plate
US11270899B2 (en) 2018-06-04 2022-03-08 Asm Ip Holding B.V. Wafer handling chamber with moisture reduction
US11274369B2 (en) 2018-09-11 2022-03-15 Asm Ip Holding B.V. Thin film deposition method
US11282698B2 (en) 2019-07-19 2022-03-22 Asm Ip Holding B.V. Method of forming topology-controlled amorphous carbon polymer film
US11289326B2 (en) 2019-05-07 2022-03-29 Asm Ip Holding B.V. Method for reforming amorphous carbon polymer film
US11286558B2 (en) 2019-08-23 2022-03-29 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
US11286562B2 (en) 2018-06-08 2022-03-29 Asm Ip Holding B.V. Gas-phase chemical reactor and method of using same
USD947913S1 (en) 2019-05-17 2022-04-05 Asm Ip Holding B.V. Susceptor shaft
US11295980B2 (en) 2017-08-30 2022-04-05 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
USD948463S1 (en) 2018-10-24 2022-04-12 Asm Ip Holding B.V. Susceptor for semiconductor substrate supporting apparatus
USD949319S1 (en) 2019-08-22 2022-04-19 Asm Ip Holding B.V. Exhaust duct
US11306395B2 (en) 2017-06-28 2022-04-19 Asm Ip Holding B.V. Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus
US11315794B2 (en) 2019-10-21 2022-04-26 Asm Ip Holding B.V. Apparatus and methods for selectively etching films
US11339476B2 (en) 2019-10-08 2022-05-24 Asm Ip Holding B.V. Substrate processing device having connection plates, substrate processing method
US11342216B2 (en) 2019-02-20 2022-05-24 Asm Ip Holding B.V. Cyclical deposition method and apparatus for filling a recess formed within a substrate surface
US11345999B2 (en) 2019-06-06 2022-05-31 Asm Ip Holding B.V. Method of using a gas-phase reactor system including analyzing exhausted gas
US11355338B2 (en) 2019-05-10 2022-06-07 Asm Ip Holding B.V. Method of depositing material onto a surface and structure formed according to the method
US11361973B2 (en) 2019-12-06 2022-06-14 Tokyo Electron Limited Etching method and etching apparatus
US11361990B2 (en) 2018-05-28 2022-06-14 Asm Ip Holding B.V. Substrate processing method and device manufactured by using the same
US11374112B2 (en) 2017-07-19 2022-06-28 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US11378337B2 (en) 2019-03-28 2022-07-05 Asm Ip Holding B.V. Door opener and substrate processing apparatus provided therewith
US11390945B2 (en) 2019-07-03 2022-07-19 Asm Ip Holding B.V. Temperature control assembly for substrate processing apparatus and method of using same
US11390946B2 (en) 2019-01-17 2022-07-19 Asm Ip Holding B.V. Methods of forming a transition metal containing film on a substrate by a cyclical deposition process
US11390950B2 (en) 2017-01-10 2022-07-19 Asm Ip Holding B.V. Reactor system and method to reduce residue buildup during a film deposition process
US11393690B2 (en) 2018-01-19 2022-07-19 Asm Ip Holding B.V. Deposition method
US11401605B2 (en) 2019-11-26 2022-08-02 Asm Ip Holding B.V. Substrate processing apparatus
US11414760B2 (en) 2018-10-08 2022-08-16 Asm Ip Holding B.V. Substrate support unit, thin film deposition apparatus including the same, and substrate processing apparatus including the same
US11424119B2 (en) 2019-03-08 2022-08-23 Asm Ip Holding B.V. Method for selective deposition of silicon nitride layer and structure including selectively-deposited silicon nitride layer
US11430674B2 (en) 2018-08-22 2022-08-30 Asm Ip Holding B.V. Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US11430640B2 (en) 2019-07-30 2022-08-30 Asm Ip Holding B.V. Substrate processing apparatus
US11437241B2 (en) 2020-04-08 2022-09-06 Asm Ip Holding B.V. Apparatus and methods for selectively etching silicon oxide films
US11443926B2 (en) 2019-07-30 2022-09-13 Asm Ip Holding B.V. Substrate processing apparatus
US11447864B2 (en) 2019-04-19 2022-09-20 Asm Ip Holding B.V. Layer forming method and apparatus
US11447861B2 (en) 2016-12-15 2022-09-20 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
USD965044S1 (en) 2019-08-19 2022-09-27 Asm Ip Holding B.V. Susceptor shaft
USD965524S1 (en) 2019-08-19 2022-10-04 Asm Ip Holding B.V. Susceptor support
US11469098B2 (en) 2018-05-08 2022-10-11 Asm Ip Holding B.V. Methods for depositing an oxide film on a substrate by a cyclical deposition process and related device structures
US11473195B2 (en) 2018-03-01 2022-10-18 Asm Ip Holding B.V. Semiconductor processing apparatus and a method for processing a substrate
US11476109B2 (en) 2019-06-11 2022-10-18 Asm Ip Holding B.V. Method of forming an electronic structure using reforming gas, system for performing the method, and structure formed using the method
US11482412B2 (en) 2018-01-19 2022-10-25 Asm Ip Holding B.V. Method for depositing a gap-fill layer by plasma-assisted deposition
US11482533B2 (en) 2019-02-20 2022-10-25 Asm Ip Holding B.V. Apparatus and methods for plug fill deposition in 3-D NAND applications
US11482418B2 (en) 2018-02-20 2022-10-25 Asm Ip Holding B.V. Substrate processing method and apparatus
US11488854B2 (en) 2020-03-11 2022-11-01 Asm Ip Holding B.V. Substrate handling device with adjustable joints
US11488819B2 (en) 2018-12-04 2022-11-01 Asm Ip Holding B.V. Method of cleaning substrate processing apparatus
US11492703B2 (en) 2018-06-27 2022-11-08 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11495459B2 (en) 2019-09-04 2022-11-08 Asm Ip Holding B.V. Methods for selective deposition using a sacrificial capping layer
US11499226B2 (en) 2018-11-02 2022-11-15 Asm Ip Holding B.V. Substrate supporting unit and a substrate processing device including the same
US11499222B2 (en) 2018-06-27 2022-11-15 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11501968B2 (en) 2019-11-15 2022-11-15 Asm Ip Holding B.V. Method for providing a semiconductor device with silicon filled gaps
US11515188B2 (en) 2019-05-16 2022-11-29 Asm Ip Holding B.V. Wafer boat handling device, vertical batch furnace and method
US11515187B2 (en) 2020-05-01 2022-11-29 Asm Ip Holding B.V. Fast FOUP swapping with a FOUP handler
US11521851B2 (en) 2020-02-03 2022-12-06 Asm Ip Holding B.V. Method of forming structures including a vanadium or indium layer
US11527403B2 (en) 2019-12-19 2022-12-13 Asm Ip Holding B.V. Methods for filling a gap feature on a substrate surface and related semiconductor structures
US11527400B2 (en) 2019-08-23 2022-12-13 Asm Ip Holding B.V. Method for depositing silicon oxide film having improved quality by peald using bis(diethylamino)silane
US11530483B2 (en) 2018-06-21 2022-12-20 Asm Ip Holding B.V. Substrate processing system
US11532757B2 (en) 2016-10-27 2022-12-20 Asm Ip Holding B.V. Deposition of charge trapping layers
US11530876B2 (en) 2020-04-24 2022-12-20 Asm Ip Holding B.V. Vertical batch furnace assembly comprising a cooling gas supply
US11551912B2 (en) 2020-01-20 2023-01-10 Asm Ip Holding B.V. Method of forming thin film and method of modifying surface of thin film
US11551925B2 (en) 2019-04-01 2023-01-10 Asm Ip Holding B.V. Method for manufacturing a semiconductor device
USD975665S1 (en) 2019-05-17 2023-01-17 Asm Ip Holding B.V. Susceptor shaft
US11557474B2 (en) 2019-07-29 2023-01-17 Asm Ip Holding B.V. Methods for selective deposition utilizing n-type dopants and/or alternative dopants to achieve high dopant incorporation
US11562901B2 (en) 2019-09-25 2023-01-24 Asm Ip Holding B.V. Substrate processing method
US11572620B2 (en) 2018-11-06 2023-02-07 Asm Ip Holding B.V. Methods for selectively depositing an amorphous silicon film on a substrate
US11581186B2 (en) 2016-12-15 2023-02-14 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus
US11587814B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587815B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11594418B2 (en) 2020-02-21 2023-02-28 Tokyo Electron Limited Etching method and etching apparatus
USD979506S1 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Insulator
US11594600B2 (en) 2019-11-05 2023-02-28 Asm Ip Holding B.V. Structures with doped semiconductor layers and methods and systems for forming same
US11594450B2 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Method for forming a structure with a hole
USD980813S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas flow control plate for substrate processing apparatus
USD980814S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas distributor for substrate processing apparatus
US11605528B2 (en) 2019-07-09 2023-03-14 Asm Ip Holding B.V. Plasma device using coaxial waveguide, and substrate treatment method
US11610774B2 (en) 2019-10-02 2023-03-21 Asm Ip Holding B.V. Methods for forming a topographically selective silicon oxide film by a cyclical plasma-enhanced deposition process
US11615970B2 (en) 2019-07-17 2023-03-28 Asm Ip Holding B.V. Radical assist ignition plasma system and method
USD981973S1 (en) 2021-05-11 2023-03-28 Asm Ip Holding B.V. Reactor wall for substrate processing apparatus
US11626308B2 (en) 2020-05-13 2023-04-11 Asm Ip Holding B.V. Laser alignment fixture for a reactor system
US11626316B2 (en) 2019-11-20 2023-04-11 Asm Ip Holding B.V. Method of depositing carbon-containing material on a surface of a substrate, structure formed using the method, and system for forming the structure
US11629407B2 (en) 2019-02-22 2023-04-18 Asm Ip Holding B.V. Substrate processing apparatus and method for processing substrates
US11629406B2 (en) 2018-03-09 2023-04-18 Asm Ip Holding B.V. Semiconductor processing apparatus comprising one or more pyrometers for measuring a temperature of a substrate during transfer of the substrate
US11637014B2 (en) 2019-10-17 2023-04-25 Asm Ip Holding B.V. Methods for selective deposition of doped semiconductor material
US11637011B2 (en) 2019-10-16 2023-04-25 Asm Ip Holding B.V. Method of topology-selective film formation of silicon oxide
US11639811B2 (en) 2017-11-27 2023-05-02 Asm Ip Holding B.V. Apparatus including a clean mini environment
US11639548B2 (en) 2019-08-21 2023-05-02 Asm Ip Holding B.V. Film-forming material mixed-gas forming device and film forming device
US11643724B2 (en) 2019-07-18 2023-05-09 Asm Ip Holding B.V. Method of forming structures using a neutral beam
US11646184B2 (en) 2019-11-29 2023-05-09 Asm Ip Holding B.V. Substrate processing apparatus
US11646205B2 (en) 2019-10-29 2023-05-09 Asm Ip Holding B.V. Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same
US11646204B2 (en) 2020-06-24 2023-05-09 Asm Ip Holding B.V. Method for forming a layer provided with silicon
US11644758B2 (en) 2020-07-17 2023-05-09 Asm Ip Holding B.V. Structures and methods for use in photolithography
US11658035B2 (en) 2020-06-30 2023-05-23 Asm Ip Holding B.V. Substrate processing method
US11658029B2 (en) 2018-12-14 2023-05-23 Asm Ip Holding B.V. Method of forming a device structure using selective deposition of gallium nitride and system for same
US11664245B2 (en) 2019-07-16 2023-05-30 Asm Ip Holding B.V. Substrate processing device
US11664267B2 (en) 2019-07-10 2023-05-30 Asm Ip Holding B.V. Substrate support assembly and substrate processing device including the same
US11664199B2 (en) 2018-10-19 2023-05-30 Asm Ip Holding B.V. Substrate processing apparatus and substrate processing method
US11674220B2 (en) 2020-07-20 2023-06-13 Asm Ip Holding B.V. Method for depositing molybdenum layers using an underlayer
US11680839B2 (en) 2019-08-05 2023-06-20 Asm Ip Holding B.V. Liquid level sensor for a chemical source vessel
US11685991B2 (en) 2018-02-14 2023-06-27 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
USD990534S1 (en) 2020-09-11 2023-06-27 Asm Ip Holding B.V. Weighted lift pin
US11688603B2 (en) 2019-07-17 2023-06-27 Asm Ip Holding B.V. Methods of forming silicon germanium structures
USD990441S1 (en) 2021-09-07 2023-06-27 Asm Ip Holding B.V. Gas flow control plate
US11705333B2 (en) 2020-05-21 2023-07-18 Asm Ip Holding B.V. Structures including multiple carbon layers and methods of forming and using same
US11718913B2 (en) 2018-06-04 2023-08-08 Asm Ip Holding B.V. Gas distribution system and reactor system including same
US11725277B2 (en) 2011-07-20 2023-08-15 Asm Ip Holding B.V. Pressure transmitter for a semiconductor processing environment
US11725280B2 (en) 2020-08-26 2023-08-15 Asm Ip Holding B.V. Method for forming metal silicon oxide and metal silicon oxynitride layers
US11735422B2 (en) 2019-10-10 2023-08-22 Asm Ip Holding B.V. Method of forming a photoresist underlayer and structure including same
US11742198B2 (en) 2019-03-08 2023-08-29 Asm Ip Holding B.V. Structure including SiOCN layer and method of forming same
US11767589B2 (en) 2020-05-29 2023-09-26 Asm Ip Holding B.V. Substrate processing device
US11769682B2 (en) 2017-08-09 2023-09-26 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US11776846B2 (en) 2020-02-07 2023-10-03 Asm Ip Holding B.V. Methods for depositing gap filling fluids and related systems and devices
US11781243B2 (en) 2020-02-17 2023-10-10 Asm Ip Holding B.V. Method for depositing low temperature phosphorous-doped silicon
US11781221B2 (en) 2019-05-07 2023-10-10 Asm Ip Holding B.V. Chemical source vessel with dip tube
US11804364B2 (en) 2020-05-19 2023-10-31 Asm Ip Holding B.V. Substrate processing apparatus
US11814747B2 (en) 2019-04-24 2023-11-14 Asm Ip Holding B.V. Gas-phase reactor system-with a reaction chamber, a solid precursor source vessel, a gas distribution system, and a flange assembly
US11821078B2 (en) 2020-04-15 2023-11-21 Asm Ip Holding B.V. Method for forming precoat film and method for forming silicon-containing film
US11823866B2 (en) 2020-04-02 2023-11-21 Asm Ip Holding B.V. Thin film forming method
US11823876B2 (en) 2019-09-05 2023-11-21 Asm Ip Holding B.V. Substrate processing apparatus
US11830738B2 (en) 2020-04-03 2023-11-28 Asm Ip Holding B.V. Method for forming barrier layer and method for manufacturing semiconductor device
US11827981B2 (en) 2020-10-14 2023-11-28 Asm Ip Holding B.V. Method of depositing material on stepped structure
US11830730B2 (en) 2017-08-29 2023-11-28 Asm Ip Holding B.V. Layer forming method and apparatus
US11828707B2 (en) 2020-02-04 2023-11-28 Asm Ip Holding B.V. Method and apparatus for transmittance measurements of large articles
US11840761B2 (en) 2019-12-04 2023-12-12 Asm Ip Holding B.V. Substrate processing apparatus
US11876356B2 (en) 2020-03-11 2024-01-16 Asm Ip Holding B.V. Lockout tagout assembly and system and method of using same
US11873557B2 (en) 2020-10-22 2024-01-16 Asm Ip Holding B.V. Method of depositing vanadium metal
US11885020B2 (en) 2020-12-22 2024-01-30 Asm Ip Holding B.V. Transition metal deposition method
US11885013B2 (en) 2019-12-17 2024-01-30 Asm Ip Holding B.V. Method of forming vanadium nitride layer and structure including the vanadium nitride layer
USD1012873S1 (en) 2020-09-24 2024-01-30 Asm Ip Holding B.V. Electrode for semiconductor processing apparatus
US11885023B2 (en) 2018-10-01 2024-01-30 Asm Ip Holding B.V. Substrate retaining apparatus, system including the apparatus, and method of using same
US11887857B2 (en) 2020-04-24 2024-01-30 Asm Ip Holding B.V. Methods and systems for depositing a layer comprising vanadium, nitrogen, and a further element
US11891696B2 (en) 2020-11-30 2024-02-06 Asm Ip Holding B.V. Injector configured for arrangement within a reaction chamber of a substrate processing apparatus
US11898243B2 (en) 2020-04-24 2024-02-13 Asm Ip Holding B.V. Method of forming vanadium nitride-containing layer
US11901179B2 (en) 2020-10-28 2024-02-13 Asm Ip Holding B.V. Method and device for depositing silicon onto substrates
US11915929B2 (en) 2019-11-26 2024-02-27 Asm Ip Holding B.V. Methods for selectively forming a target film on a substrate comprising a first dielectric surface and a second metallic surface
US11923181B2 (en) 2019-11-29 2024-03-05 Asm Ip Holding B.V. Substrate processing apparatus for minimizing the effect of a filling gas during substrate processing
US11929251B2 (en) 2019-12-02 2024-03-12 Asm Ip Holding B.V. Substrate processing apparatus having electrostatic chuck and substrate processing method
US11946137B2 (en) 2020-12-16 2024-04-02 Asm Ip Holding B.V. Runout and wobble measurement fixtures
US11959168B2 (en) 2020-04-29 2024-04-16 Asm Ip Holding B.V. Solid source precursor vessel
US11961741B2 (en) 2020-03-12 2024-04-16 Asm Ip Holding B.V. Method for fabricating layer structure having target topological profile
US11967488B2 (en) 2013-02-01 2024-04-23 Asm Ip Holding B.V. Method for treatment of deposition reactor
US11972944B2 (en) 2022-10-21 2024-04-30 Asm Ip Holding B.V. Method for depositing a gap-fill layer by plasma-assisted deposition

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101041742B1 (en) * 2009-12-30 2011-06-16 광주과학기술원 Resistance change memory device, method of operating and manufacturing the same
CN101944483A (en) * 2010-08-11 2011-01-12 上海集成电路研发中心有限公司 Method for enhancing anti-etching capacity of photoresist
JP6960839B2 (en) * 2017-12-13 2021-11-05 東京エレクトロン株式会社 Manufacturing method of semiconductor devices

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62102531A (en) * 1985-10-29 1987-05-13 Sony Corp Etching method
JPH0677180A (en) * 1992-08-24 1994-03-18 Fujitsu Ltd Manufacture of fine linear etching mask
JP2000294542A (en) * 1999-04-08 2000-10-20 Sony Corp Vapor phase working method and apparatus thereof
JP2001160587A (en) * 1999-12-03 2001-06-12 Hitachi Ltd Method of manufacturing semiconductor integrated circuit device
JP2003264153A (en) * 2002-03-12 2003-09-19 Sony Corp Method and apparatus for forming semiconductor thin film, and catalyst nozzle
WO2006083592A1 (en) * 2005-02-03 2006-08-10 Lam Research Corporation Method for reducing critical dimensions using multiple masking steps
JP2007081160A (en) * 2005-09-14 2007-03-29 Fujitsu Ltd Method for manufacturing semiconductor device
WO2007103343A1 (en) * 2006-03-09 2007-09-13 Micron Technology, Inc. Trim process for critical dimension control for integrated circuits
JP2008536297A (en) * 2005-03-15 2008-09-04 マイクロン テクノロジー， インク． Patterns with a narrower pitch than photolithography structures

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6423475B1 (en) 1999-03-11 2002-07-23 Advanced Micro Devices, Inc. Sidewall formation for sidewall patterning of sub 100 nm structures
JP2001308076A (en) * 2000-04-27 2001-11-02 Nec Corp Method of manufacturing semiconductor device
KR20030002145A (en) * 2001-06-30 2003-01-08 주식회사 하이닉스반도체 Method for forming pattern in semiconductor device
KR100476924B1 (en) * 2002-06-14 2005-03-17 삼성전자주식회사 Method Of Forming Fine Pattern Of Semiconductor Device

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62102531A (en) * 1985-10-29 1987-05-13 Sony Corp Etching method
JPH0677180A (en) * 1992-08-24 1994-03-18 Fujitsu Ltd Manufacture of fine linear etching mask
JP2000294542A (en) * 1999-04-08 2000-10-20 Sony Corp Vapor phase working method and apparatus thereof
JP2001160587A (en) * 1999-12-03 2001-06-12 Hitachi Ltd Method of manufacturing semiconductor integrated circuit device
JP2003264153A (en) * 2002-03-12 2003-09-19 Sony Corp Method and apparatus for forming semiconductor thin film, and catalyst nozzle
WO2006083592A1 (en) * 2005-02-03 2006-08-10 Lam Research Corporation Method for reducing critical dimensions using multiple masking steps
JP2008536297A (en) * 2005-03-15 2008-09-04 マイクロン テクノロジー， インク． Patterns with a narrower pitch than photolithography structures
JP2007081160A (en) * 2005-09-14 2007-03-29 Fujitsu Ltd Method for manufacturing semiconductor device
WO2007103343A1 (en) * 2006-03-09 2007-09-13 Micron Technology, Inc. Trim process for critical dimension control for integrated circuits

Cited By (443)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010085977A (en) * 2008-09-03 2010-04-15 Shin-Etsu Chemical Co Ltd Patterning process
US10378106B2 (en) 2008-11-14 2019-08-13 Asm Ip Holding B.V. Method of forming insulation film by modified PEALD
US9394608B2 (en) 2009-04-06 2016-07-19 Asm America, Inc. Semiconductor processing reactor and components thereof
US10480072B2 (en) 2009-04-06 2019-11-19 Asm Ip Holding B.V. Semiconductor processing reactor and components thereof
US10844486B2 (en) 2009-04-06 2020-11-24 Asm Ip Holding B.V. Semiconductor processing reactor and components thereof
US10804098B2 (en) 2009-08-14 2020-10-13 Asm Ip Holding B.V. Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species
JP2011059579A (en) * 2009-09-14 2011-03-24 Tokyo Electron Ltd Method of forming mask pattern and method for manufacturing semiconductor device
US8815495B2 (en) 2009-09-14 2014-08-26 Tokyo Electron Limited Pattern forming method and manufacturing method of semiconductor device
US8853087B2 (en) 2009-12-25 2014-10-07 Tokyo Electron Limited Method of manufacturing semiconductor device and system for manufacturing semiconductor device
WO2011102140A1 (en) * 2010-02-19 2011-08-25 東京エレクトロン株式会社 Method for manufacturing a semiconductor device
KR101427505B1 (en) 2010-04-02 2014-08-07 도쿄엘렉트론가부시키가이샤 Mask pattern formation method and manufacturing method for semiconductor device
JP2011216817A (en) * 2010-04-02 2011-10-27 Tokyo Electron Ltd Method for forming mask pattern, and method for manufacturing semiconductor device
WO2011125605A1 (en) * 2010-04-02 2011-10-13 東京エレクトロン株式会社 Mask pattern formation method and manufacturing method for semiconductor device
US9171716B2 (en) 2010-12-28 2015-10-27 Asm Japan K.K. Method of forming metal oxide hardmask
US8901016B2 (en) 2010-12-28 2014-12-02 Asm Japan K.K. Method of forming metal oxide hardmask
US8809207B2 (en) 2011-02-22 2014-08-19 Tokyo Electron Limited Pattern-forming method and method for manufacturing semiconductor device
US8298951B1 (en) 2011-04-13 2012-10-30 Asm Japan K.K. Footing reduction using etch-selective layer
US10707106B2 (en) 2011-06-06 2020-07-07 Asm Ip Holding B.V. High-throughput semiconductor-processing apparatus equipped with multiple dual-chamber modules
US9793148B2 (en) 2011-06-22 2017-10-17 Asm Japan K.K. Method for positioning wafers in multiple wafer transport
US10364496B2 (en) 2011-06-27 2019-07-30 Asm Ip Holding B.V. Dual section module having shared and unshared mass flow controllers
US10854498B2 (en) 2011-07-15 2020-12-01 Asm Ip Holding B.V. Wafer-supporting device and method for producing same
US11725277B2 (en) 2011-07-20 2023-08-15 Asm Ip Holding B.V. Pressure transmitter for a semiconductor processing environment
US9892908B2 (en) 2011-10-28 2018-02-13 Asm America, Inc. Process feed management for semiconductor substrate processing
US10832903B2 (en) 2011-10-28 2020-11-10 Asm Ip Holding B.V. Process feed management for semiconductor substrate processing
JP2013164509A (en) * 2012-02-10 2013-08-22 Tokyo Ohka Kogyo Co Ltd Pattern forming method
KR20130092471A (en) 2012-02-10 2013-08-20 도오꾜오까고오교 가부시끼가이샤 Method of forming pattern
US9459535B2 (en) 2012-02-10 2016-10-04 Tokyo Ohka Kogyo Co., Ltd. Method of forming pattern
US9384987B2 (en) 2012-04-04 2016-07-05 Asm Ip Holding B.V. Metal oxide protective layer for a semiconductor device
US9558931B2 (en) 2012-07-27 2017-01-31 Asm Ip Holding B.V. System and method for gas-phase sulfur passivation of a semiconductor surface
US10126651B2 (en) 2012-08-08 2018-11-13 Fujifilm Corporation Pattern forming method, and, method for producing electronic device and electronic device, each using the same
JP2014035421A (en) * 2012-08-08 2014-02-24 Fujifilm Corp Pattern forming method, method for manufacturing electronic device using the same, and electronic device
US9659799B2 (en) 2012-08-28 2017-05-23 Asm Ip Holding B.V. Systems and methods for dynamic semiconductor process scheduling
US10566223B2 (en) 2012-08-28 2020-02-18 Asm Ip Holdings B.V. Systems and methods for dynamic semiconductor process scheduling
US9605342B2 (en) 2012-09-12 2017-03-28 Asm Ip Holding B.V. Process gas management for an inductively-coupled plasma deposition reactor
US10023960B2 (en) 2012-09-12 2018-07-17 Asm Ip Holdings B.V. Process gas management for an inductively-coupled plasma deposition reactor
US9324811B2 (en) 2012-09-26 2016-04-26 Asm Ip Holding B.V. Structures and devices including a tensile-stressed silicon arsenic layer and methods of forming same
US10714315B2 (en) 2012-10-12 2020-07-14 Asm Ip Holdings B.V. Semiconductor reaction chamber showerhead
US11501956B2 (en) 2012-10-12 2022-11-15 Asm Ip Holding B.V. Semiconductor reaction chamber showerhead
US9640416B2 (en) 2012-12-26 2017-05-02 Asm Ip Holding B.V. Single-and dual-chamber module-attachable wafer-handling chamber
US11967488B2 (en) 2013-02-01 2024-04-23 Asm Ip Holding B.V. Method for treatment of deposition reactor
US9484191B2 (en) 2013-03-08 2016-11-01 Asm Ip Holding B.V. Pulsed remote plasma method and system
US10340125B2 (en) 2013-03-08 2019-07-02 Asm Ip Holding B.V. Pulsed remote plasma method and system
US9589770B2 (en) 2013-03-08 2017-03-07 Asm Ip Holding B.V. Method and systems for in-situ formation of intermediate reactive species
US10366864B2 (en) 2013-03-08 2019-07-30 Asm Ip Holding B.V. Method and system for in-situ formation of intermediate reactive species
JP2014211541A (en) * 2013-04-18 2014-11-13 Jsr株式会社 Method for forming fine pattern
JP2014216535A (en) * 2013-04-26 2014-11-17 東京エレクトロン株式会社 Etching method
WO2014175279A1 (en) * 2013-04-26 2014-10-30 東京エレクトロン株式会社 Etching method
US9530671B2 (en) 2013-04-26 2016-12-27 Tokyo Electron Limited Etching method
US9790595B2 (en) 2013-07-12 2017-10-17 Asm Ip Holding B.V. Method and system to reduce outgassing in a reaction chamber
US9412564B2 (en) 2013-07-22 2016-08-09 Asm Ip Holding B.V. Semiconductor reaction chamber with plasma capabilities
US9793115B2 (en) 2013-08-14 2017-10-17 Asm Ip Holding B.V. Structures and devices including germanium-tin films and methods of forming same
US10361201B2 (en) 2013-09-27 2019-07-23 Asm Ip Holding B.V. Semiconductor structure and device formed using selective epitaxial process
JP2015069173A (en) * 2013-09-30 2015-04-13 富士フイルム株式会社 Pattern forming method, pattern mask forming method, method for manufacturing electronic device and electronic device
US9556516B2 (en) 2013-10-09 2017-01-31 ASM IP Holding B.V Method for forming Ti-containing film by PEALD using TDMAT or TDEAT
US10179947B2 (en) 2013-11-26 2019-01-15 Asm Ip Holding B.V. Method for forming conformal nitrided, oxidized, or carbonized dielectric film by atomic layer deposition
US10683571B2 (en) 2014-02-25 2020-06-16 Asm Ip Holding B.V. Gas supply manifold and method of supplying gases to chamber using same
US9447498B2 (en) 2014-03-18 2016-09-20 Asm Ip Holding B.V. Method for performing uniform processing in gas system-sharing multiple reaction chambers
US10604847B2 (en) 2014-03-18 2020-03-31 Asm Ip Holding B.V. Gas distribution system, reactor including the system, and methods of using the same
US10167557B2 (en) 2014-03-18 2019-01-01 Asm Ip Holding B.V. Gas distribution system, reactor including the system, and methods of using the same
US11015245B2 (en) 2014-03-19 2021-05-25 Asm Ip Holding B.V. Gas-phase reactor and system having exhaust plenum and components thereof
US9404587B2 (en) 2014-04-24 2016-08-02 ASM IP Holding B.V Lockout tagout for semiconductor vacuum valve
US10858737B2 (en) 2014-07-28 2020-12-08 Asm Ip Holding B.V. Showerhead assembly and components thereof
US9543180B2 (en) 2014-08-01 2017-01-10 Asm Ip Holding B.V. Apparatus and method for transporting wafers between wafer carrier and process tool under vacuum
US10787741B2 (en) 2014-08-21 2020-09-29 Asm Ip Holding B.V. Method and system for in situ formation of gas-phase compounds
US9890456B2 (en) 2014-08-21 2018-02-13 Asm Ip Holding B.V. Method and system for in situ formation of gas-phase compounds
US10561975B2 (en) 2014-10-07 2020-02-18 Asm Ip Holdings B.V. Variable conductance gas distribution apparatus and method
US11795545B2 (en) 2014-10-07 2023-10-24 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US9657845B2 (en) 2014-10-07 2017-05-23 Asm Ip Holding B.V. Variable conductance gas distribution apparatus and method
US10941490B2 (en) 2014-10-07 2021-03-09 Asm Ip Holding B.V. Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same
US9891521B2 (en) 2014-11-19 2018-02-13 Asm Ip Holding B.V. Method for depositing thin film
US10096772B2 (en) 2014-12-08 2018-10-09 Sony Semiconductor Solutions Corporation Methods for fabricating a memory device with an enlarged space between neighboring bottom electrodes
WO2016092741A1 (en) * 2014-12-08 2016-06-16 Sony Corporation Methods for fabricating a memory device with an enlarged space between neighboring bottom electrodes
US9349952B1 (en) 2014-12-08 2016-05-24 Sony Corporation Methods for fabricating a memory device with an enlarged space between neighboring bottom electrodes
US9899405B2 (en) 2014-12-22 2018-02-20 Asm Ip Holding B.V. Semiconductor device and manufacturing method thereof
US10438965B2 (en) 2014-12-22 2019-10-08 Asm Ip Holding B.V. Semiconductor device and manufacturing method thereof
US9478415B2 (en) 2015-02-13 2016-10-25 Asm Ip Holding B.V. Method for forming film having low resistance and shallow junction depth
US10529542B2 (en) 2015-03-11 2020-01-07 Asm Ip Holdings B.V. Cross-flow reactor and method
US11742189B2 (en) 2015-03-12 2023-08-29 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
US10276355B2 (en) 2015-03-12 2019-04-30 Asm Ip Holding B.V. Multi-zone reactor, system including the reactor, and method of using the same
JP2016207915A (en) * 2015-04-27 2016-12-08 東京エレクトロン株式会社 Method of processing object to be processed
US11242598B2 (en) 2015-06-26 2022-02-08 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
US10458018B2 (en) 2015-06-26 2019-10-29 Asm Ip Holding B.V. Structures including metal carbide material, devices including the structures, and methods of forming same
US10600673B2 (en) 2015-07-07 2020-03-24 Asm Ip Holding B.V. Magnetic susceptor to baseplate seal
US10043661B2 (en) 2015-07-13 2018-08-07 Asm Ip Holding B.V. Method for protecting layer by forming hydrocarbon-based extremely thin film
US9899291B2 (en) 2015-07-13 2018-02-20 Asm Ip Holding B.V. Method for protecting layer by forming hydrocarbon-based extremely thin film
US10083836B2 (en) 2015-07-24 2018-09-25 Asm Ip Holding B.V. Formation of boron-doped titanium metal films with high work function
US10087525B2 (en) 2015-08-04 2018-10-02 Asm Ip Holding B.V. Variable gap hard stop design
US9647114B2 (en) 2015-08-14 2017-05-09 Asm Ip Holding B.V. Methods of forming highly p-type doped germanium tin films and structures and devices including the films
US9711345B2 (en) 2015-08-25 2017-07-18 Asm Ip Holding B.V. Method for forming aluminum nitride-based film by PEALD
US10312129B2 (en) 2015-09-29 2019-06-04 Asm Ip Holding B.V. Variable adjustment for precise matching of multiple chamber cavity housings
US9960072B2 (en) 2015-09-29 2018-05-01 Asm Ip Holding B.V. Variable adjustment for precise matching of multiple chamber cavity housings
US9909214B2 (en) 2015-10-15 2018-03-06 Asm Ip Holding B.V. Method for depositing dielectric film in trenches by PEALD
US11233133B2 (en) 2015-10-21 2022-01-25 Asm Ip Holding B.V. NbMC layers
US10211308B2 (en) 2015-10-21 2019-02-19 Asm Ip Holding B.V. NbMC layers
US10322384B2 (en) 2015-11-09 2019-06-18 Asm Ip Holding B.V. Counter flow mixer for process chamber
US9455138B1 (en) 2015-11-10 2016-09-27 Asm Ip Holding B.V. Method for forming dielectric film in trenches by PEALD using H-containing gas
US9607837B1 (en) 2015-12-21 2017-03-28 Asm Ip Holding B.V. Method for forming silicon oxide cap layer for solid state diffusion process
US9627221B1 (en) 2015-12-28 2017-04-18 Asm Ip Holding B.V. Continuous process incorporating atomic layer etching
US9735024B2 (en) 2015-12-28 2017-08-15 Asm Ip Holding B.V. Method of atomic layer etching using functional group-containing fluorocarbon
US11956977B2 (en) 2015-12-29 2024-04-09 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US11139308B2 (en) 2015-12-29 2021-10-05 Asm Ip Holding B.V. Atomic layer deposition of III-V compounds to form V-NAND devices
US10468251B2 (en) 2016-02-19 2019-11-05 Asm Ip Holding B.V. Method for forming spacers using silicon nitride film for spacer-defined multiple patterning
US9754779B1 (en) 2016-02-19 2017-09-05 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US10529554B2 (en) 2016-02-19 2020-01-07 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches
US11676812B2 (en) 2016-02-19 2023-06-13 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on top/bottom portions
US10720322B2 (en) 2016-02-19 2020-07-21 Asm Ip Holding B.V. Method for forming silicon nitride film selectively on top surface
US10501866B2 (en) 2016-03-09 2019-12-10 Asm Ip Holding B.V. Gas distribution apparatus for improved film uniformity in an epitaxial system
US10343920B2 (en) 2016-03-18 2019-07-09 Asm Ip Holding B.V. Aligned carbon nanotubes
US10262859B2 (en) 2016-03-24 2019-04-16 Asm Ip Holding B.V. Process for forming a film on a substrate using multi-port injection assemblies
US10851456B2 (en) 2016-04-21 2020-12-01 Asm Ip Holding B.V. Deposition of metal borides
US10865475B2 (en) 2016-04-21 2020-12-15 Asm Ip Holding B.V. Deposition of metal borides and silicides
US10087522B2 (en) 2016-04-21 2018-10-02 Asm Ip Holding B.V. Deposition of metal borides
US10190213B2 (en) 2016-04-21 2019-01-29 Asm Ip Holding B.V. Deposition of metal borides
US11101370B2 (en) 2016-05-02 2021-08-24 Asm Ip Holding B.V. Method of forming a germanium oxynitride film
US10367080B2 (en) 2016-05-02 2019-07-30 Asm Ip Holding B.V. Method of forming a germanium oxynitride film
US10665452B2 (en) 2016-05-02 2020-05-26 Asm Ip Holdings B.V. Source/drain performance through conformal solid state doping
US10032628B2 (en) 2016-05-02 2018-07-24 Asm Ip Holding B.V. Source/drain performance through conformal solid state doping
US10249577B2 (en) 2016-05-17 2019-04-02 Asm Ip Holding B.V. Method of forming metal interconnection and method of fabricating semiconductor apparatus using the method
US10388509B2 (en) 2016-06-28 2019-08-20 Asm Ip Holding B.V. Formation of epitaxial layers via dislocation filtering
US9859151B1 (en) 2016-07-08 2018-01-02 Asm Ip Holding B.V. Selective film deposition method to form air gaps
US11094582B2 (en) 2016-07-08 2021-08-17 Asm Ip Holding B.V. Selective deposition method to form air gaps
US10612137B2 (en) 2016-07-08 2020-04-07 Asm Ip Holdings B.V. Organic reactants for atomic layer deposition
US11649546B2 (en) 2016-07-08 2023-05-16 Asm Ip Holding B.V. Organic reactants for atomic layer deposition
US10541173B2 (en) 2016-07-08 2020-01-21 Asm Ip Holding B.V. Selective deposition method to form air gaps
US11749562B2 (en) 2016-07-08 2023-09-05 Asm Ip Holding B.V. Selective deposition method to form air gaps
US9793135B1 (en) 2016-07-14 2017-10-17 ASM IP Holding B.V Method of cyclic dry etching using etchant film
US10714385B2 (en) 2016-07-19 2020-07-14 Asm Ip Holding B.V. Selective deposition of tungsten
US10381226B2 (en) 2016-07-27 2019-08-13 Asm Ip Holding B.V. Method of processing substrate
US9887082B1 (en) 2016-07-28 2018-02-06 Asm Ip Holding B.V. Method and apparatus for filling a gap
US9812320B1 (en) 2016-07-28 2017-11-07 Asm Ip Holding B.V. Method and apparatus for filling a gap
US11694892B2 (en) 2016-07-28 2023-07-04 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10177025B2 (en) 2016-07-28 2019-01-08 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10741385B2 (en) 2016-07-28 2020-08-11 Asm Ip Holding B.V. Method and apparatus for filling a gap
US11205585B2 (en) 2016-07-28 2021-12-21 Asm Ip Holding B.V. Substrate processing apparatus and method of operating the same
US10395919B2 (en) 2016-07-28 2019-08-27 Asm Ip Holding B.V. Method and apparatus for filling a gap
US11610775B2 (en) 2016-07-28 2023-03-21 Asm Ip Holding B.V. Method and apparatus for filling a gap
US11107676B2 (en) 2016-07-28 2021-08-31 Asm Ip Holding B.V. Method and apparatus for filling a gap
US10090316B2 (en) 2016-09-01 2018-10-02 Asm Ip Holding B.V. 3D stacked multilayer semiconductor memory using doped select transistor channel
US10410943B2 (en) 2016-10-13 2019-09-10 Asm Ip Holding B.V. Method for passivating a surface of a semiconductor and related systems
US10643826B2 (en) 2016-10-26 2020-05-05 Asm Ip Holdings B.V. Methods for thermally calibrating reaction chambers
US10943771B2 (en) 2016-10-26 2021-03-09 Asm Ip Holding B.V. Methods for thermally calibrating reaction chambers
US11532757B2 (en) 2016-10-27 2022-12-20 Asm Ip Holding B.V. Deposition of charge trapping layers
US10435790B2 (en) 2016-11-01 2019-10-08 Asm Ip Holding B.V. Method of subatmospheric plasma-enhanced ALD using capacitively coupled electrodes with narrow gap
US10720331B2 (en) 2016-11-01 2020-07-21 ASM IP Holdings, B.V. Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US11810788B2 (en) 2016-11-01 2023-11-07 Asm Ip Holding B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10643904B2 (en) 2016-11-01 2020-05-05 Asm Ip Holdings B.V. Methods for forming a semiconductor device and related semiconductor device structures
US10714350B2 (en) 2016-11-01 2020-07-14 ASM IP Holdings, B.V. Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10229833B2 (en) 2016-11-01 2019-03-12 Asm Ip Holding B.V. Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures
US10644025B2 (en) 2016-11-07 2020-05-05 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by using the method
US10622375B2 (en) 2016-11-07 2020-04-14 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by using the method
US10134757B2 (en) 2016-11-07 2018-11-20 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by using the method
US11396702B2 (en) 2016-11-15 2022-07-26 Asm Ip Holding B.V. Gas supply unit and substrate processing apparatus including the gas supply unit
US10934619B2 (en) 2016-11-15 2021-03-02 Asm Ip Holding B.V. Gas supply unit and substrate processing apparatus including the gas supply unit
US10340135B2 (en) 2016-11-28 2019-07-02 Asm Ip Holding B.V. Method of topologically restricted plasma-enhanced cyclic deposition of silicon or metal nitride
US11222772B2 (en) 2016-12-14 2022-01-11 Asm Ip Holding B.V. Substrate processing apparatus
US11447861B2 (en) 2016-12-15 2022-09-20 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
US11581186B2 (en) 2016-12-15 2023-02-14 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus
US9916980B1 (en) 2016-12-15 2018-03-13 Asm Ip Holding B.V. Method of forming a structure on a substrate
US11851755B2 (en) 2016-12-15 2023-12-26 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus and a method of forming a patterned structure
US11001925B2 (en) 2016-12-19 2021-05-11 Asm Ip Holding B.V. Substrate processing apparatus
US10269558B2 (en) 2016-12-22 2019-04-23 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10784102B2 (en) 2016-12-22 2020-09-22 Asm Ip Holding B.V. Method of forming a structure on a substrate
US11251035B2 (en) 2016-12-22 2022-02-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US10867788B2 (en) 2016-12-28 2020-12-15 Asm Ip Holding B.V. Method of forming a structure on a substrate
US11390950B2 (en) 2017-01-10 2022-07-19 Asm Ip Holding B.V. Reactor system and method to reduce residue buildup during a film deposition process
US10655221B2 (en) 2017-02-09 2020-05-19 Asm Ip Holding B.V. Method for depositing oxide film by thermal ALD and PEALD
US10468262B2 (en) 2017-02-15 2019-11-05 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by a cyclical deposition and related semiconductor device structures
US11410851B2 (en) 2017-02-15 2022-08-09 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US10468261B2 (en) 2017-02-15 2019-11-05 Asm Ip Holding B.V. Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
US10529563B2 (en) 2017-03-29 2020-01-07 Asm Ip Holdings B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
US11658030B2 (en) 2017-03-29 2023-05-23 Asm Ip Holding B.V. Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures
US10283353B2 (en) 2017-03-29 2019-05-07 Asm Ip Holding B.V. Method of reforming insulating film deposited on substrate with recess pattern
US10103040B1 (en) 2017-03-31 2018-10-16 Asm Ip Holding B.V. Apparatus and method for manufacturing a semiconductor device
USD830981S1 (en) 2017-04-07 2018-10-16 Asm Ip Holding B.V. Susceptor for semiconductor substrate processing apparatus
US10714335B2 (en) 2017-04-25 2020-07-14 Asm Ip Holding B.V. Method of depositing thin film and method of manufacturing semiconductor device
US10950432B2 (en) 2017-04-25 2021-03-16 Asm Ip Holding B.V. Method of depositing thin film and method of manufacturing semiconductor device
US10770286B2 (en) 2017-05-08 2020-09-08 Asm Ip Holdings B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
US10446393B2 (en) 2017-05-08 2019-10-15 Asm Ip Holding B.V. Methods for forming silicon-containing epitaxial layers and related semiconductor device structures
US11848200B2 (en) 2017-05-08 2023-12-19 Asm Ip Holding B.V. Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures
US10892156B2 (en) 2017-05-08 2021-01-12 Asm Ip Holding B.V. Methods for forming a silicon nitride film on a substrate and related semiconductor device structures
US10504742B2 (en) 2017-05-31 2019-12-10 Asm Ip Holding B.V. Method of atomic layer etching using hydrogen plasma
US10886123B2 (en) 2017-06-02 2021-01-05 Asm Ip Holding B.V. Methods for forming low temperature semiconductor layers and related semiconductor device structures
US11306395B2 (en) 2017-06-28 2022-04-19 Asm Ip Holding B.V. Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus
US10685834B2 (en) 2017-07-05 2020-06-16 Asm Ip Holdings B.V. Methods for forming a silicon germanium tin layer and related semiconductor device structures
US11695054B2 (en) 2017-07-18 2023-07-04 Asm Ip Holding B.V. Methods for forming a semiconductor device structure and related semiconductor device structures
US10734497B2 (en) 2017-07-18 2020-08-04 Asm Ip Holding B.V. Methods for forming a semiconductor device structure and related semiconductor device structures
US11164955B2 (en) 2017-07-18 2021-11-02 Asm Ip Holding B.V. Methods for forming a semiconductor device structure and related semiconductor device structures
US10541333B2 (en) 2017-07-19 2020-01-21 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US11018002B2 (en) 2017-07-19 2021-05-25 Asm Ip Holding B.V. Method for selectively depositing a Group IV semiconductor and related semiconductor device structures
US11004977B2 (en) 2017-07-19 2021-05-11 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US11374112B2 (en) 2017-07-19 2022-06-28 Asm Ip Holding B.V. Method for depositing a group IV semiconductor and related semiconductor device structures
US10312055B2 (en) 2017-07-26 2019-06-04 Asm Ip Holding B.V. Method of depositing film by PEALD using negative bias
US10605530B2 (en) 2017-07-26 2020-03-31 Asm Ip Holding B.V. Assembly of a liner and a flange for a vertical furnace as well as the liner and the vertical furnace
US10590535B2 (en) 2017-07-26 2020-03-17 Asm Ip Holdings B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
US11802338B2 (en) 2017-07-26 2023-10-31 Asm Ip Holding B.V. Chemical treatment, deposition and/or infiltration apparatus and method for using the same
US11417545B2 (en) 2017-08-08 2022-08-16 Asm Ip Holding B.V. Radiation shield
US11587821B2 (en) 2017-08-08 2023-02-21 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US10692741B2 (en) 2017-08-08 2020-06-23 Asm Ip Holdings B.V. Radiation shield
US10770336B2 (en) 2017-08-08 2020-09-08 Asm Ip Holding B.V. Substrate lift mechanism and reactor including same
US11139191B2 (en) 2017-08-09 2021-10-05 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US10672636B2 (en) 2017-08-09 2020-06-02 Asm Ip Holding B.V. Cassette holder assembly for a substrate cassette and holding member for use in such assembly
US10249524B2 (en) 2017-08-09 2019-04-02 Asm Ip Holding B.V. Cassette holder assembly for a substrate cassette and holding member for use in such assembly
US11769682B2 (en) 2017-08-09 2023-09-26 Asm Ip Holding B.V. Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith
US10236177B1 (en) 2017-08-22 2019-03-19 ASM IP Holding B.V.. Methods for depositing a doped germanium tin semiconductor and related semiconductor device structures
USD900036S1 (en) 2017-08-24 2020-10-27 Asm Ip Holding B.V. Heater electrical connector and adapter
US11830730B2 (en) 2017-08-29 2023-11-28 Asm Ip Holding B.V. Layer forming method and apparatus
US11056344B2 (en) 2017-08-30 2021-07-06 Asm Ip Holding B.V. Layer forming method
US11295980B2 (en) 2017-08-30 2022-04-05 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
US11581220B2 (en) 2017-08-30 2023-02-14 Asm Ip Holding B.V. Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures
US11069510B2 (en) 2017-08-30 2021-07-20 Asm Ip Holding B.V. Substrate processing apparatus
US10607895B2 (en) 2017-09-18 2020-03-31 Asm Ip Holdings B.V. Method for forming a semiconductor device structure comprising a gate fill metal
US10928731B2 (en) 2017-09-21 2021-02-23 Asm Ip Holding B.V. Method of sequential infiltration synthesis treatment of infiltrateable material and structures and devices formed using same
US10844484B2 (en) 2017-09-22 2020-11-24 Asm Ip Holding B.V. Apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US11387120B2 (en) 2017-09-28 2022-07-12 Asm Ip Holding B.V. Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US10658205B2 (en) 2017-09-28 2020-05-19 Asm Ip Holdings B.V. Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber
US11094546B2 (en) 2017-10-05 2021-08-17 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
US10403504B2 (en) 2017-10-05 2019-09-03 Asm Ip Holding B.V. Method for selectively depositing a metallic film on a substrate
US10734223B2 (en) 2017-10-10 2020-08-04 Asm Ip Holding B.V. Method for depositing a metal chalcogenide on a substrate by cyclical deposition
US10319588B2 (en) 2017-10-10 2019-06-11 Asm Ip Holding B.V. Method for depositing a metal chalcogenide on a substrate by cyclical deposition
US10923344B2 (en) 2017-10-30 2021-02-16 Asm Ip Holding B.V. Methods for forming a semiconductor structure and related semiconductor structures
US10910262B2 (en) 2017-11-16 2021-02-02 Asm Ip Holding B.V. Method of selectively depositing a capping layer structure on a semiconductor device structure
US10734244B2 (en) 2017-11-16 2020-08-04 Asm Ip Holding B.V. Method of processing a substrate and a device manufactured by the same
US11022879B2 (en) 2017-11-24 2021-06-01 Asm Ip Holding B.V. Method of forming an enhanced unexposed photoresist layer
US11682572B2 (en) 2017-11-27 2023-06-20 Asm Ip Holdings B.V. Storage device for storing wafer cassettes for use with a batch furnace
US11639811B2 (en) 2017-11-27 2023-05-02 Asm Ip Holding B.V. Apparatus including a clean mini environment
US11127617B2 (en) 2017-11-27 2021-09-21 Asm Ip Holding B.V. Storage device for storing wafer cassettes for use with a batch furnace
US10290508B1 (en) 2017-12-05 2019-05-14 Asm Ip Holding B.V. Method for forming vertical spacers for spacer-defined patterning
US10872771B2 (en) 2018-01-16 2020-12-22 Asm Ip Holding B. V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
US11501973B2 (en) 2018-01-16 2022-11-15 Asm Ip Holding B.V. Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures
US11393690B2 (en) 2018-01-19 2022-07-19 Asm Ip Holding B.V. Deposition method
US11482412B2 (en) 2018-01-19 2022-10-25 Asm Ip Holding B.V. Method for depositing a gap-fill layer by plasma-assisted deposition
USD903477S1 (en) 2018-01-24 2020-12-01 Asm Ip Holdings B.V. Metal clamp
US11018047B2 (en) 2018-01-25 2021-05-25 Asm Ip Holding B.V. Hybrid lift pin
US10535516B2 (en) 2018-02-01 2020-01-14 Asm Ip Holdings B.V. Method for depositing a semiconductor structure on a surface of a substrate and related semiconductor structures
USD913980S1 (en) 2018-02-01 2021-03-23 Asm Ip Holding B.V. Gas supply plate for semiconductor manufacturing apparatus
USD880437S1 (en) 2018-02-01 2020-04-07 Asm Ip Holding B.V. Gas supply plate for semiconductor manufacturing apparatus
US11735414B2 (en) 2018-02-06 2023-08-22 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
US11081345B2 (en) 2018-02-06 2021-08-03 Asm Ip Holding B.V. Method of post-deposition treatment for silicon oxide film
US11387106B2 (en) 2018-02-14 2022-07-12 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10896820B2 (en) 2018-02-14 2021-01-19 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US11685991B2 (en) 2018-02-14 2023-06-27 Asm Ip Holding B.V. Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process
US10731249B2 (en) 2018-02-15 2020-08-04 Asm Ip Holding B.V. Method of forming a transition metal containing film on a substrate by a cyclical deposition process, a method for supplying a transition metal halide compound to a reaction chamber, and related vapor deposition apparatus
US10658181B2 (en) 2018-02-20 2020-05-19 Asm Ip Holding B.V. Method of spacer-defined direct patterning in semiconductor fabrication
US11482418B2 (en) 2018-02-20 2022-10-25 Asm Ip Holding B.V. Substrate processing method and apparatus
US10975470B2 (en) 2018-02-23 2021-04-13 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11939673B2 (en) 2018-02-23 2024-03-26 Asm Ip Holding B.V. Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment
US11473195B2 (en) 2018-03-01 2022-10-18 Asm Ip Holding B.V. Semiconductor processing apparatus and a method for processing a substrate
US11629406B2 (en) 2018-03-09 2023-04-18 Asm Ip Holding B.V. Semiconductor processing apparatus comprising one or more pyrometers for measuring a temperature of a substrate during transfer of the substrate
US11114283B2 (en) 2018-03-16 2021-09-07 Asm Ip Holding B.V. Reactor, system including the reactor, and methods of manufacturing and using same
US11398382B2 (en) 2018-03-27 2022-07-26 Asm Ip Holding B.V. Method of forming an electrode on a substrate and a semiconductor device structure including an electrode
US10847371B2 (en) 2018-03-27 2020-11-24 Asm Ip Holding B.V. Method of forming an electrode on a substrate and a semiconductor device structure including an electrode
US11088002B2 (en) 2018-03-29 2021-08-10 Asm Ip Holding B.V. Substrate rack and a substrate processing system and method
US10510536B2 (en) 2018-03-29 2019-12-17 Asm Ip Holding B.V. Method of depositing a co-doped polysilicon film on a surface of a substrate within a reaction chamber
US11230766B2 (en) 2018-03-29 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US10867786B2 (en) 2018-03-30 2020-12-15 Asm Ip Holding B.V. Substrate processing method
US11469098B2 (en) 2018-05-08 2022-10-11 Asm Ip Holding B.V. Methods for depositing an oxide film on a substrate by a cyclical deposition process and related device structures
US11056567B2 (en) 2018-05-11 2021-07-06 Asm Ip Holding B.V. Method of forming a doped metal carbide film on a substrate and related semiconductor device structures
JP2019204815A (en) * 2018-05-21 2019-11-28 東京エレクトロン株式会社 Substrate processing method and substrate processing apparatus
US11361990B2 (en) 2018-05-28 2022-06-14 Asm Ip Holding B.V. Substrate processing method and device manufactured by using the same
US11908733B2 (en) 2018-05-28 2024-02-20 Asm Ip Holding B.V. Substrate processing method and device manufactured by using the same
US11837483B2 (en) 2018-06-04 2023-12-05 Asm Ip Holding B.V. Wafer handling chamber with moisture reduction
US11718913B2 (en) 2018-06-04 2023-08-08 Asm Ip Holding B.V. Gas distribution system and reactor system including same
US11270899B2 (en) 2018-06-04 2022-03-08 Asm Ip Holding B.V. Wafer handling chamber with moisture reduction
US11286562B2 (en) 2018-06-08 2022-03-29 Asm Ip Holding B.V. Gas-phase chemical reactor and method of using same
US11530483B2 (en) 2018-06-21 2022-12-20 Asm Ip Holding B.V. Substrate processing system
US11296189B2 (en) 2018-06-21 2022-04-05 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
US10797133B2 (en) 2018-06-21 2020-10-06 Asm Ip Holding B.V. Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures
US11492703B2 (en) 2018-06-27 2022-11-08 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11814715B2 (en) 2018-06-27 2023-11-14 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11499222B2 (en) 2018-06-27 2022-11-15 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11952658B2 (en) 2018-06-27 2024-04-09 Asm Ip Holding B.V. Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material
US11168395B2 (en) 2018-06-29 2021-11-09 Asm Ip Holding B.V. Temperature-controlled flange and reactor system including same
US10612136B2 (en) 2018-06-29 2020-04-07 ASM IP Holding, B.V. Temperature-controlled flange and reactor system including same
US10914004B2 (en) 2018-06-29 2021-02-09 Asm Ip Holding B.V. Thin-film deposition method and manufacturing method of semiconductor device
US11923190B2 (en) 2018-07-03 2024-03-05 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10755923B2 (en) 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10388513B1 (en) 2018-07-03 2019-08-20 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US11646197B2 (en) 2018-07-03 2023-05-09 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10755922B2 (en) 2018-07-03 2020-08-25 Asm Ip Holding B.V. Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition
US10767789B2 (en) 2018-07-16 2020-09-08 Asm Ip Holding B.V. Diaphragm valves, valve components, and methods for forming valve components
KR20210033442A (en) 2018-07-23 2021-03-26 도쿄엘렉트론가부시키가이샤 Etching method and etching apparatus
US11462407B2 (en) 2018-07-23 2022-10-04 Tokyo Electron Limited Etching method and etching apparatus
US10483099B1 (en) 2018-07-26 2019-11-19 Asm Ip Holding B.V. Method for forming thermally stable organosilicon polymer film
US11053591B2 (en) 2018-08-06 2021-07-06 Asm Ip Holding B.V. Multi-port gas injection system and reactor system including same
US10883175B2 (en) 2018-08-09 2021-01-05 Asm Ip Holding B.V. Vertical furnace for processing substrates and a liner for use therein
US10829852B2 (en) 2018-08-16 2020-11-10 Asm Ip Holding B.V. Gas distribution device for a wafer processing apparatus
US11430674B2 (en) 2018-08-22 2022-08-30 Asm Ip Holding B.V. Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods
US11274369B2 (en) 2018-09-11 2022-03-15 Asm Ip Holding B.V. Thin film deposition method
US11804388B2 (en) 2018-09-11 2023-10-31 Asm Ip Holding B.V. Substrate processing apparatus and method
US11024523B2 (en) 2018-09-11 2021-06-01 Asm Ip Holding B.V. Substrate processing apparatus and method
US11049751B2 (en) 2018-09-14 2021-06-29 Asm Ip Holding B.V. Cassette supply system to store and handle cassettes and processing apparatus equipped therewith
US11885023B2 (en) 2018-10-01 2024-01-30 Asm Ip Holding B.V. Substrate retaining apparatus, system including the apparatus, and method of using same
US11232963B2 (en) 2018-10-03 2022-01-25 Asm Ip Holding B.V. Substrate processing apparatus and method
US11414760B2 (en) 2018-10-08 2022-08-16 Asm Ip Holding B.V. Substrate support unit, thin film deposition apparatus including the same, and substrate processing apparatus including the same
US10847365B2 (en) 2018-10-11 2020-11-24 Asm Ip Holding B.V. Method of forming conformal silicon carbide film by cyclic CVD
US10811256B2 (en) 2018-10-16 2020-10-20 Asm Ip Holding B.V. Method for etching a carbon-containing feature
US11251068B2 (en) 2018-10-19 2022-02-15 Asm Ip Holding B.V. Substrate processing apparatus and substrate processing method
US11664199B2 (en) 2018-10-19 2023-05-30 Asm Ip Holding B.V. Substrate processing apparatus and substrate processing method
USD948463S1 (en) 2018-10-24 2022-04-12 Asm Ip Holding B.V. Susceptor for semiconductor substrate supporting apparatus
US10381219B1 (en) 2018-10-25 2019-08-13 Asm Ip Holding B.V. Methods for forming a silicon nitride film
US11087997B2 (en) 2018-10-31 2021-08-10 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
US11735445B2 (en) 2018-10-31 2023-08-22 Asm Ip Holding B.V. Substrate processing apparatus for processing substrates
US11866823B2 (en) 2018-11-02 2024-01-09 Asm Ip Holding B.V. Substrate supporting unit and a substrate processing device including the same
US11499226B2 (en) 2018-11-02 2022-11-15 Asm Ip Holding B.V. Substrate supporting unit and a substrate processing device including the same
US11572620B2 (en) 2018-11-06 2023-02-07 Asm Ip Holding B.V. Methods for selectively depositing an amorphous silicon film on a substrate
US11031242B2 (en) 2018-11-07 2021-06-08 Asm Ip Holding B.V. Methods for depositing a boron doped silicon germanium film
US11411088B2 (en) 2018-11-16 2022-08-09 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US10847366B2 (en) 2018-11-16 2020-11-24 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US11244825B2 (en) 2018-11-16 2022-02-08 Asm Ip Holding B.V. Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process
US10818758B2 (en) 2018-11-16 2020-10-27 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US11798999B2 (en) 2018-11-16 2023-10-24 Asm Ip Holding B.V. Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures
US10559458B1 (en) 2018-11-26 2020-02-11 Asm Ip Holding B.V. Method of forming oxynitride film
US11217444B2 (en) 2018-11-30 2022-01-04 Asm Ip Holding B.V. Method for forming an ultraviolet radiation responsive metal oxide-containing film
US11488819B2 (en) 2018-12-04 2022-11-01 Asm Ip Holding B.V. Method of cleaning substrate processing apparatus
US11158513B2 (en) 2018-12-13 2021-10-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
US11769670B2 (en) 2018-12-13 2023-09-26 Asm Ip Holding B.V. Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures
US11658029B2 (en) 2018-12-14 2023-05-23 Asm Ip Holding B.V. Method of forming a device structure using selective deposition of gallium nitride and system for same
US11959171B2 (en) 2019-01-17 2024-04-16 Asm Ip Holding B.V. Methods of forming a transition metal containing film on a substrate by a cyclical deposition process
US11390946B2 (en) 2019-01-17 2022-07-19 Asm Ip Holding B.V. Methods of forming a transition metal containing film on a substrate by a cyclical deposition process
US11171025B2 (en) 2019-01-22 2021-11-09 Asm Ip Holding B.V. Substrate processing device
US11127589B2 (en) 2019-02-01 2021-09-21 Asm Ip Holding B.V. Method of topology-selective film formation of silicon oxide
US11482533B2 (en) 2019-02-20 2022-10-25 Asm Ip Holding B.V. Apparatus and methods for plug fill deposition in 3-D NAND applications
US11615980B2 (en) 2019-02-20 2023-03-28 Asm Ip Holding B.V. Method and apparatus for filling a recess formed within a substrate surface
US11227789B2 (en) 2019-02-20 2022-01-18 Asm Ip Holding B.V. Method and apparatus for filling a recess formed within a substrate surface
US11798834B2 (en) 2019-02-20 2023-10-24 Asm Ip Holding B.V. Cyclical deposition method and apparatus for filling a recess formed within a substrate surface
US11251040B2 (en) 2019-02-20 2022-02-15 Asm Ip Holding B.V. Cyclical deposition method including treatment step and apparatus for same
US11342216B2 (en) 2019-02-20 2022-05-24 Asm Ip Holding B.V. Cyclical deposition method and apparatus for filling a recess formed within a substrate surface
US11629407B2 (en) 2019-02-22 2023-04-18 Asm Ip Holding B.V. Substrate processing apparatus and method for processing substrates
US11742198B2 (en) 2019-03-08 2023-08-29 Asm Ip Holding B.V. Structure including SiOCN layer and method of forming same
US11424119B2 (en) 2019-03-08 2022-08-23 Asm Ip Holding B.V. Method for selective deposition of silicon nitride layer and structure including selectively-deposited silicon nitride layer
US11114294B2 (en) 2019-03-08 2021-09-07 Asm Ip Holding B.V. Structure including SiOC layer and method of forming same
US11901175B2 (en) 2019-03-08 2024-02-13 Asm Ip Holding B.V. Method for selective deposition of silicon nitride layer and structure including selectively-deposited silicon nitride layer
US11378337B2 (en) 2019-03-28 2022-07-05 Asm Ip Holding B.V. Door opener and substrate processing apparatus provided therewith
US11551925B2 (en) 2019-04-01 2023-01-10 Asm Ip Holding B.V. Method for manufacturing a semiconductor device
US11447864B2 (en) 2019-04-19 2022-09-20 Asm Ip Holding B.V. Layer forming method and apparatus
US11814747B2 (en) 2019-04-24 2023-11-14 Asm Ip Holding B.V. Gas-phase reactor system-with a reaction chamber, a solid precursor source vessel, a gas distribution system, and a flange assembly
US11781221B2 (en) 2019-05-07 2023-10-10 Asm Ip Holding B.V. Chemical source vessel with dip tube
US11289326B2 (en) 2019-05-07 2022-03-29 Asm Ip Holding B.V. Method for reforming amorphous carbon polymer film
US11355338B2 (en) 2019-05-10 2022-06-07 Asm Ip Holding B.V. Method of depositing material onto a surface and structure formed according to the method
US11515188B2 (en) 2019-05-16 2022-11-29 Asm Ip Holding B.V. Wafer boat handling device, vertical batch furnace and method
USD975665S1 (en) 2019-05-17 2023-01-17 Asm Ip Holding B.V. Susceptor shaft
USD947913S1 (en) 2019-05-17 2022-04-05 Asm Ip Holding B.V. Susceptor shaft
USD935572S1 (en) 2019-05-24 2021-11-09 Asm Ip Holding B.V. Gas channel plate
USD922229S1 (en) 2019-06-05 2021-06-15 Asm Ip Holding B.V. Device for controlling a temperature of a gas supply unit
US11345999B2 (en) 2019-06-06 2022-05-31 Asm Ip Holding B.V. Method of using a gas-phase reactor system including analyzing exhausted gas
US11476109B2 (en) 2019-06-11 2022-10-18 Asm Ip Holding B.V. Method of forming an electronic structure using reforming gas, system for performing the method, and structure formed using the method
US11908684B2 (en) 2019-06-11 2024-02-20 Asm Ip Holding B.V. Method of forming an electronic structure using reforming gas, system for performing the method, and structure formed using the method
USD944946S1 (en) 2019-06-14 2022-03-01 Asm Ip Holding B.V. Shower plate
USD931978S1 (en) 2019-06-27 2021-09-28 Asm Ip Holding B.V. Showerhead vacuum transport
US11746414B2 (en) 2019-07-03 2023-09-05 Asm Ip Holding B.V. Temperature control assembly for substrate processing apparatus and method of using same
US11390945B2 (en) 2019-07-03 2022-07-19 Asm Ip Holding B.V. Temperature control assembly for substrate processing apparatus and method of using same
US11605528B2 (en) 2019-07-09 2023-03-14 Asm Ip Holding B.V. Plasma device using coaxial waveguide, and substrate treatment method
US11664267B2 (en) 2019-07-10 2023-05-30 Asm Ip Holding B.V. Substrate support assembly and substrate processing device including the same
US11664245B2 (en) 2019-07-16 2023-05-30 Asm Ip Holding B.V. Substrate processing device
US11688603B2 (en) 2019-07-17 2023-06-27 Asm Ip Holding B.V. Methods of forming silicon germanium structures
US11615970B2 (en) 2019-07-17 2023-03-28 Asm Ip Holding B.V. Radical assist ignition plasma system and method
US11643724B2 (en) 2019-07-18 2023-05-09 Asm Ip Holding B.V. Method of forming structures using a neutral beam
US11282698B2 (en) 2019-07-19 2022-03-22 Asm Ip Holding B.V. Method of forming topology-controlled amorphous carbon polymer film
US11557474B2 (en) 2019-07-29 2023-01-17 Asm Ip Holding B.V. Methods for selective deposition utilizing n-type dopants and/or alternative dopants to achieve high dopant incorporation
US11443926B2 (en) 2019-07-30 2022-09-13 Asm Ip Holding B.V. Substrate processing apparatus
US11430640B2 (en) 2019-07-30 2022-08-30 Asm Ip Holding B.V. Substrate processing apparatus
US11227782B2 (en) 2019-07-31 2022-01-18 Asm Ip Holding B.V. Vertical batch furnace assembly
US11876008B2 (en) 2019-07-31 2024-01-16 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587814B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11587815B2 (en) 2019-07-31 2023-02-21 Asm Ip Holding B.V. Vertical batch furnace assembly
US11680839B2 (en) 2019-08-05 2023-06-20 Asm Ip Holding B.V. Liquid level sensor for a chemical source vessel
USD965524S1 (en) 2019-08-19 2022-10-04 Asm Ip Holding B.V. Susceptor support
USD965044S1 (en) 2019-08-19 2022-09-27 Asm Ip Holding B.V. Susceptor shaft
US11639548B2 (en) 2019-08-21 2023-05-02 Asm Ip Holding B.V. Film-forming material mixed-gas forming device and film forming device
USD940837S1 (en) 2019-08-22 2022-01-11 Asm Ip Holding B.V. Electrode
USD949319S1 (en) 2019-08-22 2022-04-19 Asm Ip Holding B.V. Exhaust duct
USD930782S1 (en) 2019-08-22 2021-09-14 Asm Ip Holding B.V. Gas distributor
US11594450B2 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Method for forming a structure with a hole
USD979506S1 (en) 2019-08-22 2023-02-28 Asm Ip Holding B.V. Insulator
US11898242B2 (en) 2019-08-23 2024-02-13 Asm Ip Holding B.V. Methods for forming a polycrystalline molybdenum film over a surface of a substrate and related structures including a polycrystalline molybdenum film
US11527400B2 (en) 2019-08-23 2022-12-13 Asm Ip Holding B.V. Method for depositing silicon oxide film having improved quality by peald using bis(diethylamino)silane
US11286558B2 (en) 2019-08-23 2022-03-29 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
US11827978B2 (en) 2019-08-23 2023-11-28 Asm Ip Holding B.V. Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film
US11495459B2 (en) 2019-09-04 2022-11-08 Asm Ip Holding B.V. Methods for selective deposition using a sacrificial capping layer
US11823876B2 (en) 2019-09-05 2023-11-21 Asm Ip Holding B.V. Substrate processing apparatus
US11562901B2 (en) 2019-09-25 2023-01-24 Asm Ip Holding B.V. Substrate processing method
US11610774B2 (en) 2019-10-02 2023-03-21 Asm Ip Holding B.V. Methods for forming a topographically selective silicon oxide film by a cyclical plasma-enhanced deposition process
US11339476B2 (en) 2019-10-08 2022-05-24 Asm Ip Holding B.V. Substrate processing device having connection plates, substrate processing method
US11735422B2 (en) 2019-10-10 2023-08-22 Asm Ip Holding B.V. Method of forming a photoresist underlayer and structure including same
US11637011B2 (en) 2019-10-16 2023-04-25 Asm Ip Holding B.V. Method of topology-selective film formation of silicon oxide
US11637014B2 (en) 2019-10-17 2023-04-25 Asm Ip Holding B.V. Methods for selective deposition of doped semiconductor material
US11315794B2 (en) 2019-10-21 2022-04-26 Asm Ip Holding B.V. Apparatus and methods for selectively etching films
US11646205B2 (en) 2019-10-29 2023-05-09 Asm Ip Holding B.V. Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same
US11594600B2 (en) 2019-11-05 2023-02-28 Asm Ip Holding B.V. Structures with doped semiconductor layers and methods and systems for forming same
US11501968B2 (en) 2019-11-15 2022-11-15 Asm Ip Holding B.V. Method for providing a semiconductor device with silicon filled gaps
US11626316B2 (en) 2019-11-20 2023-04-11 Asm Ip Holding B.V. Method of depositing carbon-containing material on a surface of a substrate, structure formed using the method, and system for forming the structure
US11401605B2 (en) 2019-11-26 2022-08-02 Asm Ip Holding B.V. Substrate processing apparatus
US11915929B2 (en) 2019-11-26 2024-02-27 Asm Ip Holding B.V. Methods for selectively forming a target film on a substrate comprising a first dielectric surface and a second metallic surface
US11646184B2 (en) 2019-11-29 2023-05-09 Asm Ip Holding B.V. Substrate processing apparatus
US11923181B2 (en) 2019-11-29 2024-03-05 Asm Ip Holding B.V. Substrate processing apparatus for minimizing the effect of a filling gas during substrate processing
US11929251B2 (en) 2019-12-02 2024-03-12 Asm Ip Holding B.V. Substrate processing apparatus having electrostatic chuck and substrate processing method
US11840761B2 (en) 2019-12-04 2023-12-12 Asm Ip Holding B.V. Substrate processing apparatus
US11361973B2 (en) 2019-12-06 2022-06-14 Tokyo Electron Limited Etching method and etching apparatus
US11885013B2 (en) 2019-12-17 2024-01-30 Asm Ip Holding B.V. Method of forming vanadium nitride layer and structure including the vanadium nitride layer
US11527403B2 (en) 2019-12-19 2022-12-13 Asm Ip Holding B.V. Methods for filling a gap feature on a substrate surface and related semiconductor structures
US11551912B2 (en) 2020-01-20 2023-01-10 Asm Ip Holding B.V. Method of forming thin film and method of modifying surface of thin film
US11521851B2 (en) 2020-02-03 2022-12-06 Asm Ip Holding B.V. Method of forming structures including a vanadium or indium layer
US11828707B2 (en) 2020-02-04 2023-11-28 Asm Ip Holding B.V. Method and apparatus for transmittance measurements of large articles
US11776846B2 (en) 2020-02-07 2023-10-03 Asm Ip Holding B.V. Methods for depositing gap filling fluids and related systems and devices
US11781243B2 (en) 2020-02-17 2023-10-10 Asm Ip Holding B.V. Method for depositing low temperature phosphorous-doped silicon
US11594418B2 (en) 2020-02-21 2023-02-28 Tokyo Electron Limited Etching method and etching apparatus
US11488854B2 (en) 2020-03-11 2022-11-01 Asm Ip Holding B.V. Substrate handling device with adjustable joints
US11837494B2 (en) 2020-03-11 2023-12-05 Asm Ip Holding B.V. Substrate handling device with adjustable joints
US11876356B2 (en) 2020-03-11 2024-01-16 Asm Ip Holding B.V. Lockout tagout assembly and system and method of using same
US11961741B2 (en) 2020-03-12 2024-04-16 Asm Ip Holding B.V. Method for fabricating layer structure having target topological profile
US11823866B2 (en) 2020-04-02 2023-11-21 Asm Ip Holding B.V. Thin film forming method
US11830738B2 (en) 2020-04-03 2023-11-28 Asm Ip Holding B.V. Method for forming barrier layer and method for manufacturing semiconductor device
US11437241B2 (en) 2020-04-08 2022-09-06 Asm Ip Holding B.V. Apparatus and methods for selectively etching silicon oxide films
US11821078B2 (en) 2020-04-15 2023-11-21 Asm Ip Holding B.V. Method for forming precoat film and method for forming silicon-containing film
US11887857B2 (en) 2020-04-24 2024-01-30 Asm Ip Holding B.V. Methods and systems for depositing a layer comprising vanadium, nitrogen, and a further element
US11530876B2 (en) 2020-04-24 2022-12-20 Asm Ip Holding B.V. Vertical batch furnace assembly comprising a cooling gas supply
US11898243B2 (en) 2020-04-24 2024-02-13 Asm Ip Holding B.V. Method of forming vanadium nitride-containing layer
US11959168B2 (en) 2020-04-29 2024-04-16 Asm Ip Holding B.V. Solid source precursor vessel
US11515187B2 (en) 2020-05-01 2022-11-29 Asm Ip Holding B.V. Fast FOUP swapping with a FOUP handler
US11798830B2 (en) 2020-05-01 2023-10-24 Asm Ip Holding B.V. Fast FOUP swapping with a FOUP handler
US11626308B2 (en) 2020-05-13 2023-04-11 Asm Ip Holding B.V. Laser alignment fixture for a reactor system
US11804364B2 (en) 2020-05-19 2023-10-31 Asm Ip Holding B.V. Substrate processing apparatus
US11705333B2 (en) 2020-05-21 2023-07-18 Asm Ip Holding B.V. Structures including multiple carbon layers and methods of forming and using same
US11767589B2 (en) 2020-05-29 2023-09-26 Asm Ip Holding B.V. Substrate processing device
US11646204B2 (en) 2020-06-24 2023-05-09 Asm Ip Holding B.V. Method for forming a layer provided with silicon
US11658035B2 (en) 2020-06-30 2023-05-23 Asm Ip Holding B.V. Substrate processing method
US11644758B2 (en) 2020-07-17 2023-05-09 Asm Ip Holding B.V. Structures and methods for use in photolithography
US11674220B2 (en) 2020-07-20 2023-06-13 Asm Ip Holding B.V. Method for depositing molybdenum layers using an underlayer
US11725280B2 (en) 2020-08-26 2023-08-15 Asm Ip Holding B.V. Method for forming metal silicon oxide and metal silicon oxynitride layers
USD990534S1 (en) 2020-09-11 2023-06-27 Asm Ip Holding B.V. Weighted lift pin
USD1012873S1 (en) 2020-09-24 2024-01-30 Asm Ip Holding B.V. Electrode for semiconductor processing apparatus
US11827981B2 (en) 2020-10-14 2023-11-28 Asm Ip Holding B.V. Method of depositing material on stepped structure
US11873557B2 (en) 2020-10-22 2024-01-16 Asm Ip Holding B.V. Method of depositing vanadium metal
US11901179B2 (en) 2020-10-28 2024-02-13 Asm Ip Holding B.V. Method and device for depositing silicon onto substrates
US11891696B2 (en) 2020-11-30 2024-02-06 Asm Ip Holding B.V. Injector configured for arrangement within a reaction chamber of a substrate processing apparatus
US11946137B2 (en) 2020-12-16 2024-04-02 Asm Ip Holding B.V. Runout and wobble measurement fixtures
US11885020B2 (en) 2020-12-22 2024-01-30 Asm Ip Holding B.V. Transition metal deposition method
USD981973S1 (en) 2021-05-11 2023-03-28 Asm Ip Holding B.V. Reactor wall for substrate processing apparatus
USD980814S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas distributor for substrate processing apparatus
USD980813S1 (en) 2021-05-11 2023-03-14 Asm Ip Holding B.V. Gas flow control plate for substrate processing apparatus
USD990441S1 (en) 2021-09-07 2023-06-27 Asm Ip Holding B.V. Gas flow control plate
US11972944B2 (en) 2022-10-21 2024-04-30 Asm Ip Holding B.V. Method for depositing a gap-fill layer by plasma-assisted deposition
US11970766B2 (en) 2023-01-17 2024-04-30 Asm Ip Holding B.V. Sequential infiltration synthesis apparatus

Also Published As

Publication number Publication date
JP5236983B2 (en) 2013-07-17
KR100967924B1 (en) 2010-07-06
TW200929358A (en) 2009-07-01
KR20090032938A (en) 2009-04-01
CN101399189A (en) 2009-04-01
TWI389202B (en) 2013-03-11

Similar Documents

Publication Publication Date Title
JP5236983B2 (en) Semiconductor device manufacturing method, semiconductor device manufacturing apparatus, control program, and program storage medium
KR100967925B1 (en) Method for manufacturing semiconductor apparatus, device for manufacturing semiconductor apparatus, and storage medium for program
US20090087990A1 (en) Manufacturing method, manufacturing apparatus, control program and program recording medium of semiconductor device
JP5067068B2 (en) Semiconductor device manufacturing method and storage medium
JP5248902B2 (en) Substrate processing method
US7977242B2 (en) Double mask self-aligned double patterning technology (SADPT) process
US7919414B2 (en) Method for forming fine patterns in semiconductor device
US20090068838A1 (en) Method for forming micropatterns in semiconductor device
JP2007224383A (en) Method for forming amorphous carbon film, method for producing semiconductor device using the same and computer readable storage medium
JP2009536787A (en) Pitch reduction
US20090068842A1 (en) Method for forming micropatterns in semiconductor device
US10886138B2 (en) Substrate processing method and substrate processing apparatus
KR102401316B1 (en) Plasma etching method, pattern forming method, and cleaning method
JP2010087300A (en) Method of manufacturing semiconductor device
JP2012233259A (en) Method for depositing amorphous carbon film, method for producing semiconductor device using the same, and computer-readable storage medium
US8198183B2 (en) Forming method of etching mask, control program and program storage medium
TWI567785B (en) Method for fabricating patterned structure of semiconductor device
JP2009200080A (en) Plasma etching method, plasma etching apparatus, control program and computer readable storage medium
CN114388352A (en) Semiconductor structure and forming method thereof
CN112786436A (en) Semiconductor structure and forming method thereof
JP5344824B2 (en) Method for forming resist pattern and recording medium
CN210607186U (en) Semiconductor structure
CN112735947A (en) Semiconductor structure and forming method thereof
JP5484363B2 (en) Substrate processing method
CN115223863A (en) Method for manufacturing semiconductor structure

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20101215

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20110909

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20121023

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20121221

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20130129

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130308

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20130326

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20130328

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

Ref document number: 5236983

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20160405

Year of fee payment: 3

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees