JP2009088011A - Wiring board and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board capable of correctly recognizing a positioning mark for recognizing a mounting position of an electronic component by an image recognizer and connecting an electrode of the electronic component with a connection pad via solder with excellent positioning accuracy, and to provide a method of manufacturing the same. <P>SOLUTION: The wiring board includes, on an upper surface of an insulating substrate 1, a conductor layer for the connection pad, an ink layer 12 for the positioning mark for recognizing the mounting position of the electronic component, and a solder resist layer 9 for selectively exposing the connection pad and the positioning mark, respectively. The ink layer 12 is formed by filling an ink composition on the upper surface of the insulating substrate 1 exposed in an opening 14 provided on an ink filled layer 13 adhered and formed on the upper surface of the insulating substrate 1. The center of an upper surface of the ink layer 12 is selectively exposed from an opening 10 provided on the solder resist layer 9 thereby forming the positioning mark 11. The wiring board thus constituted and the method of manufacturing the same are disclosed. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a wiring board on which a positioning mark for recognizing a mounting position of an electronic component is formed, and a manufacturing method thereof.

  Conventionally, a wiring board on which electronic components are mounted has, for example, a copper foil or copper on the inside and surface of an insulating board formed by laminating a plurality of insulating layers made of an epoxy resin or an insulating board made of a glass-epoxy board. A wiring conductor made of a conductor layer such as a plating film is provided. A part of the conductor layer provided on the surface of the insulating substrate forms a plurality of connection pads to which the electrodes of the electronic component are connected via solder.

  On the surface of the insulating substrate on which these connection pads are formed, a solder resist layer having an opening for exposing each connection pad is deposited. Solder is deposited on the connection pads exposed from the solder resist layer. For solder welding, a method is generally employed in which a solder paste is printed on the exposed surface of the connection pad by screen printing, and then the solder paste is melted and welded. And after aligning the electrode of an electronic component with the connection pad to which solder was welded, the electronic component is mounted on the wiring board by joining the electrode of the electronic component and the connection pad via the solder.

  Here, when aligning the electrode of the electronic component with the connection pad, an automatic machine equipped with an image recognition device such as a CCD camera is usually used. That is, a positioning mark (alignment mark) serving as a reference for aligning the electronic component is provided on the upper surface of the insulating substrate, and the positioning mark is recognized by an image recognition device of an automatic machine, and automatically based on the information. Use to align the electronic components. The positioning mark is usually formed on the surface of the insulating substrate with the same conductor layer as the connection pad, and is formed by exposing from an opening provided in the solder resist layer.

However, the positioning mark having such a configuration has the following problems (i) and (ii).
(I) Since the conductor layer constituting the positioning mark is made of a copper foil, a copper plating film, or the like, the surface of the positioning mark is oxidized and discolored when exposed to the atmosphere, and cannot be accurately recognized by the image recognition apparatus. Oxidation also occurs when heated in a solder pre-coating, a wiring substrate dehumidification process, or the like.
(Ii) In the manufacturing process, impurities such as sulfur (S) and phosphorus (P) adhere to the surface of the positioning mark, causing the surface of the positioning mark to change color, and the image recognition apparatus cannot recognize it accurately.

  On the other hand, Patent Document 1 describes a printed wiring board in which a part of a colored first insulating film exposed from a second insulating film is used as an alignment mark serving as an alignment index of a substrate.

  However, the mark described in Patent Document 1 has a convex cross section. For this reason, there is a problem that light is irregularly reflected on the surface of the mark and the mark cannot be accurately recognized by the image recognition apparatus. In addition, when the colored first insulating coating is deposited across the conductor layers, there is a problem that irregularities occur on the mark surface. A mark having irregularities on the surface is diffusely reflected in the same manner as described above, and cannot be accurately recognized by the image recognition apparatus. In order to reduce the unevenness, it is conceivable to form the first insulating film thin. However, the thickness of the first insulating film described in Reference 1 is 10 to 20 μm, and the thin film Is difficult. In addition, the conductor layer may be exposed from the thinned first insulating film.

  Patent Document 2 describes a circuit board in which an alignment mark is formed of a conductor on a substrate surface and a transparent film is formed on the surface of the alignment mark. According to this document, it is described that irregular reflection of light due to fine unevenness existing on the surface of the mark is effectively suppressed by a transparent film covering the surface.

  However, depending on the film thickness and composition of the transparent film, there is a possibility that the mark cannot be accurately recognized by the image recognition apparatus. Further, in Patent Document 2, the transparent coating is formed by baking transparent glass on the mark surface or printing and drying a molten transparent resin. There is also a risk of discoloration.

  Patent Document 3 includes a first alignment mark formed above a substrate and a second alignment mark that covers the first alignment mark. The second alignment mark transmits alignment light, and An alignment mark serving as a reference for alignment in a later process is described by the fact that one alignment mark reflects alignment light.

  However, the mark described in Patent Document 3 may not be able to be accurately recognized by the image recognition device, depending on the film thickness and composition of the second alignment mark, as in Patent Document 2.

JP-A-7-231149 (page 6, right column, lines 5-7, FIG. 4) JP-A-10-163588 JP 2001-42547 A

  An object of the present invention is to accurately recognize a positioning mark for recognizing a mounting position of an electronic component with an image recognition device and connect the electrode of the electronic component and a connection pad with excellent positional accuracy via solder. It is to provide a possible wiring board and a manufacturing method thereof.

As a result of intensive studies to solve the above-mentioned problems, the present inventors have found a solution means having the following constitution and have completed the present invention.
(1) A conductive layer for a connection pad to which an electrode of the electronic component is connected on an upper surface of an insulating substrate on which the electronic component is mounted, and an ink layer for a positioning mark for recognizing the mounting position of the electronic component A wiring board comprising a solder resist layer for selectively exposing the connection pads and the positioning marks, wherein the ink layer is provided on an ink filling layer deposited on the upper surface of the insulating substrate. The upper surface of the insulating substrate exposed in the opening is filled with an ink composition, and at least the central portion of the upper surface of the ink layer is selectively exposed from the opening provided in the solder resist layer. A wiring board, wherein the positioning mark is formed by the following.

  (2) A conductive layer for a connection pad to which an electrode of the electronic component is connected on an upper surface of an insulating substrate on which the electronic component is mounted; an ink layer for a positioning mark for recognizing the mounting position of the electronic component; A wiring board comprising a solder resist layer for selectively exposing the connection pads and the positioning marks, wherein the ink layer is provided on an ink filling layer deposited on the upper surface of the insulating substrate. The positioning marks are formed by selectively exposing at least the center of the upper surface of the ink layer from the opening provided in the solder resist layer. A wiring board characterized by comprising:

(3) The wiring board according to (1) or (2), wherein the ink filling layer is made of the same conductor layer as the conductor layer.
(4) The wiring board according to any one of (1) to (3), wherein the ink composition does not contain a pigment.

  The method for manufacturing a wiring board according to the present invention is for forming a conductor layer for a connection pad to which an electrode of the electronic component is connected and an ink layer for a positioning mark on an upper surface of an insulating substrate on which the electronic component is mounted. A step of depositing an ink filling layer, a step of filling the upper surface of the insulating substrate exposed in an opening provided in the ink filling layer with an ink composition to form the ink layer, Depositing a solder resist layer having an opening that selectively exposes at least a central portion of the upper surface of the connection pad and the ink layer on the upper surface, the conductor layer, and the ink layer, respectively. And

  In another method of manufacturing a wiring board according to the present invention, a conductor layer for a connection pad to which an electrode of the electronic component is connected and an ink layer for a positioning mark are formed on an upper surface of an insulating substrate on which the electronic component is mounted. An ink filling layer for depositing, a step of filling the ink composition in a recess provided in the ink filling layer to form the ink layer, a top surface of the insulating substrate, a conductor layer And a step of depositing a solder resist layer having an opening for selectively exposing at least a central portion of the upper surface of the connection pad and the ink layer on the ink layer.

  According to the present invention, since the positioning mark for recognizing the mounting position of the electronic component is made of the ink layer, the surface of the positioning mark can be oxidized and discolored like the positioning mark made of copper foil or copper plating film. Absent. Further, even if impurities such as sulfur (S) and phosphorus (P) adhere to the positioning mark surface, it is possible to reduce discoloration of the positioning mark surface.

  In addition, the ink layer for the positioning mark is formed by filling the ink composition into the upper surface of the insulating substrate exposed in the opening provided in the ink filling layer or in the recess provided in the ink filling layer. Thereby, the center part of the upper surface of the ink layer is flattened by the action of the surface tension of the filled ink composition. Then, the positioning mark is formed by selectively exposing at least the central portion of the upper surface of the flattened ink layer from the opening provided in the solder resist layer. Therefore, the positioning mark according to the present invention has a flat surface and can be accurately recognized by the image recognition apparatus. As a result, it is possible to connect the electrode of the electronic component and the connection pad with excellent positional accuracy via solder.

  Furthermore, the surface of the positioning mark is at a position lower than the upper surface of the solder resist layer. Therefore, when the electronic component is mounted, the positioning mark does not contact the electronic component, and contamination of the electronic component can be prevented.

  In particular, as in (3), when the ink filling layer is made of the same conductor layer as the conductor layer, the ink filling layer can be formed simultaneously with the formation of the conductor layer. Can be formed.

  Hereinafter, an embodiment of a wiring board and a manufacturing method thereof according to the present invention will be described in detail with reference to the drawings. FIG. 1 is a cross-sectional view showing a semiconductor element as an electronic component and a wiring board according to the present embodiment on which the semiconductor element is mounted. FIG. 2 is a plan view showing the wiring board shown in FIG. FIG. 3A is a partially enlarged sectional view showing the vicinity of the positioning mark according to the present embodiment, and FIG. 3B is a plan view thereof. 4A to 4C are partial enlarged process diagrams illustrating a method for manufacturing a wiring board according to the present embodiment.

  As shown in FIG. 1, the insulating substrate 1 included in the wiring board 20 of the present embodiment is formed by laminating a plurality of insulating layers 1b on the upper and lower surfaces of the plate-like core body 1a, and a plurality of layers from the upper surface to the lower surface. The wiring conductor 2 is formed. The core body 1a is formed, for example, by impregnating a glass fabric in which glass fibers are woven vertically and horizontally with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin. The insulating layer 1b is made of a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin. The wiring conductor 2 consists of conductor layers, such as copper foil and a copper plating film, for example.

  More specifically, the core body 1a has a thickness of about 0.3 to 1.5 mm and has a plurality of through holes 4 having a diameter of about 0.2 to 1.0 mm from the upper surface to the lower surface. . A part of the wiring conductor 2 is attached to the upper and lower surfaces and the inner surface of each through-hole 4, and the upper and lower wiring conductors 2 are electrically connected via the inside of the through-hole 4.

  Such a core 1a is manufactured by thermally curing a sheet in which a glass fabric is impregnated with an uncured thermosetting resin, and then drilling the sheet from the upper surface to the lower surface. The wiring conductors 2 on the upper and lower surfaces of the core body 1a have a copper foil having a thickness of about 5 to 50 μm attached to the entire upper and lower surfaces of the sheet for the core body 1a, and the copper foil is etched after the sheet is cured. Thus, a predetermined pattern is formed. In the wiring conductor 2 on the inner surface of the through hole 4, after the through hole 4 is provided in the core body 1 a, a copper plating film having a thickness of about 5 to 50 μm is deposited on the inner surface of the through hole 4 by an electroless plating method and an electrolytic plating method. Is formed.

  Further, the core body 1a is filled with a resin column 5 made of a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin in the through hole 4 thereof. The resin pillar 5 is for making it possible to form the insulating layer 1b directly above and below the through-hole 4 by closing the through-hole 4, and an uncured paste-like thermosetting resin is placed in the through-hole 4. After filling with a screen printing method and thermosetting it, the upper and lower surfaces thereof are polished to be substantially flat. And the insulating layer 1b is laminated | stacked on the upper and lower surfaces of the core 1a containing this resin pillar 5. As shown in FIG.

  The insulating layer 1b laminated on the upper and lower surfaces of the core body 1a has a thickness of about 20 to 50 μm, and has a plurality of via holes 6 having a diameter of about 30 to 100 μm from the upper surface to the lower surface of each layer. These insulating layers 1b are provided to provide an insulating interval for wiring the wiring conductors 2 at a high density. The insulating layer 1b is covered with a part of the wiring conductors 2 on the surface and in the via holes 6. It is worn. A high-density wiring can be formed three-dimensionally by electrically connecting the upper wiring conductor 2 and the lower wiring conductor 2 via the inside of the via hole 6.

  Such an insulating layer 1b is formed by sticking an uncured thermosetting resin film having a thickness of about 20 to 50 μm to the upper and lower surfaces of the core body 1a, thermosetting it, and drilling the via holes 6 by laser processing. Further, it is formed by sequentially stacking the next insulating layer 1b in the same manner. The wiring conductor 2 deposited on the surface of each insulating layer 1b and the via hole 6 has a thickness of about 5 to 50 μm on the surface of each insulating layer 1b and the via hole 6 every time each insulating layer 1b is formed. It is formed by depositing a copper plating film in a predetermined pattern by a pattern forming method such as a known semi-additive method or subtractive method.

  A solder resist layer 9 is deposited on the outermost insulating layer 1b. The solder resist layer 9 is made of an insulating material in which an inorganic powder filler such as silica or talc is dispersed in an acrylic modified epoxy resin, for example, in an amount of about 30 to 70% by mass, and improves the electrical insulation reliability between the wiring conductors 2 on the surface layer. The connection pads 2a and 2b and the positioning marks 11 described later serve to increase the bonding strength to the insulating substrate 1.

Such a solder resist layer 9 has a thickness of about 10 to 50 μm and is formed by a method as shown in the following (a) and (b).
(A) An uncured resin paste for the solder resist layer 9 having photosensitivity is applied on the outermost insulating layer 1b using a roll coater method or a screen printing method, dried, and then exposed and developed. The opening is formed by selectively exposing the connection pads 2a, 2b and the positioning mark 11, and then thermally cured.
(B) After an uncured resin film for the solder resist layer 9 is stuck on the uppermost insulating layer 1b, this is thermally cured, and then the positions corresponding to the connection pads 2a, 2b and the positioning marks 11 Are formed so as to have openings that selectively expose the connection pads 2a and 2b and the positioning marks 11 by partially removing the cured resin film.

  The wiring conductor 2 formed from the upper surface to the lower surface of the insulating substrate 1 functions as a conductive path for connecting each electrode of the semiconductor element 30 to the external electric circuit substrate, and the portion exposed on the upper surface of the insulating substrate 1 is A connection pad 2a for connecting an electronic component to which each electrode of the semiconductor element 30 is connected via solder is connected to an external electrical circuit board through which the portion exposed on the lower surface of the insulating substrate 1 is connected via solder. A connection pad 2b is formed.

  Solder 7 and 8 is welded to the connection pads 2a and 2b, thereby preventing discoloration and oxidation of the connection pads 2a and 2b, and via the solder between each electrode of the semiconductor element 30 and the connection pad 2a. Bonding and bonding between the connection pad 2b and the external electric circuit board via solder are facilitated. The solders 7 and 8 are not particularly limited, but are preferably made of lead-free solder such as a tin-silver alloy or a tin-silver-copper alloy from the viewpoint of the environment.

  In order to weld the solders 7 and 8 to the connection pads 2a and 2b, a solder paste containing solder powder and flux is printed and applied on the connection pads 2a and 2b by using a well-known screen printing method. A method of welding by melting the solder by heating at a temperature of 220 to 260 ° C. is adopted.

  Here, as shown in FIG. 2, the positioning marks 11 for recognizing the mounting position of the semiconductor element 30 are formed in a substantially cross shape at the corners of the wiring board 20 as viewed from above. The positioning mark 11 serves as a reference for aligning the electrode of the semiconductor element 30 and the connection pad 2a when the semiconductor element 30 is mounted.

  As shown in FIGS. 3A and 3B, the positioning mark 11 is selectively formed from the opening 10 provided in the solder resist layer 9 at the center of the upper surface of the ink layer 12 for the positioning mark, that is, in a top view. It is formed by exposing so as to have a substantially cross shape.

  Specifically, first, as shown in FIG. 4A, the ink filling layer 13 is deposited on the upper surface of the insulating substrate 1. As shown in FIG. 3B, the ink filling layer 13 has a substantially circular shape, and a substantially circular opening 14 is formed at the center thereof (ring shape).

  The ink filling layer 13 is made of the same conductor layer as the wiring conductor 2 (conductor layer). Thereby, the ink filling layer 13 can be formed simultaneously with the formation of the wiring conductor 2. That is, the ink filling layer 13 is formed by depositing a copper plating film having a thickness of about 5 to 50 μm on a predetermined pattern by a pattern forming method such as a known semi-additive method or a subtractive method, like the wiring conductor 2. It is formed.

  The upper surface of the insulating substrate 1 exposed in the opening 14 provided in the ink filling layer 13 is filled with an ink composition by a screen printing method or the like as shown in FIG. Curing is performed to form the ink layer 12. Thereby, the center part of the upper surface of the ink layer 12 formed by the action of the surface tension of the filled ink composition is flattened. Then, as shown in FIG. 4C, the center portion of the upper surface of the flattened ink layer 12 is selectively exposed from the opening 10 provided in the solder resist layer 9 to form the positioning mark 11. Therefore, the positioning mark 11 has a flat surface and can be accurately recognized by the image recognition device.

  The ink composition is not particularly limited as long as it has a large color contrast with respect to the solder resist layer 9 and has a color that can be accurately recognized by the image recognition apparatus. As such an ink composition, for example, a so-called silk ink used for printing a part number, characters, or the like on a wiring board can be used. Silk ink is also excellent in affinity with the insulating substrate 1, the ink filling layer 13, and the solder resist layer 9.

  Examples of the silk ink include those containing a thermosetting resin such as an epoxy resin or an acrylic resin, a pigment, an appropriate solvent, and the like. The pigment preferably has a large color contrast with respect to the solder resist layer 9, for example, titanium dioxide, zinc white, antimony white, zinc sulfide, barite powder, barium carbonate, clay, silica, white carbon, talc, alumina white. A white pigment such as, but not limited to, is preferred.

  The ink composition has a viscosity of 50 to 400 dPa · s, preferably 100 to 300 dPa · s. Thereby, the center part of the upper surface of the ink layer 12 is reliably flattened. The viscosity is a viscosity at 25 ° C. and is a value obtained by measurement with a rotary viscometer.

  The ink layer 12 may be formed in the opening 14 at a height lower than the upper surface of the ink filling layer 13, or may be formed at a height exceeding the upper surface of the ink filling layer 13. In particular, when the solder resist layer 9 is formed with good adhesion and the upper surface of the insulating substrate 1 is prevented from being exposed from the ink layer 12, the height (height) is substantially the same as the height of the ink filling layer 13. Is preferably within 2 μm).

  The opening 10 of the solder resist layer 9 is formed using the methods (a) and (b). At this time, the opening 10 is formed in a shape such that light is not irregularly reflected on the surface of the positioning mark 11. Examples of such a shape include a shape in which the inner diameter gradually increases from the lower surface to the upper surface of the solder resist layer 9.

  The surface of the positioning mark 11 is at a position lower than the upper surface of the solder resist layer 9. Specifically, as shown in FIG. 3A, the height h from the surface of the positioning mark 11 to the upper surface of the solder resist layer 9 is 2 to 45 μm, preferably about 5 to 25 μm. Thereby, when mounting the semiconductor element 30, the mark 11 does not contact the semiconductor element 30, and contamination to the semiconductor element 30 can be prevented.

  By recognizing such a positioning mark 11 with an image recognition device, aligning the electrode of the semiconductor element 30 and the connection pad 2a by an automatic machine based on the information, and then heating to a temperature of 220 to 260 ° C. The electrodes of the semiconductor element 30 and the connection pads 2 a are joined via the solder 7. At this time, as described above, since the surface of the positioning mark 11 is flattened and can be accurately recognized by the image recognition device, the electrode of the semiconductor element 30 and the connection pad 2a are connected via the solder 7. Connection can be made with excellent positional accuracy.

  Next, another wiring board according to the present invention will be described. FIG. 5 is a partially enlarged sectional view showing the vicinity of the positioning mark according to the present embodiment. In FIG. 5, the same components as those in FIGS. 1 to 4 described above are denoted by the same reference numerals and description thereof is omitted.

  As shown in the figure, the positioning mark 31 provided in the wiring board according to the present embodiment selectively exposes the central portion of the upper surface of the positioning mark ink layer 32 from the opening 10 provided in the solder resist layer 9. It is formed by.

  The ink filling layer 33 deposited on the upper surface of the insulating substrate 1 is substantially circular when viewed from above, and a substantially circular recess 34 is formed at the center thereof. The ink composition is filled in the concave portion 34 by a screen printing method or the like, and this is heated to cure the coating film, whereby the ink layer 32 is formed.

  Even if comprised in this way, the positioning mark 31 can have the same effect as the positioning mark 11 described above. In particular, in this embodiment, it is preferable that the ink composition does not contain a pigment. As a result, the ink layer 32 becomes transparent, and the bottom surface 35 of the recess 34 located below the transparent ink layer 32 exposed from the opening 10 of the solder resist layer 9 functions as a positioning mark. Since the bottom surface 35 is covered with the ink layer 32, oxidation and discoloration are prevented.

  The thickness of the ink layer 32 is preferably about 5 to 25 μm. The depth of the recess 34 is preferably about 5 to 25 μm. Other configurations are the same as those of the wiring board 20 according to the above-described embodiment.

  As mentioned above, although some embodiment concerning this invention was described, this invention is not limited to the above embodiment, A various improvement and change are possible within the range described in the claim. . For example, in the above-described embodiment, the positioning mark having a substantially cross shape in the top view has been described. However, the shape of the positioning mark according to the present invention is not limited to this, and for example, substantially L-shaped or T-shaped in the top view. Alternatively, it may be a polygon such as a substantially circular shape or a substantially square shape, and a desired shape can be adopted depending on the image recognition apparatus to be used.

  The ink filling layer 13 composed of the same conductor layer as the wiring conductor 2 (conductor layer) has been described. The ink filling layer has a composition different from that of the conductor layer (for example, a metal such as aluminum or stainless steel (SUS), an epoxy resin, or bismaleimide. A thermosetting resin such as a triazine resin).

  A difference may be given to each surface roughness of the positioning mark 11 and the solder resist layer 9 by subjecting the solder resist layer 9 after development and curing to surface processing by, for example, a wet blast method. Thereby, both contrast becomes large and the positioning mark 11 can be recognized more clearly by the image recognition apparatus.

  The arithmetic average roughness Ra of the surface of the solder resist layer 9 subjected to the surface processing is preferably about 0.1 to 1 μm. The arithmetic average roughness Ra on the surface of the positioning mark 11 is usually about 0.01 to 1 μm. The arithmetic average roughness Ra is set to a cut-off value: 0.25 mm, a reference length: 0.8 mm, and a scanning speed: 0.1 mm / second using a stylus type surface roughness measuring instrument according to JIS B0601'01. Measured value. Instead of the wet blasting method or the like, the positioning marks 11 and the solder resist layer 9 may have different hardnesses, and a difference may be imparted to the surface roughness of both.

  EXAMPLES Hereinafter, although an Example is given and this invention is demonstrated further in detail, this invention is not limited to a following example.

<Production of positioning marks>
Based on the method shown in FIGS. 4A to 4C, positioning marks as shown in FIGS. 3A and 3B were produced. First, an ink filling layer was formed by depositing a copper plating film having a thickness of 15 μm on the upper surface of the insulating substrate in a ring-shaped pattern by a semi-additive method.

  Next, the ink composition is filled on the upper surface of the insulating substrate exposed in the 0.5 mm inner diameter opening provided in the ink filling layer by screen printing, and this is heated to cure the coating film. An ink layer of 10 to 13 μm was formed.

  As the ink composition, a white silk ink containing an epoxy resin and titanium dioxide was used. The viscosity of this silk ink was 100 to 300 dPa · s. The viscosity is a viscosity at 25 ° C. and is a value obtained by measurement with a rotary viscometer.

  As a result of visual observation of the central portion of the upper surface of the formed ink layer, it was flattened. Subsequently, a solder resist layer having an opening that exposes the central portion of the upper surface of the ink layer so as to be substantially circular when viewed from above is deposited on the upper surface of the insulating substrate and the ink layer, thereby producing a positioning mark. .

  At this time, the opening of the solder resist layer was formed as follows. That is, the uncured resin paste for the solder resist layer having photosensitivity is applied on the upper surface of the insulating substrate and the ink layer by using a screen printing method, dried, and then exposed and developed. Thus, an opening for selectively exposing the positioning mark was formed. The opening had a shape in which the inner diameter gradually increased from the lower surface to the upper surface of the solder resist layer, and the maximum inner diameter was 0.8 mm.

  The uncured resin paste for the solder resist layer was obtained by dispersing an inorganic powder filler (silica) in an acrylic-modified epoxy resin. The height from the surface of the produced positioning mark to the upper surface of the solder resist layer was 21 μm.

<Evaluation>
It was evaluated whether or not the produced positioning mark was recognized by the image recognition apparatus. Specifically, binarized image comparison at threshold values (Threshold values) 30 and 40 was performed using an image recognition apparatus. The measurement result of the threshold 30 is shown in FIG. 6A, and the measurement result of the threshold 40 is shown in FIG. 6B.

  The image recognition device used was an AOI (Automated Optical Inspection System) device. The threshold value means a numerical value at which an image begins to appear at the boundary between the positioning mark and the solder resist layer. This threshold value varies depending on the image recognition device to be used.

  As is clear from FIGS. 6A and 6B, the positioning mark according to the present invention has a clear image of the positioning mark itself at the threshold values 30 and 40, and the boundary with the solder resist layer. The department is also clear. Therefore, it can be seen that this positioning mark is accurately recognized by the image recognition device under the condition that the difference in threshold is 10.

[Comparative example]
A copper plating film having a thickness of 15 μm was deposited on the upper surface of the insulating substrate in a circular pattern by a semi-additive method to form a positioning mark conductor layer. Next, in the same manner as in the previous example, a solder resist layer having an opening that exposes the central portion of the top surface of the conductor layer so as to be substantially circular when viewed from above is deposited on the top surface and the conductor layer of the insulating substrate. A positioning mark made of a copper plating film was formed.

  Whether or not the produced positioning mark was recognized by the image recognition apparatus was evaluated in the same manner as in the above example. The measurement result of the threshold value 30 is shown in FIG. 7A, and the measurement result of the threshold value 40 is shown in FIG. 7B.

  As is clear from FIGS. 7A and 7B, the positioning mark made of the copper plating film has spots on the positioning mark itself at the threshold values 30 and 40, and the boundary portion with the solder resist layer. Was also unclear. This spot was remarkable at the threshold 40. Further, as a result of the measurement with the threshold value set to less than 30, the spots around the positioning mark became noticeable as in FIG. 7B, and a clear image could not be obtained.

It is sectional drawing which shows the semiconductor substrate as an electronic component, and the wiring board concerning one Embodiment of this invention which mounts this semiconductor device. It is a top view which shows the wiring board shown in FIG. (A) is a partial expanded sectional view which shows the positioning mark vicinity concerning one Embodiment of this invention, (b) is the top view. (A)-(c) is a partial expansion process figure which shows the manufacturing method of the wiring board concerning one Embodiment of this invention. It is a partial expanded sectional view which shows the positioning mark vicinity concerning other embodiment of this invention. (A), (b) is a figure which shows the result of the binarized image comparison of an Example. (A), (b) is a figure which shows the result of the binarized image comparison of a comparative example.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Insulation board | substrate 1a Core 1b Insulation layer 2 Wiring conductor 2a, 2b Connection pad 4 Through hole 5 Resin pillar 6 Via hole 7, 8 Solder 9 Solder resist layer 10, 14 Opening 11, 31 Positioning mark 12, 32 Ink layer 13 33 Ink filling layer 20 Wiring board 30 Semiconductor element 34 Recess

Claims (6)

A conductor layer for a connection pad to which an electrode of the electronic component is connected to an upper surface of an insulating substrate on which the electronic component is mounted;
An ink layer for a positioning mark for recognizing the mounting position of the electronic component;
A wiring board comprising a solder resist layer that selectively exposes the connection pads and the positioning marks,
The ink layer is formed by filling an ink composition on an upper surface of the insulating substrate exposed in an opening provided in an ink filling layer deposited on the upper surface of the insulating substrate;
The wiring board, wherein the positioning mark is formed by selectively exposing at least a central portion of the upper surface of the ink layer from an opening provided in the solder resist layer. A conductor layer for a connection pad to which an electrode of the electronic component is connected to an upper surface of an insulating substrate on which the electronic component is mounted;
An ink layer for a positioning mark for recognizing the mounting position of the electronic component;
A wiring board comprising a solder resist layer that selectively exposes the connection pads and the positioning marks,
The ink layer is formed by filling an ink composition into a recess provided in an ink filling layer deposited on the upper surface of the insulating substrate;
The wiring board, wherein the positioning mark is formed by selectively exposing at least a central portion of the upper surface of the ink layer from an opening provided in the solder resist layer.   The wiring board according to claim 1, wherein the ink filling layer is made of the same conductor layer as the conductor layer.   The wiring board according to claim 1, wherein the ink composition does not contain a pigment. A process of depositing and forming a conductor layer for a connection pad to which an electrode of the electronic component is connected and an ink filling layer for forming an ink layer for a positioning mark on an upper surface of an insulating substrate on which the electronic component is mounted When,
Filling the ink composition onto the upper surface of the insulating substrate exposed in the opening provided in the ink filling layer to form the ink layer;
Depositing and forming a solder resist layer having an opening for selectively exposing at least a central portion of the upper surface of the connection pad and the ink layer on the upper surface of the insulating substrate, the conductor layer, and the ink layer, respectively. A method of manufacturing a wiring board, comprising: A process of depositing and forming a conductor layer for a connection pad to which an electrode of the electronic component is connected and an ink filling layer for forming an ink layer for a positioning mark on an upper surface of an insulating substrate on which the electronic component is mounted When,
A step of filling the ink composition in a recess provided in the ink filling layer to form the ink layer;
Depositing and forming a solder resist layer having an opening for selectively exposing at least a central portion of the upper surface of the connection pad and the ink layer on the upper surface of the insulating substrate, the conductor layer, and the ink layer, respectively. A method of manufacturing a wiring board, comprising: