JP2009016455A - Substrate position detecting device and substrate position detecting method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a substrate position detecting device and a substrate position detecting method by which a substrate position is obtained efficiently and precisely. <P>SOLUTION: A substrate (chip 103) subjected to dicing and expanding processes is fixed on a wafer sheet 104 having a certain degree of translucency. An underside emission light 105 emits the light of a given quantity from the side of the wafer sheet 104 where the chip 103 is not fixed. A camera 101 and a lens 102 photograph a transmission image of the wafer sheet 104 including a shade/shadow of the chip 103 and a street 106 to obtain image data. This image data are subjected to image processing to detect the position of the substrate. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a substrate position detection apparatus and a substrate position detection method, and more particularly to a substrate position detection apparatus and a substrate position detection method for a substrate fixed on a wafer sheet.

  Among the semiconductor manufacturing processes, for example, in an inspection process, a semiconductor chip (hereinafter also simply referred to as “chip”) is inspected on a wafer before dicing, and a non-defective product / defective product is determined. Further, in a device such as a die bonder, a chip sorter, and a mounter after inspection (hereinafter referred to as “takeout device”), chips determined as non-defective products in the inspection process are picked up from the wafer after dicing.

  Conventionally, in the wafer inspection process, the position of a substrate (wafer or chip) is detected to determine whether the chip is good or defective, and a defective mark is attached to a chip determined to be defective. It was sent to the next process. In the next process, a chip with a defect mark is identified and only good products are picked up. Such position detection and discrimination are performed based on an image of a substrate imaged by disposing a camera and illumination above the wafer, for example, as shown in Patent Document 1.

  However, in recent years, so-called no-marking systems that do not perform mark spotting are becoming mainstream in order to increase productivity by reducing the mark spotting process. In this no-marking system, the inspection results for the non-defective product and the defective product determined in the inspection process, the chip coordinates in the wafer coordinate system, and the like are transferred to the next process as electronic data. The take-out device corresponding to the no-marking system acquires information such as the position of the chip from the received electronic data, and mounts the chip on the substrate based on the information.

  As described above, the wafer is inspected in the state before dicing. The inspected wafer is attached to the wafer sheet, and the chip is divided into individual pieces by dicing and then expanded (expanded). It is set in the take-out device. For this reason, the position coordinates of the chip stored together with the determination result of good / bad in the wafer inspection process must be corrected by the influence of dicing and expanding. In this correction, an accurate grasp of the center position of the wafer is an important factor.

  In the conventional no-marking system, the wafer has a mirror chip or a recognition pattern called a reference chip for distinguishing from an effective chip. Further, in an apparatus compatible with the no-marking system, the reference chip or the like is exposed, and the position of the wafer is calculated by recognizing the position by image processing or operator's alignment. However, for the purpose of increasing the number of effective chips in a wafer, a normal chip has been used as a reference for position calculation without providing a special reference chip. On the other hand, the chip size is getting smaller year by year. For these reasons, there is a problem that the smaller the chip size, the more difficult it is to distinguish between adjacent chips. For this reason, it has been difficult to deal with a chip of about 3 mm × 3 mm or less with a take-out apparatus compatible with the conventional no-marking system.

  The biggest cause of this chip misalignment is the expand. Therefore, it is necessary to measure the ratio (expansion rate) at which the wafer radius is increased by this expansion, and to correct the chip position from the expansion rate. In order to perform such correction, a method for obtaining the expansion rate by recognizing at least three points on the outermost contour of the wafer can be considered.

Japanese Patent Laid-Open No. 3-142947

  However, in practice, there is a problem that it is difficult to accurately detect the position of the substrate for the following reason. For example, when trying to recognize the outer shape of the wafer by coaxial epi-illumination, a random and complicated curved pattern may appear near the outer periphery of the wafer due to halfway exposure. Further, as a device for improving the sharpness of the resist solution in the wafer film forming process, there is a case where the edge of the wafer end portion is not a right angle but a shape having a straight or curved slope. As a result, a curved pattern may appear in the inclined portion of the wafer outermost shape. In the state where this curved pattern appears, it is difficult to identify the wafer outermost shape by image processing or the like. In addition, when the edge portion has an inclination, it is not possible to obtain specularly reflected light by coaxial incident light, and even if the illumination level is increased, a sufficient brightness / darkness ratio between the wafer and the surrounding wafer sheet cannot be obtained. It is difficult to identify the outermost shape of the wafer. Furthermore, even when oblique illumination is used, the angle of the edge of the wafer outer periphery varies depending on the product and is not constant. For this reason, not only does it lead to an increase in the size of the apparatus, such as the use of dome-shaped illumination, but also there is a problem that illumination conditions for each product must be set in a complicated manner. Note that the above-mentioned problem regarding the recognition of the outermost contour of the wafer is not only after dicing and expanding, but also for the wafer before dicing.

  As for the chip after dicing, the approximate chip position is acquired from the data received from the inspection process at the time of picking up, and the final pick-up position is recognized by normal pattern matching. However, this is also affected by complicated circuit patterns on the chip surface, presence / absence of check transistors, and variations in polyimide film thickness on the chip surface. There is a problem that there are cases.

  The present invention has been made in view of such problems, and an object of the present invention is to provide a substrate position detection apparatus and a substrate position detection method that can efficiently and accurately acquire a substrate position.

  An apparatus for detecting a position of a substrate according to the present invention includes: an illuminating unit that irradiates light to a light-transmitting sheet on which a substrate is fixed; And image processing means for detecting the position of the substrate by performing image processing on the image picked up by the image pickup means. Note that in this specification, the “position of the substrate” refers to the one including the center, outline (radius, side length, etc.) or inclination of the substrate.

  In this case, the image processing unit may include a contour correcting unit that corrects a distortion or cut portion of the contour of the substrate on the image.

  The image processing means may include a determination means for determining an image having an orientation flat from four or more images captured at positions separated from each other in the outer peripheral portion of the substrate. In this case, the discriminating means determines the outermost position of the substrate for each of the three images for each of four combinations selected from four images captured at positions separated from each other in the outer peripheral portion. One coordinate is detected and the radius of a temporary arc passing through the outermost substrate position coordinates of these three points is calculated, and the three images constituting the combination having the second largest radius among the four patterns are excluded. Only one image may be determined as an image having the orientation flat. Note that “positions separated from each other” refers to positions in an imaging range that are separated to such an extent that an orientation flat does not appear in a plurality of images, for example, when four locations are imaged at a 90 ° pitch.

  Furthermore, the image processing may be performed using a street formed on the substrate by dicing.

  Furthermore, a position for correcting an arbitrary position coordinate on the substrate before dicing based on the substrate position before dicing acquired in advance and the substrate position after dicing detected by the image processing means. It can comprise so that it may have a coordinate correction means.

  Furthermore, it can comprise so that it may have epi-illumination means to irradiate light toward the said sheet | seat to which the said board | substrate was fixed.

  The substrate position detection method according to the present invention includes a step of irradiating light toward a sheet on which a transparent substrate is fixed, and a step of imaging the substrate and the sheet from a direction opposite to the light irradiation direction. And a step of performing image processing on the captured image to detect the position of the substrate.

  In this case, in the image processing, distortion of the outline of the substrate on the image or a cut portion may be corrected.

  In the image processing, an image having an orientation flat may be determined from four or more images captured at positions separated from each other on the outer peripheral portion of the substrate. In this case, in discriminating the image having the orientation flat, each of the three images is selected for each of the four combinations selected from the four images captured at positions separated from each other in the outer peripheral portion. 1 each of the outermost substrate position coordinates is detected and the radius of a temporary arc passing through the outermost substrate position coordinates of these three points is calculated, and a combination having the second largest radius among the four patterns is configured. One image excluding three images may be determined as an image having the orientation flat.

  Furthermore, the image processing may be performed using a street formed on the substrate by dicing.

  Furthermore, a step of correcting an arbitrary position coordinate on the substrate before dicing based on the substrate position before dicing acquired in advance and the substrate position after dicing detected by the image processing means. You may have.

  ADVANTAGE OF THE INVENTION According to this invention, the board | substrate position detection apparatus and board | substrate position detection method which can acquire a board | substrate position efficiently and accurately are obtained.

  In the present invention, light is irradiated from one side of a sheet having translucency and a substrate is fixed, and imaging is performed from the other side. Thereby, the board | substrate part becomes a shadow image and the sheet | seat part becomes a bright image which permeate | transmitted a certain amount of light among the acquired images. That is, the substrate and the sheet are acquired as a high contrast image. For this reason, as in the case of coaxial incident or oblique incident, for example, a curved pattern appearing on the surface of the edge of the substrate (wafer) does not impede recognition of the wafer outermost shape, and accurately defines the substrate outline. Can be recognized.

  In addition, since a high-contrast image between the substrate and the sheet is acquired as described above, the position detection of the substrate can be efficiently obtained as simple image processing by various image processing methods. The present invention is particularly suitable for, for example, a substrate position detection apparatus corresponding to a no-marking system in which marking on a chip surface on a substrate is not marked by an inspection result.

  Hereinafter, embodiments of the present invention will be specifically described with reference to the accompanying drawings. FIG. 1 is a diagram illustrating a configuration of a substrate position detection apparatus according to the present embodiment. 1 is provided in a take-out device such as a die bonder, a chip sorter, or a mounter (not shown).

  As shown in FIG. 1, a chip 103 is mounted on a wafer sheet 104. In FIG. 1, a wafer fixed on a wafer sheet 104 is divided into individual chips 103 with a street 106 sandwiched by dicing, and is shown in an expanded state. The wafer sheet 104 has a certain degree of translucency. An illumination 105 is installed below the wafer sheet 104, and a camera 101 and a lens 102 are installed above the chip 103. The illumination 105 irradiates a sufficient range with respect to the camera field of view determined by the camera 101 and the lens 102 with a predetermined amount of light, irradiates light from below the wafer sheet 104, and the wafer sheet 104 on which the chip 103 is mounted. The transmission image is taken. The camera 101 is connected to an image processing apparatus (not shown).

  Actually, the take-out device may have a mechanism (for example, a push-up unit) for peeling the chip 103 from the wafer sheet 104 below the wafer sheet 104. In this case, for example, the illumination 105 may be disposed below the protrusion unit, and the wafer sheet 104 may be irradiated with light through the top plate of the protrusion unit made of a translucent member. It is also possible to arrange the illumination 105 in the vicinity of the protrusion unit and shift the position of the illumination 105 to a position suitable for irradiation during imaging.

  Next, the operation of this embodiment will be described. In this embodiment, in order to efficiently and accurately acquire the position of the chip 103 to be picked up by the take-out device, the chip position is acquired in two steps.

  The first step is to specify the wafer position and calculate the wafer center, the wafer θ, and the expansion rate, and corrects the recognition position of the movement destination at the time of chip position recognition at the time of chip pickup. In the inspection process, which is the previous process, the chips formed on the wafer are inspected to determine whether the product is non-defective or defective, and the chip standard is determined. In order to accurately probe on the pads (electrodes) of the chip, Has positional relationship information. The pick-up device compatible with the no-marking system receives non-defective / defective products in the inspection process, receives the chip position with respect to the wafer, grasps the approximate position of the next chip to be taken, and is used for chip positioning to identify the pickup position To do. However, since the wafer is diced and expanded in the take-out device as described above, the chip position with respect to the wafer received from the inspection process is accompanied by a positional deviation mainly due to dicing and expansion, and the outer periphery of the wafer. The closer the part is, the larger the deviation, so in the case of a small chip, the accumulated amount of deviation is larger than the chip size, and there is a possibility that the chip may be mistaken, so especially in the case of a small chip, the chip obtained from the inspection process It is necessary to correct the position. Hereinafter, the chip position correction method will be described in order.

  First, in order to obtain the center, θ, and expansion rate of the wafer, the wafer outer shape is detected. As described above, the wafer is fixed to the wafer sheet 104 and then diced and expanded. In order to correct the chip position so as to be in the expanded state, the wafer center, wafer radius (or wafer diameter) and wafer θ (the inclination of the chip array or the inclination of the orientation flat) are set with respect to the expanded wafer. Need to ask. The center of the wafer and the expansion ratio can be obtained geometrically as a circle passing through the three points by recognizing arbitrary three points on the outermost contour of the wafer. While the wafer is set in the take-out apparatus, the vicinity of the wafer outer periphery can be imaged with a preset wafer size. As an example, an explanation will be given with reference to FIGS.

  FIG. 2 is a diagram showing the imaging position relationship of the wafer. The squares shown in the 0-degree imaging unit 201, the 90-degree imaging unit 202, the 180-degree imaging unit 203, and the 270-degree imaging unit 204 are the camera field of view. Represents. FIG. 3 is a diagram schematically illustrating an image obtained by imaging the chip 103 and the wafer sheet 104 from above by the imaging unit 203 at 180 degrees in FIG. 2 in a state where light is irradiated from below the wafer sheet 104 by the illumination 105. is there. When an appropriate amount of light is irradiated by the illumination 105 at an arbitrary wafer outer shape detection position, an image of the shadow of the wafer and chips as shown in FIG. 3 is obtained. What is necessary is just to obtain | require the wafer outermost shape detection point 305 which is the arbitrary points of the wafer outermost shape 301 from the image obtained in this way. The detection method of the wafer outermost shape detection point 305 is, for example, after performing noise removal by general expansion processing, contraction processing, filter processing, etc. as image processing so that black spots do not remain on the street 303 and the wafer sheet 304. A black point search is performed in the vertical direction sequentially from the left side to the right side in FIG. 3 and the black point first found is used as the wafer outermost shape detection point 305, or a method based on a predetermined threshold value without being binarized in the above process. There is a method in which edge processing is performed to detect a set of points on the outermost wafer 301, and an approximate curve is obtained to calculate the minimum point of X. Further, since the wafer outermost contour detection point 305 is an arbitrary point on the wafer outermost contour 301, it may be calculated by substituting a predetermined numerical value for the Y coordinate of the approximate curve. The wafer outer shape detection point 305 may use any of the methods described above, and may be determined according to the processing time required for the extraction device.

  In this embodiment, utilizing the fact that the wafer sheet uses a material having a certain degree of translucency and illuminating from the opposite side to the imaging direction, the boundary between the sheet portion and the wafer portion is high-contrast. Can be imaged. More specifically, the wafer 302 including the chip 302, the deformed chip on the outer periphery of the wafer, and the non-molded chip on which no pattern is printed is black, the street 303 and the wafer sheet 304 are white, and an image with a clear contrast is obtained. be able to. In this way, by imaging the chip 302 as a shade, the wafer outermost shape 301 is recognized without depending on the edge shape of the wafer, the complicated curved pattern near the wafer outermost shape 301, the film thickness of the polyimide of the wafer material, and the like. Can be made easier.

  Here, a linear portion (orientation flat 206 shown in FIG. 2) called an orientation flat (orientation flat) exists on the outer peripheral portion of the wafer. As described above, the expanded wafer center can be obtained by acquiring three or more positions of the arbitrary wafer outermost shape 301 and calculating the center of a circle passing through the three or more points. Therefore, when acquiring the wafer outermost shape 301, it is necessary to prevent the orientation flat portion from being recognized as the wafer outermost shape 301. If the wafer is outside the camera field of view at the 270 ° photographing unit 204 shown in FIG. Since the outermost contour detection point 305 cannot be detected, it may be identified as having an orientation flat. However, when the camera field of view is about 10 mm, the orientation flat enters the field of view. In this case, the orientation flat position must be recognized in advance as a parameter, or the orientation flat position must be determined by a method described later.

  As the wafer outermost shape 301, three points obtained by one image can be used. However, if the three points are close, the error is large and the accuracy is improved by calculating using the points where the three points are separated from each other. Therefore, it is better to detect the points 120 degrees apart, but instead of the orientation flat, There may be a concave depression called, which must be removed. When image processing is used, the removal of the notch portion is possible by expansion processing and contraction processing, but the arc is distorted and an error is generated. Although a method of removing the notch portion from the deviation of the approximate curve of the wafer outer shape is also conceivable, it is difficult to completely remove the notch portion. Therefore, three points that are relatively far apart from the orientation flat are used by the method shown in FIG. First, as shown in FIG. 2, from a preset wafer size, the outer peripheral point 4 corresponding to the 0 degree photographing unit 201, the 90 degree photographing unit 202, the 180 degree photographing unit 203, and the 270 degree photographing unit 204. A point is calculated and imaged. At this time, depending on the accuracy when the wafer is attached to the wafer sheet and the expansion ratio, the wafer outer shape may protrude from the camera field of view. If the expansion ratio is fixed, the expansion ratio given as a fixed parameter of the device can be calculated by multiplying it by the wafer size. There is no need to consider it. Next, an image including the orientation flat is discriminated from the four images obtained by the above-described method, and the wafer outermost shape 301 is obtained from each of the three images other than the orientation flat. get. The orientation flat can be determined by calculating an approximate curve using the wafer outermost shape 301 as a set of points by image edge processing or the like and examining the linearity thereof.

  Note that, in the image subjected to the edge processing, the wafer outermost shape 301 is divided by the street 303. Here, even when the chip size is small, it has a size of about 1 mm × 1 mm. On the other hand, the street width is often about 50 μm, which is very small compared to the chip, so the street 303 may be ignored. Further, if the street 303 has a width of about a dozen or less pixels, an image without streets can be obtained by performing general expansion processing and contraction processing as image processing.

  Further, when imaging is performed using a high-magnification camera, when the wafer size is large, it may be difficult to determine whether the approximate curve of the outermost wafer contour is a straight line or an arc. In some cases, it takes time to calculate the linearity. In these cases, under the condition that the imaging range is sufficiently shorter than the length of the orientation flat, the respective wafer centers and radii are calculated for the four combinations using three of the four images. . Since it can be geometrically proved that the combination having the longest calculated radius is a combination including the orientation flat and its both sides, the orientation flat can be discriminated using this. Specifically, in the case of the example in FIG. 2, since there is an orientation flat in the 270-degree imaging unit 204, there are four wafer radii calculated from the combination of the 0-degree imaging unit 201 and the 180-degree imaging unit 203 on both sides. The longest of the combinations. In addition, two combinations including orientation flats other than the above (the combination of the 0-degree photographing unit 201, the 90-degree photographing unit 202, the 270-degree photographing unit 204, the 90-degree photographing unit 202, the 180-degree photographing unit 203, In the case of the combination of the photographing unit 204 at 270 degrees, it can be geometrically verified that the radius is calculated to be short. From this, the combination with the second largest radius calculated (the combination of the 0 degree photographing unit 201, the 90 degree photographing unit 202, and the 180 degree photographing unit 203) is a combination of three points excluding the orientation flat 270. It can be determined that the orientation photographing unit 204 has an orientation flat.

  Further, in order to obtain the wafer center and the like, in addition to detecting the three outermost wafer outlines described above, for example, image processing can recognize the wafer outer outline as an arc and obtain the wafer center. In any case, a high-contrast image can be acquired by imaging the chip 302 as a shade by the transmitted light of the wafer sheet 304. However, the case where light irradiated from below the wafer is irregularly reflected due to the material and surface state of the wafer sheet 304 may be considered. For example, since the wafer sheet 304 uses an adhesive material for fixing the wafer, the thickness is not uniform, and light may be irregularly reflected due to surface irregularities. In addition, the amount of received light may change depending on the product type and the material and color of the wafer sheet 304. From these things, the wafer outermost shape 301 on the image larger (or smaller) than the actual wafer outermost shape 301 may be recognized. In this case, it may be ignored if it does not affect the target wafer position detection accuracy and mounting accuracy, and the wafer outer periphery ignoring the street portion may be corrected as a set of points by the following method. .

  Regarding this correction, several correction methods are conceivable depending on the way of irregular reflection or change in the amount of received light. For example, (1) a method of interpolation by calculating an approximate curve, (2) a method of smoothing by moving average, and (3) a set of straight lines connecting the statistical values of several adjacent statistical values. Or a method of interpolating statistical values as approximate curves. Here, the statistical value may be approximate curve interpolation including a straight line with a small set of several adjacent points such as a trend line, or may simply be an average value, a peak point, or a bottom point. This is because the optimum correction method varies depending on the mechanism of irregular reflection depending on the sheet material and the surface state. For example, when the actual wafer outer shape tends to be smaller than the wafer outer shape before correction due to irregular reflection, the statistical value of (3) is the peak, and conversely, the statistical value of (3) is the bottom. An approximate curve may be calculated as follows. In addition, when the above magnitude tendency appears at random, the average values of (1), (2) and (3) can be used, and the most effective method may be selected.

  The wafer center and the wafer radius calculated in this way are the wafer center coordinates and the wafer radius after expansion, and the expansion ratio can be calculated by obtaining the ratio of the wafer radius for the wafers before and after dicing / expanding.

  Next, the wafer θ representing the inclination of the chip arrangement is calculated. Here, focusing on the chip portion, when the chip size is large, it is possible to correct the wafer θ by obtaining the side of the chip or the running (tilt) of the street by image processing. When the chip size is small, since multiple chips are arranged in the field of view taken, the chip center coordinates in the field of view may be calculated by image processing, and the wafer θ may be calculated from the arrangement. The wafer θ may be calculated from the street running. Here, in order to obtain the running (tilt) of the street, when the street uses an optical system with one pixel, the point set of the street part is obtained by edge processing, and the slope is obtained by linear approximation. When an optical system with a plurality of pixels in the street width is used, two point sets are obtained for one street by edge processing, but linear approximation using either one of these two or an average value is performed. The linear approximation is performed by determining the average value, the center value, the minimum value, and the maximum value in the Y direction (or X direction) for the point set extracted as a wide line by the binarization process. Find the slope. In order to obtain the chip center coordinates when the chip size is smaller, the chip is shaded, so the chip center coordinates are obtained by positioning by pattern matching or labeling after binarization to find the center of gravity. The wafer θ can be calculated by a method of obtaining an inclination by linear approximation from the center coordinates of a plurality of chips, or a method of obtaining an inclination of a straight line connecting chip center coordinates at both ends in the Y direction or the X direction.

  Next, based on the calculated expansion ratio, wafer center, and wafer θ, correction is performed from the chip coordinates at the time of wafer inspection before dicing to the chip coordinates after expansion. In this embodiment, by calculating the wafer θ using the street from the acquired image and correcting the chip position information obtained from the inspection process, the chip position can be calculated with high accuracy. It is possible to apply a no-marking system to the chip.

  Next, the second step will be described. In the second step, based on the chip position corrected in the first step, an image of an area including a target chip (hereinafter referred to as “target chip”) to be picked up by the take-out device is captured. Although the chip positioning accuracy can be improved by correcting the chip position in the first step, the expanded state of the picked-up portion changes and the position shifts at the time of pick-up. Since positioning is required, position recognition for the target chip is performed in the second step. In the second step, first, based on the chip coordinates corrected in the first step for the target chip, light is applied to the wafer sheet 104 so that the illumination 105 shown in FIG. Irradiate. FIG. 4 is a diagram schematically showing an image of a region including the target chip imaged in the embodiment of the present invention. As shown in FIG. 4, the chip 401 including the target chip 404 can be clearly recognized as an image as a shadow surrounded by the street 402 without being affected by the circuit pattern of the chip. In addition, the area | region enclosed with the broken line in a figure shows the trace where the chip | tip 401 was already picked up.

  Next, coordinates such as the center of the target chip 404 are obtained from the image of the area including the target chip 404 by image processing. As for the image processing method, since it is a simple shaded image, the template becomes simple even in the case of the same pattern matching as the conventional method, and therefore, high-speed processing is possible as compared with the conventional method. Further, various methods for shortening the processing time can be used. As an example, the edges of the chip are extracted, and the sides of the chip are recognized by least square approximation or the like to identify a rectangle. In this case, the intersection of the diagonals of the vertices of the rectangle is the center, and the inclination of the rectangle (side inclination) can be set as the chip θ. As another example, a method of simply obtaining the center of gravity by a labeling process can be used. In the present invention, an image processing method that satisfies a desired mounting accuracy and processing time can be selected regardless of the image processing method.

  Also in the second step, the following effects can be obtained by capturing a transmission image of the wafer sheet 403 on which the chip 401 is fixed. As shown in FIG. 4, the chip 401 and the target chip 404 become shadow images without depending on the circuit pattern of the chip and the polyimide film, and the street 402 (and the wafer sheet 403) receives the light irradiated from the illumination 105. A bright image is obtained by transmitting to some extent. For this reason, the brightness difference between the chip 401 and the target chip 404 and the street 402 can be captured greatly, and the center position of the target chip 404 can be accurately identified by image processing. In addition, since the brightness difference between images is large, simple image processing can be applied. For this reason, image processing can be performed at a higher speed than the conventional method in which the position of the chip is recognized by pattern matching or the like.

  Here, the positions of the remaining chips 401 picked up from a certain target chip 404 will be described. Since the wafer size has high dimensional accuracy, it is possible to calculate the chip coordinates at the time of wafer inspection with high accuracy by performing correction based on the expansion rate obtained in the first step. However, at the time of expansion, the portion where the chip is attached is not expanded, and only the street portion is expanded. As a result, when a target chip is picked up in the second step, the portion of the wafer sheet to which the target chip 404 has been attached is expanded, and as a result, the position of the remaining chip is shifted.

  The amount of deviation differs depending on the expansion rate and the chip size. When the chip is picked up, the amount of deviation occurs, and when moving to the position recognition position of the next chip to be picked up, the first amount is based on the chip position information from the inspection process. When calculating the position of the movement destination using the expansion rate obtained in the step, the wafer center, and θ, there is a possibility of deviating from the target chip. The expanding amount is usually 10 mm or less, and recently, a method of 1 mm or less and hardly expanding is adopted. When the expanding amount is smaller than the chip size, the shift amount can be ignored. Conversely, when considering the case where the expansion amount is larger than the chip size, the wafer sheet is larger than the wafer, and since the expansion is performed outside the wafer, there is an expanded portion other than the street. Actually, this is not a simple comparison between the amount of expansion and the chip size, but if the amount of deviation accumulated for each pickup is larger than the chip size, the chip next to the target chip may be mistaken for the target chip. Need to be considered. Therefore, there are two methods for solving this shift amount, which will be described below. The first method is to obtain the expansion rate and wafer center position again in the first step in order to return the accumulated misalignment amount to 0. The chip position information from the inspection process is corrected using the correction in the first step before picking up. When the chip position recognition position is calculated and the chip position recognition is imaged, the deviation of the chip center can be calculated from the camera center based on the accumulated deviation amount for each pickup. As described above, there is a method in which the procedure of the first step is performed after the accumulated deviation amount is accumulated to some extent. However, a wafer that has just been expanded is recognized in a state close to a perfect circle by the first step, but a chip area is expanded every time a chip is picked up, so that the expansion rate is distorted. However, the distortion rate is small, and it can be corrected sufficiently by performing the correction in the first step and considering it as a circle, and it is also possible to reduce the distortion rate by picking up concentric circles. However, the first step must be performed on the way, and the tact required for the apparatus may not be satisfied. Therefore, as a second method, there is a correction method using a pickup pitch. This method includes a method for correcting the expansion rate and a method by pitch movement. For example, when a wafer is picked up laterally from the back (position of 90 degrees) and moved to the front (position of 270 degrees) and picked up every time one line ends, the method of correcting the expansion rate is as follows. Is recorded, and the pickup pitch for one chip in the X direction of the first chip and the second chip is calculated and used as a reference pitch for one chip of the nth chip and the n + 1 chip for picking up by lateral movement. If the current pitch / reference pitch corresponds to the horizontal distortion rate, the expansion rate is multiplied by the current pitch / reference pitch when calculating the chip position recognition position of the (n + 2) th chip. Is corrected as the expansion rate. Next, as a method by pitch movement, in the calculation of the chip position recognition position of the (n + 2) th chip, it moves by the current pitch * the number of moving chips (because the next chip is not necessarily the next chip when picking up a good chip). Thus, the target chip can be recognized. According to the present embodiment, according to this embodiment, it is possible to deal with a no-marking system in a chip of several hundred μm or more.

  As described above, in this embodiment, light is irradiated from the side of the wafer sheet where the substrate (wafer or chip) is not fixed, and imaging is performed from the side where the substrate is fixed. As a result, the substrate portion of the acquired image is shaded, and the wafer sheet portion is a bright image that transmits a certain amount of light. That is, the substrate and the wafer sheet are acquired as a high contrast image. For this reason, as in the case of coaxial incident or oblique incident, for example, a curved pattern appearing on the surface of the edge of the substrate (wafer) does not impede recognition of the wafer outermost shape, and accurately defines the substrate outline. Can be recognized.

  Further, since a high-contrast image between the substrate and the wafer sheet is acquired as described above, the position detection of the substrate can be efficiently obtained as simple image processing by various image processing methods. In the present embodiment, the recognition of the outermost contour of the wafer and the correction of the chip coordinates associated with dicing / expanding in the first step, and the position recognition of the target chip in the second step are applicable. As a result, for example, in chip position detection corresponding to a no-marking system, it is possible to calculate the chip position with high accuracy and high speed without providing a special reference chip. In addition, since the tip position can be calculated accurately, a smaller tip can be made compatible with the no-marking system as compared with the conventional case.

  In the above-described embodiment, as shown in FIG. 1, illumination is applied from below the wafer sheet, and imaging is performed by a camera above the wafer. This is because in a general conventional take-out apparatus, a camera is installed above the wafer, so that a countermeasure at a modification level to such a conventional apparatus is taken into consideration. For wafers before the introduction of the no-marking system, marks are marked on defective chips in the wafer inspection process, and when the chip position is recognized by the take-out device, the marked marks are imaged by the camera above the wafer to identify good / defective products. Was. In such a situation where wafers that are compatible / not compatible with the no-marking system are produced in a mixed manner, it is preferable that the camera is arranged above the wafer and used for both the non-marking system compatible / non-compatible. In other words, in the case of an apparatus that targets only a wafer that is completely compatible with the no-marking system, a method of irradiating illumination from above the wafer and imaging with a camera from below the wafer may be used.

  Further, in the above-described embodiment, the substrate position detection device mounted on the take-out device that picks up a chip from the wafer after dicing has been described, but the present invention is not limited to this. According to the present invention, the outermost shape of the wafer can be recognized efficiently and accurately. For example, the present invention may be applied to an inspection apparatus for a wafer before dicing.

  The present invention can be suitably used for a semiconductor device that picks up chips from a wafer after dicing, such as a die bonder, a chip sorter, and a mounter.

It is a figure which shows the structure of the board | substrate position detection apparatus which concerns on embodiment of this invention. It is a figure which shows the recognition position in the board | substrate position recognition which concerns on embodiment of this invention. It is a figure which shows typically the image of the area | region containing the wafer outermost part imaged in embodiment of this invention. It is a figure which shows typically the image of the area | region containing the object chip | tip imaged in embodiment of this invention.

Explanation of symbols

101; Camera 102; Lens 103, 302, 401; Chip 104, 304, 403; Wafer sheet 105; Illumination 106, 303, 402; Street 201; 0 degree photographing unit 202; 90 degree photographing unit 203; Imaging unit 204; 270 ° imaging unit 205; wafer 206; orientation flat 301; wafer outermost shape 404; target chip

Claims (13)

Illuminating means for irradiating light onto a translucent sheet on which a substrate is fixed, imaging means for imaging the substrate and the sheet from a direction opposite to the light irradiation direction, and an image captured by the imaging means Image processing means for performing image processing on the substrate to detect the position of the substrate. The substrate position detection apparatus according to claim 1, wherein the image processing unit includes a contour correction unit that corrects a distortion or a cut portion of the contour of the substrate on the image. The said image processing means contains the discrimination | determination means which discriminate | determines the image which has an orientation flat from four or more images imaged in the position mutually separated among the outer peripheral parts of the said board | substrate. The substrate position detection apparatus according to the description. The discriminating means sets the outermost substrate position coordinate for each of the three images for each of four combinations selected from four images captured at positions separated from each other in the outer peripheral portion. The point detection and the radius of the arc passing through the substrate outermost position coordinates of these three points are calculated, and one image excluding the three images constituting the combination having the second largest radius among the four ways, The substrate position detection device according to claim 3, wherein the substrate position detection device is discriminated from an image having the orientation flat. 5. The substrate position detection apparatus according to claim 1, wherein the image processing is performed using a street formed on the substrate by dicing. Furthermore, based on the substrate position before dicing acquired in advance and the substrate position after dicing detected by the image processing means, position coordinates for correcting arbitrary position coordinates on the substrate before dicing are corrected. 6. The substrate position detecting apparatus according to claim 1, further comprising a correcting unit. The substrate position detection apparatus according to claim 1, further comprising an epi-illumination unit that irradiates light toward the sheet on which the substrate is fixed. A step of irradiating light toward a sheet on which a substrate having translucency is fixed, a step of imaging the substrate and the sheet from a direction opposite to the light irradiation direction, and image processing of the captured image And a step of detecting the position of the substrate. 9. The substrate position detection method according to claim 8, wherein, in the image processing, distortion or a cut portion of the outline of the substrate on the image is corrected. The substrate position detection according to claim 8 or 9, wherein in the image processing, an image having an orientation flat is discriminated from four or more images captured at positions separated from each other in an outer peripheral portion of the substrate. Method. In the discrimination of the image having the orientation flat, for each of the four combinations selected from the four images taken at positions separated from each other in the outer peripheral portion, the outermost substrate outline for each of the three images. The position coordinates are detected at one point and the radius of the arc passing through the outermost position coordinates of these three points is calculated, and the three images constituting the combination having the second largest radius among the four patterns are excluded. The substrate position detection method according to claim 10, wherein one image is determined as an image having the orientation flat. The substrate position detection method according to claim 8, wherein the image processing is performed using a street formed on the substrate by dicing. A step of correcting an arbitrary position coordinate on the substrate before dicing based on the substrate position before dicing acquired in advance and the substrate position after dicing detected by the image processing unit; The substrate position detection method according to claim 8, wherein the substrate position detection method is provided.

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