JP2009010407A - パッケージ部品及びその製造方法ならびに半導体パッケージ - Google Patents
パッケージ部品及びその製造方法ならびに半導体パッケージ Download PDFInfo
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- JP2009010407A JP2009010407A JP2008211056A JP2008211056A JP2009010407A JP 2009010407 A JP2009010407 A JP 2009010407A JP 2008211056 A JP2008211056 A JP 2008211056A JP 2008211056 A JP2008211056 A JP 2008211056A JP 2009010407 A JP2009010407 A JP 2009010407A
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- plating layer
- package
- package component
- lead frame
- rough
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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Abstract
【解決手段】半導体素子等を搭載したパッケージの構成に用いられるものであって、絶縁性樹脂で封止されるかもしくは接着剤層が適用される被覆面を少なくとも表面の一部に備えるパッケージ部品において、そのパッケージ部品が、導体基材と、その表面を部分的もしくは全体的に被覆した導電性皮膜とからなり、かつ導電性皮膜が、上記の被覆面において、粗面化された表面プロファイルをもった粗面めっき層からなるように構成する。
【選択図】図6
Description
前記パッケージ部品が、導体基材と、その表面を部分的もしくは全体的に被覆した導電性皮膜とからなり、かつ
前記導電性皮膜が、前記被覆面において、粗面化された表面プロファイルをもった粗面めっき層からなることを特徴とするパッケージ部品にある。
チオシアン酸ナトリウム 15g/L
塩化アンモニウム 30g/L
pH 4.5〜5.5
浴温 常温(約25℃)
処理時間 約15秒間〜約30分間
陰極電流密度 約1〜3A/cm2
硼酸 30g/L
臭化ニッケル 10g/L
pH 3.0〜4.0
浴温 約30〜50℃
処理時間 約15秒間〜約30分間
陰極電流密度 約3〜30A/cm2
(1)導体基材上に順に形成された、下地めっき層(例えば、平滑面めっき層)及び粗面めっき層の組み合わせ、
(2)導体基材上に順に形成された、粗面めっき層及び表面めっき層の組み合わせ、
(3)導体基材上に順に形成された、下地めっき層(例えば、平滑面めっき層)、粗面めっき層及び表面めっき層の組み合わせ、
などを挙げることができる。多層構造(1)において、粗面めっき層を「表面めっき層」ということもできる。なお、下地めっき層は、存在もしくは不存在のいずれであってもよいけれども、もしも存在させる場合には、工数及びコストの削減などを考慮して、非被覆層に形成される平滑面めっき層を利用するのが好ましい。
パッケージ部品が放熱板である別の半導体パッケージもある。このような半導体パッケージの例として、半導体素子が配線基板上に搭載されており、該配線基板に接着剤層を介して放熱板が接合されているタイプの半導体パッケージを挙げることができる。
水酸化ナトリウム(NaOH) 5〜60g/L
リン酸三ナトリウム(Na3PO4) 0〜200g/L
浴温 約50〜100℃
処理時間 約5秒間〜約5分間
電流密度 約0〜10A/dm2
例えば、それぞれニッケルからなる粗面めっき層及び平滑面めっき層は、図10及び図11に模式的に示すようなめっき処理装置を使用して有利に実施することができる。
粗面Niめっき層の形成:
微量の鉄(Fe)を含有する銅合金材(商品名「CDA194」)をサンプルとして用意し、その片面に粗面Niめっき層を異なる膜厚で電解めっきし、下記の4種類のサンプルを作製した。
サンプルB:膜厚1.0μm
サンプルC:膜厚3.0μm
サンプルD:膜厚5.0μm
塩化ニッケルめっき浴:
塩化ニッケル 75g/L
チオシアン酸ナトリウム 15g/L
塩化アンモニウム 30g/L
pH: 約4.5〜5.5
浴温: 常温(約25℃)
陰極電流密度: 約1〜3A/cm2
(A)走査電子顕微鏡(SEM、×10,000)による表面形態の観察、
(B)走査電子顕微鏡(SEM、×5,000)による断面状態の観察、及び
(C)原子間力顕微鏡(AFM)による表面状態の解析
を行うとともに、平均表面粗さRaも求めた。AFMは、測定範囲:10μm2で実施した。これらの測定結果は、図12〜図15に示され、また、下記の第1表にまとめられている。
図13…サンプルB(Ni膜厚:1.0μm)
図14…サンプルC(Ni膜厚:3.0μm)
図15…サンプルD(Ni膜厚:5.0μm)
平滑面Niめっき層の形成:
微量の鉄(Fe)を含有する銅合金材(商品名「CDA194」)をサンプルとして用意し、その片面に平滑面Niめっき層を異なる膜厚で電解めっきし、下記の4種類のサンプルを作製した。
サンプルII:膜厚1.0μm
サンプルIII:膜厚3.0μm
サンプルIV:膜厚5.0μm
スルファミン酸ニッケル 320g/L
硼酸 30g/L
臭化ニッケル 10g/L
pH: 約3.0〜4.0
浴温: 約30〜50℃
陰極電流密度: 約3〜30A/cm2
(A)走査電子顕微鏡(SEM、×10,000)による表面形態の観察、
(B)走査電子顕微鏡(SEM、×5,000)による断面状態の観察、及び
(C)原子間力顕微鏡(AFM)による表面状態の解析
を行うとともに、平均表面粗さRaも求めた。AFMは、測定範囲:10μm2で実施した。これらの測定結果は、図16〜図19に示され、また、下記の第1表にまとめられている。
図17…サンプルII(Ni膜厚:1.0μm)
図18…サンプルIII(Ni膜厚:3.0μm)
図19…サンプルIV(Ni膜厚:5.0μm)
カップせん断強さの測定:
本例では、前記実施例1で作製したサンプルA〜D及び前記実施例2で作製したサンプルI〜IVについて、SEMI標準規格G69−0996に規定される手順に従ってカップせん断強さを測定し、粗面Niめっき層及び平滑面Niめっき層に対する樹脂の密着性を評価した。
封止樹脂A…OCNタイプ(N社製)
封止樹脂B…BNLタイプ(H社製)
から成形した。カップ21を図22(B)に示すようにサンプル(リードフレーム)1の上に載置し、175℃で6時間にわたって加熱(ポストキュア)した。
本例では、それぞれ3層構造をもった粗面Niめっき層及び平滑面Niめっき層に対する樹脂の密着性をカップせん断強さで評価した。
前記実施例2に記載の手法に従って、銅合金材(商品名「CDA194」)の片面に平滑面Niめっき層を異なる膜厚(0.3,0.5,0.7,1.0,1.2,1.5及び2.0μm)で電解めっきした。次いで、図25(A)に示すように、形成された平滑面Niめっき層の上に膜厚0.05μmのパラジウム(Pd)めっき層と膜厚0.005μmの金(Au)めっき層を順次形成した。Auめっき層の表面は、Niめっき層と同様に平滑なままであった。
前記実施例1に記載の手法に従って、銅合金材(商品名「CDA194」)の片面に粗面Niめっき層を異なる膜厚(0.3,0.5,0.7,1.0,1.2,1.5及び2.0μm)で電解めっきした。次いで、図25(B)に示すように、形成された粗面Niめっき層の上に膜厚0.05μmのパラジウム(Pd)めっき層と膜厚0.005μmの金(Au)めっき層を順次形成した。Auめっき層の表面は、Niめっき層の粗化面をそのまま再現していた。
カップせん断強さの測定:
まず、初期(ポストキュア直後)のサンプルI−1〜I−7を使用して、SEMI標準規格G69−0996に規定される手順に従ってカップせん断強さを測定し、平滑面Niめっき層に対する樹脂の密着性を評価した。図26は、それぞれのサンプルについて測定されたカップせん断強さをプロットしたグラフである。
2 導電性皮膜
3 銀めっき層
4 放熱板
5 半導体素子
8 ボンディングワイヤ
9 封止樹脂
10 半導体パッケージ
14 放熱板
15 配線基板
Claims (23)
- 半導体素子を搭載したパッケージ又はその他のパッケージの構成に用いられるものであって、絶縁性樹脂で封止されるかもしくは接着剤層が適用される被覆面を少なくとも表面の一部に備えるパッケージ部品において、
前記パッケージ部品が、導体基材と、その表面を部分的もしくは全体的に被覆した導電性皮膜とからなり、かつ
前記導電性皮膜が、前記被覆面において、粗面化された表面プロファイルをもった粗面めっき層からなることを特徴とするパッケージ部品。 - 前記パッケージ部品の実質的にすべての表面が、前記被覆面によって占有されており、粗面化された表面プロファイルをもった粗面めっき層からなることを特徴とする請求項1に記載のパッケージ部品。
- 前記パッケージ部品の表面が、前記絶縁性樹脂及び(又は)接着剤層の不存在において外部に露出される非被覆面を、前記被覆面とともに有しており、該非被覆面において、前記導電性皮膜が、平滑な表面プロファイルをもった平滑面めっき層からなることを特徴とする請求項1に記載のパッケージ部品。
- 前記被覆面の粗面めっき層と前記非被覆面の平滑面めっき層が、同一もしくは異なるめっき金属から形成されていることを特徴とする請求項3に記載のパッケージ部品。
- 前記被覆面の粗面めっき層と前記非被覆面の平滑面めっき層が、同一もしくは異なる膜厚を有していることを特徴とする請求項3又は4に記載のパッケージ部品。
- 前記めっき金属が、ニッケル、銅、パラジウム、金、銀、すず、クロム又はその合金からなることを特徴とする請求項4又は5に記載のパッケージ部品。
- 前記導電性皮膜の粗面化された表面プロファイルが、めっき金属の針状結晶構造からなることを特徴とする請求項1〜6のいずれか1項に記載のパッケージ部品。
- 前記めっき金属が、ニッケル、銅、パラジウム又はその合金からなることを特徴とする請求項7に記載のパッケージ部品。
- 前記被覆面において、前記導電性皮膜が、2層もしくはそれ以上の多層構造からなることを特徴とする請求項1〜8のいずれか1項に記載のパッケージ部品。
- 前記導電性皮膜の多層構造が、下記の群:
(1)導体基材上に順に形成された、平滑面めっき層及び粗面めっき層、
(2)導体基材上に順に形成された、粗面めっき層及び表面めっき層、及び
(3)導体基材上に順に形成された、平滑面めっき層、粗面めっき層及び表面めっき層、
から選ばれる一員であることを特徴とする請求項9に記載のパッケージ部品。 - 前記表面めっき層が、下地の粗面めっき層の粗面化された表面プロファイルを複製していることを特徴とする請求項10に記載のパッケージ部品。
- 前記表面めっき層が、金、銀、銅、パラジウム、ニッケル、すず、クロム又はその合金からなる群から選ばれためっき金属から形成されていることを特徴とする請求項11に記載のパッケージ部品。
- 前記表面めっき層が、下地のめっき層を酸化処理することにより粗面化させためっき層からなることを特徴とする請求項10に記載のパッケージ部品。
- 前記導体基材が、銅又は非銅系金属の合金もしくは化合物からなることを特徴とする請求項1〜13のいずれか1項に記載のパッケージ部品。
- 前記非銅系金属が、アルミニウム又は鉄−ニッケルであることを特徴とする請求項14に記載のパッケージ部品。
- リードフレーム、放熱板又はその組み合わせであることを特徴とする請求項1〜15のいずれか1項に記載のパッケージ部品。
- 少なくとも1個の半導体素子を、請求項1〜16のいずれか1項に記載のパッケージ部品と組み合わせて備えてなることを特徴とする半導体パッケージ。
- 前記パッケージ部品がリードフレームであり、該リードフレームの所定の位置に前記半導体素子が搭載され、絶縁性樹脂で封止されていることを特徴とする請求項17に記載の半導体パッケージ。
- 前記リードフレームの実質的に全部が前記絶縁性樹脂で封止されたパッケージであることを特徴とする請求項18に記載の半導体パッケージ。
- 一部の表面が外部に露出した外部露出型放熱板をさらに有していることを特徴とする請求項19に記載の半導体パッケージ。
- 前記リードフレームの一部が外部に露出したパッケージであることを特徴とする請求項18に記載の半導体パッケージ。
- 前記パッケージ部品が放熱板であり、その一部の表面が外部に露出していることを特徴とする請求項17に記載の半導体パッケージ。
- 前記半導体素子が配線基板上に搭載されており、該配線基板に接着剤層を介して前記放熱板が接合されていることを特徴とする請求項22に記載の半導体パッケージ。
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Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101866901A (zh) * | 2009-04-09 | 2010-10-20 | 瑞萨电子株式会社 | 半导体器件及其制造方法 |
JP2010287741A (ja) * | 2009-06-11 | 2010-12-24 | Nagasaki Univ | リードフレームとその製造方法、及び半導体装置 |
US8389192B2 (en) | 2009-07-22 | 2013-03-05 | Fuji Xerox Co., Ltd. | Electrophotographic carrier, electrophotographic developer, process cartridge and image forming device |
WO2013180027A1 (ja) * | 2012-05-29 | 2013-12-05 | 東洋鋼鈑株式会社 | 樹脂との加工密着性に優れる容器用表面処理鋼板、その製造方法および缶 |
US9114594B2 (en) | 2011-07-26 | 2015-08-25 | Rohm And Haas Electronic Materials Llc | High temperature resistant silver coated substrates |
JP2016172899A (ja) * | 2015-03-17 | 2016-09-29 | 富士電機株式会社 | 錫系金属膜上に樹脂層を製造する方法 |
WO2017056731A1 (ja) * | 2015-09-28 | 2017-04-06 | 日本軽金属株式会社 | 導電部材及びその製造方法 |
JP2017089004A (ja) * | 2015-11-06 | 2017-05-25 | 株式会社ワールドメタル | 接合部材 |
WO2018221340A1 (ja) * | 2017-06-02 | 2018-12-06 | 株式会社三井ハイテック | リードフレーム、リードフレームの製造方法、および半導体装置の製造方法 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0653390A (ja) * | 1992-06-03 | 1994-02-25 | Seiko Epson Corp | 半導体装置及びその製造方法 |
JPH1068097A (ja) * | 1996-08-27 | 1998-03-10 | Seiichi Serizawa | 電子部品 |
JPH10284668A (ja) * | 1997-03-31 | 1998-10-23 | Goto Seisakusho:Kk | 半導体装置用リードフレーム及びその表面処理方法並びにこのリードフレームを用いた半導体装置 |
JPH11163210A (ja) * | 1997-12-01 | 1999-06-18 | Mitsubishi Shindoh Co Ltd | 表面処理金属材料およびその製造方法 |
JP2000077594A (ja) * | 1998-09-03 | 2000-03-14 | Hitachi Cable Ltd | 半導体装置用リードフレーム |
JP2001127229A (ja) * | 1999-11-01 | 2001-05-11 | Nec Corp | リードフレーム及びそのリードフレームを用いた樹脂封止型半導体装置 |
JP2002299538A (ja) * | 2001-03-30 | 2002-10-11 | Dainippon Printing Co Ltd | リードフレーム及びそれを用いた半導体パッケージ |
-
2008
- 2008-08-19 JP JP2008211056A patent/JP4698708B2/ja not_active Expired - Lifetime
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0653390A (ja) * | 1992-06-03 | 1994-02-25 | Seiko Epson Corp | 半導体装置及びその製造方法 |
JPH1068097A (ja) * | 1996-08-27 | 1998-03-10 | Seiichi Serizawa | 電子部品 |
JPH10284668A (ja) * | 1997-03-31 | 1998-10-23 | Goto Seisakusho:Kk | 半導体装置用リードフレーム及びその表面処理方法並びにこのリードフレームを用いた半導体装置 |
JPH11163210A (ja) * | 1997-12-01 | 1999-06-18 | Mitsubishi Shindoh Co Ltd | 表面処理金属材料およびその製造方法 |
JP2000077594A (ja) * | 1998-09-03 | 2000-03-14 | Hitachi Cable Ltd | 半導体装置用リードフレーム |
JP2001127229A (ja) * | 1999-11-01 | 2001-05-11 | Nec Corp | リードフレーム及びそのリードフレームを用いた樹脂封止型半導体装置 |
JP2002299538A (ja) * | 2001-03-30 | 2002-10-11 | Dainippon Printing Co Ltd | リードフレーム及びそれを用いた半導体パッケージ |
Cited By (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8994159B2 (en) | 2009-04-09 | 2015-03-31 | Renesas Electronics Corporation | Semiconductor device and manufacturing method thereof |
JP2010245417A (ja) * | 2009-04-09 | 2010-10-28 | Renesas Electronics Corp | 半導体装置およびその製造方法 |
US8367479B2 (en) | 2009-04-09 | 2013-02-05 | Renesas Electronics Corporation | Semiconductor device and manufacturing method thereof |
CN101866901A (zh) * | 2009-04-09 | 2010-10-20 | 瑞萨电子株式会社 | 半导体器件及其制造方法 |
JP2010287741A (ja) * | 2009-06-11 | 2010-12-24 | Nagasaki Univ | リードフレームとその製造方法、及び半導体装置 |
US8389192B2 (en) | 2009-07-22 | 2013-03-05 | Fuji Xerox Co., Ltd. | Electrophotographic carrier, electrophotographic developer, process cartridge and image forming device |
US9114594B2 (en) | 2011-07-26 | 2015-08-25 | Rohm And Haas Electronic Materials Llc | High temperature resistant silver coated substrates |
JP2013245394A (ja) * | 2012-05-29 | 2013-12-09 | Toyo Kohan Co Ltd | 樹脂との加工密着性に優れる容器用表面処理鋼板、その製造方法および缶 |
WO2013180027A1 (ja) * | 2012-05-29 | 2013-12-05 | 東洋鋼鈑株式会社 | 樹脂との加工密着性に優れる容器用表面処理鋼板、その製造方法および缶 |
US10526109B2 (en) | 2012-05-29 | 2020-01-07 | Toyo Kohan Co., Ltd. | Surface-treated steel sheet for container having excellent processing adhesion to resin, method for manufacturing same, and can |
JP2016172899A (ja) * | 2015-03-17 | 2016-09-29 | 富士電機株式会社 | 錫系金属膜上に樹脂層を製造する方法 |
WO2017056731A1 (ja) * | 2015-09-28 | 2017-04-06 | 日本軽金属株式会社 | 導電部材及びその製造方法 |
JPWO2017056731A1 (ja) * | 2015-09-28 | 2017-10-05 | 日本軽金属株式会社 | 導電部材及びその製造方法 |
US10400347B2 (en) | 2015-09-28 | 2019-09-03 | Nippon Light Metal Company, Ltd. | Conductive member, and production method therefor |
TWI696729B (zh) * | 2015-09-28 | 2020-06-21 | 日商日本輕金屬股份有限公司 | 匯流排及其製造方法 |
JP2017089004A (ja) * | 2015-11-06 | 2017-05-25 | 株式会社ワールドメタル | 接合部材 |
WO2018221340A1 (ja) * | 2017-06-02 | 2018-12-06 | 株式会社三井ハイテック | リードフレーム、リードフレームの製造方法、および半導体装置の製造方法 |
JP2018206920A (ja) * | 2017-06-02 | 2018-12-27 | 株式会社三井ハイテック | リードフレーム、リードフレームの製造方法および半導体装置の製造方法 |
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