JP2009004809A - Wiring substrate - Google Patents

Wiring substrate Download PDF

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JP2009004809A
JP2009004809A JP2008236802A JP2008236802A JP2009004809A JP 2009004809 A JP2009004809 A JP 2009004809A JP 2008236802 A JP2008236802 A JP 2008236802A JP 2008236802 A JP2008236802 A JP 2008236802A JP 2009004809 A JP2009004809 A JP 2009004809A
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pair
line
differential
conductors
signal
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Koki Kawabata
幸喜 川畑
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Kyocera Corp
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Kyocera Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring substrate in which high-frequency signal reflection loss caused by discontinuity of a transmission line in a connection portion between a differential line and a differential through-conductor can be made very small. <P>SOLUTION: The differential line 8 of the wiring substrate 1 has a pair of connection lines 12 to connect a pair of line conductors 8a, 8b and a pair of signal through-conductors 9a, 9b respectively, and the pair of the connection lines 12 are at an angle more than 90° with the line conductor respectively in a plane view, and at least one of a pair of ground conductor layers includes an opening which has a circular surrounding portion enclosing the pair of the signal through-conductors 9a, 9b inside in a plane view, and the differential lines 8 are formed in such a manner that the length from the circular surrounding to the connection portion with the signal through-conductors 9a, 9b is the minimum in a plane view. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、高速で作動する半導体素子や光半導体素子等の電子部品を搭載するのに好適な、差動伝送線路を有する配線基板に関するものである。   The present invention relates to a wiring board having a differential transmission line suitable for mounting electronic components such as semiconductor elements and optical semiconductor elements that operate at high speed.

従来、高速で作動する半導体素子や光半導体素子等の電子部品を搭載するための配線基板においては、従来の配線基板の例の断面図である図4に示すように、高速の高周波信号を正確かつ効率よく伝播させるために、差動線路48と外部入出力用電極411との接続には差動貫通導体49を用いている。差動線路48の構造は、一対の信号線路によって決定される特性インピーダンスが所望の値となるように、絶縁基板42の絶縁層42a〜42fの材料や、絶縁層42a〜42fの断面構造、すなわち配線導体43の幅および厚み、配線導体43とグランド層やグランド導体との距離等を制御して決定されている。   Conventionally, in a wiring board for mounting electronic components such as semiconductor elements and optical semiconductor elements that operate at high speed, as shown in FIG. 4 which is a cross-sectional view of an example of a conventional wiring board, high-speed high-frequency signals are accurately transmitted. In order to propagate efficiently, a differential through conductor 49 is used to connect the differential line 48 and the external input / output electrode 411. The structure of the differential line 48 is such that the material of the insulating layers 42a to 42f of the insulating substrate 42 and the cross-sectional structure of the insulating layers 42a to 42f, that is, the characteristic impedance determined by the pair of signal lines is a desired value. It is determined by controlling the width and thickness of the wiring conductor 43, the distance between the wiring conductor 43 and the ground layer or the ground conductor, and the like.

また、図4の配線基板に形成された差動線路と差動貫通導体の接続部周辺の要部拡大平面図である図5に示すように、差動線路48に接続される差動貫通導体49は、一対の信号貫通導体49a,49bによって決定される特性インピーダンスが所望の値となるように、配線基板42の絶縁層42a〜42fの材料や、差動貫通導体49および接地導体410の直径を変更したり、更にこれらの相対位置を互いに変更することによって決定されている。   Further, as shown in FIG. 5 which is an enlarged plan view of the main part around the connection portion between the differential line and the differential through conductor formed on the wiring board of FIG. 4, the differential through conductor connected to the differential line 48. 49, the material of the insulating layers 42a to 42f of the wiring board 42 and the diameters of the differential through conductor 49 and the ground conductor 410 so that the characteristic impedance determined by the pair of signal through conductors 49a and 49b has a desired value. Or by changing their relative positions to each other.

また、差動線路48の一対の線路導体48a,48bの間隔は一対の信号貫通導体49a,49bの間隔よりも小さいため、差動線路48の線路導体48a(48b)と接続線路部512とが成す角度513は90°であり、この接続線路部512を介して線路導体48a,48bが信号貫通導体49a,49bに接続されている。   Further, since the distance between the pair of line conductors 48a and 48b of the differential line 48 is smaller than the distance between the pair of signal through conductors 49a and 49b, the line conductor 48a (48b) of the differential line 48 and the connection line portion 512 are connected. The formed angle 513 is 90 °, and the line conductors 48 a and 48 b are connected to the signal through conductors 49 a and 49 b through the connection line portion 512.

なお、図4において、41は配線基板、43は信号配線群、44(44a,44b,44c)は接地導体層、45は半導体素子、46は導体バンプ、47は電極パッド、410は接地貫通導体である。
特開2001−53397号公報 特開2000−138433号公報
In FIG. 4, 41 is a wiring board, 43 is a signal wiring group, 44 (44a, 44b, 44c) is a grounding conductor layer, 45 is a semiconductor element, 46 is a conductor bump, 47 is an electrode pad, and 410 is a grounding through conductor. It is.
JP 2001-53397 A JP 2000-138433 A

しかしながら、従来の配線基板41に搭載される半導体素子45の動作速度が数十GHzと高速化するに従い、差動線路48と差動貫通導体49との接続部において、線路導体48,48bは信号貫通導体49a,49bに、線路導体48a(48b)とのなす角度513が90°である接続線路部512を介して接続されているため、線路導体48,48bと接続線路部512との間の屈曲部による急激な方向の変化によって伝送線路の不連続性が生じ、屈曲部において高周波信号の反射が発生していた。その結果、差動線路48と差動貫通導体49との接続部において、高周波信号の反射損失が大きくなって高周波信号の伝送性が劣化し、半導体素子45の作動性が損なわれるという問題点を有していた。   However, as the operating speed of the semiconductor element 45 mounted on the conventional wiring board 41 is increased to several tens GHz, the line conductors 48 and 48b are connected to the signal conductors 48 and 48b at the connection portion between the differential line 48 and the differential through conductor 49. Since the through conductors 49a and 49b are connected via the connection line portion 512 having an angle 513 formed by the line conductor 48a (48b) of 90 °, the line conductors 48 and 48b and the connection line portion 512 are connected to each other. A sudden change in direction due to the bent portion causes discontinuity of the transmission line, and high-frequency signals are reflected at the bent portion. As a result, there is a problem in that the high frequency signal reflection loss is increased at the connecting portion between the differential line 48 and the differential through conductor 49, the transmission performance of the high frequency signal is deteriorated, and the operability of the semiconductor element 45 is impaired. Had.

本発明は上記問題点に鑑みて完成されたものであり、その目的は、差動線路とそれに接続された差動貫通導体を有する配線基板において、差動線路と差動貫通導体との接続部における高周波信号の反射損失を大幅に抑制することができ、その結果、半導体素子の作動性を良好なものとできるものとすることにある。   The present invention has been completed in view of the above problems, and an object of the present invention is to provide a connection portion between a differential line and a differential through conductor in a wiring board having a differential line and a differential through conductor connected thereto. Therefore, it is possible to greatly suppress the reflection loss of the high-frequency signal in the semiconductor device, and as a result, to improve the operability of the semiconductor element.

本発明の配線基板は、絶縁基板と、前記の絶縁基板に平行に形成された一対の線路導体を有する差動線路と、前記の絶縁基板に形成され、前記の一対の線路導体に電気的に接続された一対の信号貫通導体を有し、該一対の信号貫通導体の間隔が、前記の一対の線路導体の間隔よりも大きい差動貫通導体と、前記の絶縁基板における前記の差動線路の上下に該差動線路から離間して配置された一対の接地導体層とを有し、前記の差動線路は、前記の一対の線路導体と前記の一対の信号貫通導体とを接続する一対の接続線路部を有し、該一対の接続線路部は、平面視して、それぞれが前記の線路導体と90度を超える角度をなし、前記の一対の接地導体層は、少なくとも一方が、平面視して、前記の一対の信号貫通導体を内側に取り囲む環状の外周部を有する開口部を備え、前記の差動線路は、平面視して、前記の環状の外周部から前記の信号貫通導体との接続部までの長さが最小となるように形成されている。   The wiring board of the present invention is formed on the insulating substrate, a differential line having a pair of line conductors formed in parallel to the insulating substrate, and the insulating substrate, and electrically connected to the pair of line conductors. A differential through conductor having a pair of connected signal through conductors, wherein the gap between the pair of signal through conductors is larger than the gap between the pair of line conductors, and the differential line in the insulating substrate. A pair of ground conductor layers disposed on the upper and lower sides of the differential line, and the differential line is connected to the pair of line conductors and the pair of signal through conductors. Each of the pair of connection line portions has an angle of more than 90 degrees with the line conductor, and at least one of the pair of ground conductor layers has a plan view. An annular outer periphery that surrounds the pair of signal through conductors on the inside. The differential line is formed so that the length from the annular outer peripheral portion to the connection portion with the signal through conductor is minimized in plan view. .

本発明の配線基板において、好ましくは、前記の接続線路部は、その長さが使用周波数帯域の上限周波数の波長の1/4以下である。本発明の配線基板は、好ましくは、前記の絶縁基板に前記外周部に沿って設けられ、前記の一対の接地導体層を接続する接地用導体部を有し、前記の接地用導体部は、その一部が前記の信号貫通導体を中心とする円に沿って形成されている。   In the wiring board of the present invention, preferably, the length of the connection line portion is ¼ or less of the wavelength of the upper limit frequency of the use frequency band. The wiring board according to the present invention is preferably provided along the outer peripheral portion of the insulating substrate, and includes a grounding conductor portion that connects the pair of grounding conductor layers, and the grounding conductor portion includes: A part thereof is formed along a circle centered on the signal through conductor.

本発明の配線基板は、絶縁基板と、絶縁基板に平行に形成された一対の線路導体を有する差動線路と、絶縁基板に形成され、一対の線路導体に電気的に接続された一対の信号貫通導体を有し、該一対の信号貫通導体の間隔が、一対の線路導体の間隔よりも大きい差動貫通導体と、絶縁基板における差動線路の上下に該差動線路から離間して配置された一対の接地導体層とを有し、差動線路は、一対の線路導体と一対の信号貫通導体とを接続する一対の接続線路部を有し、該一対の接続線路部は、平面視して、それぞれが線路導体と90度を超える角度をなし、一対の接地導体層は、少なくとも一方が、平面視して、一対の信号貫通導体を内側に取り囲む環状の外周部を有する開口部を備え、差動線路は、平面視して、環状の外周部から信号貫通導体との接続部までの長さが最小となるように形成されていることから、差動線路の接続線路部と差動貫通導体の信号貫通導体との接続部における伝送線路の不連続性を小さくできるため、差動線路と差動貫通導体との接続部における高周波信号の反射損失を抑えることが可能となる。   The wiring board of the present invention includes an insulating substrate, a differential line having a pair of line conductors formed in parallel to the insulating substrate, and a pair of signals formed on the insulating substrate and electrically connected to the pair of line conductors. A differential through conductor having a through conductor, wherein the distance between the pair of signal through conductors is larger than the distance between the pair of line conductors, and arranged above and below the differential line on the insulating substrate and spaced apart from the differential line. The differential line has a pair of connection line portions that connect the pair of line conductors and the pair of signal through conductors, and the pair of connection line portions are viewed in plan view. Each of the pair of ground conductor layers includes an opening having an annular outer peripheral portion that surrounds the pair of signal penetration conductors when viewed in a plan view. The differential line has a signal penetration from the annular outer periphery in plan view. Since the length to the connection with the conductor is minimized, the discontinuity of the transmission line at the connection between the connection line of the differential line and the signal through conductor of the differential through conductor is reduced. Since it can be made small, it is possible to suppress the reflection loss of the high-frequency signal at the connection portion between the differential line and the differential through conductor.

以上より、本発明の配線基板によれば、差動線路と差動貫通導体との接続部における高周波信号の反射損失を極めて小さくすることができるので、本発明の配線基板に搭載される半導体素子の高周波領域における作動性を非常に良好なものとすることができる。   As described above, according to the wiring board of the present invention, the reflection loss of the high-frequency signal at the connection portion between the differential line and the differential through conductor can be extremely reduced, so that the semiconductor element mounted on the wiring board of the present invention The operability in the high frequency region can be made very good.

本発明の配線基板について以下に詳細に説明する。図1は本発明の配線基板の実施の形態の一例を示す断面図であり、図2は図1の配線基板における差動貫通導体の周辺部の要部拡大平面図である。   The wiring board of the present invention will be described in detail below. FIG. 1 is a cross-sectional view showing an example of an embodiment of a wiring board according to the present invention, and FIG. 2 is an enlarged plan view of a main part of the periphery of a differential through conductor in the wiring board of FIG.

本実施の形態による配線基板1においては、絶縁基板2を構成する絶縁層2a〜2fは基本的には同じ比誘電率を有する絶縁材料で形成されている。絶縁層2c上には信号配線群3が形成され、絶縁層2b,2d上には信号配線群3に対向させて広面積の接地導体層4a,4bが形成されており、信号配線群3の各信号配線はストリップ線路構造を有している。接地導体層4a,4bは、配線基板1の仕様に応じて入れ換えて配置されることもある。   In wiring substrate 1 according to the present embodiment, insulating layers 2a to 2f constituting insulating substrate 2 are basically formed of an insulating material having the same relative dielectric constant. A signal wiring group 3 is formed on the insulating layer 2c, and ground conductor layers 4a and 4b having large areas are formed on the insulating layers 2b and 2d so as to face the signal wiring group 3. Each signal wiring has a stripline structure. The ground conductor layers 4a and 4b may be interchanged depending on the specifications of the wiring board 1.

また、信号配線群3の各信号配線の配線幅および信号配線群3と接地導体層4a,4bとの間に介在する絶縁層2b,2cの厚みを適宜設定することにより、信号配線群3の特性インピーダンスを任意の値に設定することができるため、良好な伝送特性を有する信号配線群3を形成することが可能となる。信号配線群3の特性インピーダンスは一般的には50Ωに設定される。なお、信号配線群3に含まれる複数の信号配線は、それぞれ異なる電気信号を伝送するものとしてもよい。   Further, by appropriately setting the wiring width of each signal wiring of the signal wiring group 3 and the thickness of the insulating layers 2b and 2c interposed between the signal wiring group 3 and the ground conductor layers 4a and 4b, Since the characteristic impedance can be set to an arbitrary value, the signal wiring group 3 having good transmission characteristics can be formed. The characteristic impedance of the signal wiring group 3 is generally set to 50Ω. The plurality of signal wirings included in the signal wiring group 3 may transmit different electrical signals.

図1の例では、配線基板1の上面には高速で動作するIC,LSI等の半導体集積回路素子や半導体レーザ(LD),フォトダイオード(PD)等の光半導体素子等の半導体素子5が搭載され、錫−鉛(Sn−Pb)合金等の半田や金(Au)等から成る導体バンプ6および半導体素子5を接続するための電極パッド7を介して差動線路8に電気的に接続されている。また、配線基板1の下面には、半導体素子5に信号の入出力および電源供給を行なうための外部接続用電極11が形成されている。   In the example of FIG. 1, a semiconductor integrated circuit element such as an IC or LSI that operates at high speed or a semiconductor element 5 such as an optical semiconductor element such as a semiconductor laser (LD) or photodiode (PD) is mounted on the upper surface of the wiring substrate 1. And electrically connected to the differential line 8 via a conductor bump 6 made of solder such as tin-lead (Sn—Pb) alloy or gold (Au) and an electrode pad 7 for connecting the semiconductor element 5. ing. Further, on the lower surface of the wiring substrate 1, external connection electrodes 11 for inputting / outputting signals and supplying power to the semiconductor element 5 are formed.

また、差動線路8は、絶縁層2cの上面に接地導体層4a,4bとの間に形成されたストリップ構造の一対の信号線路から成り、外部と信号の入出力を行なうために差動貫通導体9を介して外部接続用電極11に電気的に接続されており、また、差動貫通導体9、電極パッド7および錫−鉛(Sn−Pb)合金等の半田や金(Au)等から成る導体バンプ6を介して半導体素子5の電極に電気的に接続されている。   The differential line 8 is composed of a pair of signal lines having a strip structure formed between the ground conductor layers 4a and 4b on the upper surface of the insulating layer 2c. It is electrically connected to the external connection electrode 11 through the conductor 9, and from the differential through conductor 9, the electrode pad 7, solder such as tin-lead (Sn—Pb) alloy, gold (Au), or the like. The conductor bump 6 is electrically connected to the electrode of the semiconductor element 5.

また、差動貫通導体9は互いに平行に形成された一対の信号貫通導体9a,9bから成り、その周囲に接地貫通導体10が形成されており、差動貫通導体9の一端は差動線路8に電気的に接続され、他端は外部接続用電極11に電気的に接続されている。   The differential through conductor 9 includes a pair of signal through conductors 9a and 9b formed in parallel with each other, and a ground through conductor 10 is formed around the signal through conductors 9a and 9b. The other end is electrically connected to the external connection electrode 11.

本実施の形態による接続線路部12について図2を用いて詳細に説明する。差動貫通導体9の信号貫通導体9a,9bと差動線路8の線路導体8a,8bとは、線路導体8a,8bとの成す角度13が90°を超えている接続線路部12を介して接続されているので、差動線路8の接続線路部12と差動貫通導体9の信号貫通導体9a,9bとの接続部における伝送線路の不連続性を小さくできるため、差動線路8と差動貫通導体9との接続部における高周波信号の反射損失を抑えることが可能となる。   The connection line portion 12 according to the present embodiment will be described in detail with reference to FIG. The signal through conductors 9a and 9b of the differential through conductor 9 and the line conductors 8a and 8b of the differential line 8 are connected via a connection line portion 12 where an angle 13 formed by the line conductors 8a and 8b exceeds 90 °. Since it is connected, the discontinuity of the transmission line at the connection portion between the connection line portion 12 of the differential line 8 and the signal through conductors 9a and 9b of the differential through conductor 9 can be reduced. It becomes possible to suppress the reflection loss of the high-frequency signal at the connection portion with the moving through conductor 9.

本発明において好ましくは、接続線路部12はその長さが使用周波数帯域の上限周波数の波長の1/4以下であることから、高周波信号に対して差動線路8の接続線路部12と差動貫通導体9の信号貫通導体9a,9bとの接続部における不連続性の影響をより小さくすることができ、高周波信号の反射損失をより抑えることが可能となる。   In the present invention, preferably, the length of the connection line portion 12 is equal to or less than ¼ of the wavelength of the upper limit frequency of the use frequency band. The influence of discontinuity at the connection portion between the through conductor 9 and the signal through conductors 9a and 9b can be further reduced, and the reflection loss of the high frequency signal can be further suppressed.

次に、図3に基き本発明における差動線路8について説明する。図3は本実施の形態による配線基板1の実施の形態の一例における差動線路8の周辺部を示す要部拡大断面図である。図3において、差動線路8は互いに平行に形成された一対の線路導体8a,8bから成る。そして、差動線路8は、線路導体8a,8bの幅,間隔,厚み、および線路導体8a,8bと接地導体層4a,4bとの間に介在する絶縁層2b,2cの厚みを適宜設定することにより、差動線路8の特性インピーダンスを所望の値に設定することができる。その結果、良好な伝送特性を有する差動線路8を形成することが可能となる。差動線路8の特性インピーダンスは一般的には100Ωに設定される。   Next, the differential line 8 according to the present invention will be described with reference to FIG. FIG. 3 is an enlarged cross-sectional view of the main part showing the peripheral part of the differential line 8 in an example of the embodiment of the wiring board 1 according to the present embodiment. In FIG. 3, the differential line 8 comprises a pair of line conductors 8a and 8b formed in parallel to each other. In the differential line 8, the width, interval, and thickness of the line conductors 8a and 8b and the thicknesses of the insulating layers 2b and 2c interposed between the line conductors 8a and 8b and the ground conductor layers 4a and 4b are set as appropriate. Thus, the characteristic impedance of the differential line 8 can be set to a desired value. As a result, the differential line 8 having good transmission characteristics can be formed. The characteristic impedance of the differential line 8 is generally set to 100Ω.

また、信号配線群3および差動線路8の構造は、信号配線群3に対向して電源配線層もしくは接地導体層を形成して成るマイクロストリップ線路構造の他に、信号配線群3の上下に電源配線層もしくは接地導体層を形成して成るストリップ線路構造、また信号配線群3の各信号配線に隣接して所定間隔をもって同一面電源配線層もしくは同一面接地導体層を形成して成るコプレーナ線路構造であってもよい。   The signal wiring group 3 and the differential line 8 are structured above and below the signal wiring group 3 in addition to the microstrip line structure formed by forming a power wiring layer or a ground conductor layer so as to face the signal wiring group 3. A strip line structure formed by forming a power supply wiring layer or a ground conductor layer, and a coplanar line formed by forming the same plane power supply wiring layer or the same plane ground conductor layer adjacent to each signal wiring of the signal wiring group 3 with a predetermined interval. It may be a structure.

また、配線基板1にチップ抵抗,薄膜抵抗,コイルインダクタ,クロスインダクタ,チップコンデンサまたは電解コンデンサ等を搭載して、電子回路モジュール等を構成してもよい。   Moreover, a chip resistor, a thin film resistor, a coil inductor, a cross inductor, a chip capacitor, an electrolytic capacitor, or the like may be mounted on the wiring board 1 to constitute an electronic circuit module or the like.

また、各絶縁層2a〜2fの平面視における形状は、正方形状や長方形状の他に、菱形状,六角形状または八角形状等の形状であってもよい。   Further, the shape of each of the insulating layers 2a to 2f in a plan view may be a rhombus shape, a hexagonal shape, an octagonal shape, or the like in addition to a square shape or a rectangular shape.

そして、このような本実施の形態による配線基板1は、半導体素子収納用パッケージ等の電子部品収納用パッケージや電子部品搭載用基板、多数の半導体素子が搭載されるいわゆるマルチチップモジュールやマルチチップパッケージ、あるいはマザーボード等として使用される。   The wiring board 1 according to this embodiment includes an electronic component storage package such as a semiconductor element storage package, an electronic component mounting substrate, a so-called multichip module or multichip package on which a large number of semiconductor elements are mounted. Or used as a motherboard.

本実施の形態による配線基板1において、絶縁層2a〜2fは例えばセラミックグリーンシート積層法によって形成される。この場合、絶縁層2a〜2fは、酸化アルミニウム質焼結体,窒化アルミニウム質焼結体,炭化珪素質焼結体,窒化珪素質焼結体,ムライト質焼結体またはガラスセラミックス等の無機絶縁材料を使用して形成される。また、絶縁層2a〜2fは、ポリイミド,エポキシ樹脂,フッ素樹脂,ポリノルボルネンまたはベンゾシクロブテン等の有機絶縁材料、あるいはセラミックス粉末等の無機絶縁物粉末をエポキシ樹脂等の熱硬化性樹脂で結合して成る複合絶縁材料等の電気絶縁材料を使用して形成される。   In the wiring substrate 1 according to the present embodiment, the insulating layers 2a to 2f are formed by, for example, a ceramic green sheet lamination method. In this case, the insulating layers 2a to 2f are made of an inorganic insulating material such as an aluminum oxide sintered body, an aluminum nitride sintered body, a silicon carbide sintered body, a silicon nitride sintered body, a mullite sintered body, or a glass ceramic. Formed using materials. The insulating layers 2a to 2f are formed by bonding an organic insulating material such as polyimide, epoxy resin, fluororesin, polynorbornene or benzocyclobutene, or inorganic insulating powder such as ceramic powder with a thermosetting resin such as epoxy resin. It is formed using an electrically insulating material such as a composite insulating material.

これらの絶縁層2a〜2fは以下のようにして作製される。絶縁層2a〜2fが例えば酸化アルミニウム質焼結体から成る場合、まず、酸化アルミニウム,酸化珪素,酸化カルシウムまたは酸化マグネシウム等の原料粉末に適当な有機バインダや溶剤等を添加混合して泥漿状となし、これをドクターブレード法等を採用してシート状となすことによってセラミックグリーンシートを得る。そして、セラミックグリーンシートに信号配線群3および各導体層と成る金属ペーストを所定のパターンに印刷塗布して、これらを上下に積層し、最後にこの積層体を還元雰囲気中で約1600℃の温度で焼成することによって製作される。   These insulating layers 2a to 2f are manufactured as follows. When the insulating layers 2a to 2f are made of, for example, an aluminum oxide sintered body, first, an appropriate organic binder or solvent is added to and mixed with raw material powders such as aluminum oxide, silicon oxide, calcium oxide or magnesium oxide to form a slurry. None, by adopting a doctor blade method or the like to form a sheet, a ceramic green sheet is obtained. Then, the signal paste group 3 and the metal paste which becomes each conductor layer are printed and applied in a predetermined pattern on the ceramic green sheet, and these are laminated up and down, and finally the laminated body is heated to a temperature of about 1600 ° C. in a reducing atmosphere. It is manufactured by firing at

また、絶縁層2a〜2fがエポキシ樹脂から成る場合、まず酸化アルミニウム質焼結体から成るセラミックスを混合した熱硬化性のエポキシ樹脂、あるいはガラス繊維を織り込んだ布にエポキシ樹脂を含浸させて成るガラスエポキシ樹脂等から成る絶縁層の上面に、有機樹脂前駆体をスピンコート法もしくはカーテンコート法等により被着させ、これを熱硬化処理することによって絶縁層を形成する。この絶縁層と、銅層を無電解めっき法や蒸着法等の薄膜形成技術およびフォトリソグラフィ技術を採用することによって形成して成る薄膜配線導体層とを交互に積層し、約170℃程度の温度で加熱硬化することによって製作される。   When the insulating layers 2a to 2f are made of an epoxy resin, first, a glass made by impregnating an epoxy resin into a thermosetting epoxy resin mixed with ceramics made of an aluminum oxide sintered body or a cloth woven with glass fibers. An organic resin precursor is deposited on the upper surface of an insulating layer made of an epoxy resin or the like by a spin coating method or a curtain coating method, and the insulating layer is formed by heat-curing the organic resin precursor. This insulating layer and a thin film wiring conductor layer formed by adopting a copper layer by employing a thin film forming technique such as an electroless plating method or a vapor deposition method and a photolithography technique are alternately laminated, and a temperature of about 170 ° C. It is manufactured by heating and curing.

これらの絶縁層2a〜2fの厚みは、使用する材料の特性に応じて、要求される仕様に対応する機械的強度や電気的特性等の条件を満たすように設定される。   The thicknesses of these insulating layers 2a to 2f are set so as to satisfy the conditions such as mechanical strength and electrical characteristics corresponding to the required specifications according to the characteristics of the materials used.

また、信号配線群3、差動線路8および接地導体層4は、例えばタングステン(W),モリブデン(Mo),モリブデン−マンガン(Mo−Mn),銅(Cu),銀(Ag)または銀−パラジウム(Ag−Pd)等の金属粉末メタライズ、あるいは銅(Cu),銀(Ag),ニッケル(Ni),クロム(Cr),チタン(Ti),金(Au)またはニオブ(Nb)やそれらの合金等の金属材料の薄膜等により形成すればよい。   The signal wiring group 3, the differential line 8, and the ground conductor layer 4 are made of, for example, tungsten (W), molybdenum (Mo), molybdenum-manganese (Mo-Mn), copper (Cu), silver (Ag), or silver- Metal powder metallization such as palladium (Ag-Pd), or copper (Cu), silver (Ag), nickel (Ni), chromium (Cr), titanium (Ti), gold (Au) or niobium (Nb) and their What is necessary is just to form by the thin film etc. of metal materials, such as an alloy.

具体的には、信号配線群3や電源配線層4をWの金属粉末メタライズで形成する場合、W粉末に適当な有機バインダや溶剤等を添加混合して得た金属ペーストを絶縁層2a〜2fと成るセラミックグリーンシートに所定のパターンに印刷塗布し、これをセラミックグリーンシートの積層体とともに焼成することによって形成することができる。   Specifically, when the signal wiring group 3 and the power supply wiring layer 4 are formed by metal powder metallization of W, a metal paste obtained by adding and mixing an appropriate organic binder or solvent to the W powder is used for the insulating layers 2a to 2f. It can be formed by printing and applying a predetermined pattern on the ceramic green sheet to be fired together with a laminate of ceramic green sheets.

また、信号配線群3や電源配線層4を金属材料の薄膜で形成する場合、例えばスパッタリング法,真空蒸着法またはメッキ法により金属膜を形成した後、フォトリソグラフィ法により所定の配線パターンに形成することができる。   Further, when the signal wiring group 3 and the power supply wiring layer 4 are formed of a thin film of a metal material, a metal film is formed by, for example, a sputtering method, a vacuum evaporation method or a plating method, and then formed into a predetermined wiring pattern by a photolithography method. be able to.

このような配線基板1は、信号配線群3が配設されている絶縁層2a〜2fの比誘電率に応じて、信号配線群3および差動線路8の各信号配線の配線幅,配線厚み,配線間隔を所望の値に設定することで、信号配線群3の各信号配線の特性インピーダンス値および差動線路8の特性インピーダンス値を所望の値とすることができる。   Such a wiring board 1 has a wiring width and a wiring thickness of each signal wiring of the signal wiring group 3 and the differential line 8 according to the relative dielectric constant of the insulating layers 2a to 2f on which the signal wiring group 3 is disposed. By setting the wiring interval to a desired value, the characteristic impedance value of each signal wiring of the signal wiring group 3 and the characteristic impedance value of the differential line 8 can be set to desired values.

なお、本発明は上記の実施の形態の例に限定されるものではなく、本発明の要旨を逸脱しない範囲で種々の変更を行なうことは何ら差し支えない。例えば、差動貫通導体9が接続される差動線路8は配線基板1の表層に形成されてもよい。さらに、差動貫通導体9が電気的に接続される二次実装部は、コネクタやワイヤボンディングパッド等でもよい。また、差動貫通導体9は、配線基板1上の異なる絶縁層上に形成された差動線路8同士の接続に用いてもよい。   Note that the present invention is not limited to the above-described embodiments, and various modifications may be made without departing from the scope of the present invention. For example, the differential line 8 to which the differential through conductor 9 is connected may be formed on the surface layer of the wiring board 1. Further, the secondary mounting portion to which the differential through conductor 9 is electrically connected may be a connector or a wire bonding pad. Further, the differential through conductor 9 may be used to connect the differential lines 8 formed on different insulating layers on the wiring board 1.

本実施例の図1の構成の配線基板1を以下のようにして作製した。酸化アルミニウム質焼結体から成る各厚みが0.2mmの絶縁層2a〜2fを上述したセラミックグリーンシート積層法によって積層し形成することにより、絶縁基板2を作製した。このとき、信号配線群3、差動線路8、接地導体層4、差動貫通導体9および接地貫通導体10を、上述のWの金属粉末メタライズで形成した。   The wiring board 1 having the configuration shown in FIG. 1 according to this example was manufactured as follows. The insulating substrate 2 was produced by laminating and forming the insulating layers 2a to 2f each made of an aluminum oxide sintered body having a thickness of 0.2 mm by the ceramic green sheet laminating method described above. At this time, the signal wiring group 3, the differential line 8, the ground conductor layer 4, the differential through conductor 9, and the ground through conductor 10 were formed of the above-described metal powder metallization of W.

そして、この場合、図2に示すように、比誘電率が5.2の絶縁基板2dに、線路導体8a,8bのそれぞれの配線幅が50μm、線路導体8a,8b間の線路間隔が100μmである差動線路8を形成した。また、各直径が75μmで互いの間隔が0.31mmの一対の信号貫通導体9a,9bから構成された差動貫通導体9を同心円状に取り囲むように、各直径が75μmで互いの間隔が0.31mmの11本の接地貫通導体10を形成した。   In this case, as shown in FIG. 2, the wiring width of each of the line conductors 8a and 8b is 50 μm and the line interval between the line conductors 8a and 8b is 100 μm on the insulating substrate 2d having a relative dielectric constant of 5.2. A differential line 8 was formed. Further, each diameter is 75 μm and the distance between each other is 0 so as to concentrically surround the differential penetration conductor 9 composed of a pair of signal penetration conductors 9 a and 9 b each having a diameter of 75 μm and a distance of 0.31 mm. 11 grounding through conductors 10 of 31 mm were formed.

さらに、差動貫通導体9の信号貫通導体9aと差動線路8の線路導体8a、および信号貫通導体9bと線路導体8bとは、それぞれ線路導体8a,8bとなす角度が158.5°で、長さが0.215mmである(40GHzの高周波信号の波長の1/4(0.82mm)以下の長さ)接続線路部12を介して接続されている。   Furthermore, the angle between the signal through conductor 9a of the differential through conductor 9 and the line conductor 8a of the differential line 8 and the signal through conductor 9b and the line conductor 8b from the line conductors 8a and 8b is 158.5 °, respectively. The length is 0.215 mm (a length equal to or less than ¼ (0.82 mm) of the wavelength of a high-frequency signal of 40 GHz).

上記構成の差動線路8について、40GHzの高周波信号を信号貫通導体8a,8bに位相差180度で入力したところ、差動線路8の接続線路部12と差動貫通導体9の信号貫通導体9a,9bとの接続部における伝送線路の不連続性を小さくできるため、高周波信号の反射損失を抑えることが可能となった。すなわち、差動線路8と差動貫通導体9との接続部における高周波信号の反射レベルは−33.5dB程度となり、きわめて小さい値であった。   When the high-frequency signal of 40 GHz is input to the signal through conductors 8a and 8b with a phase difference of 180 degrees with respect to the differential line 8 having the above configuration, the connection line portion 12 of the differential line 8 and the signal through conductor 9a of the differential through conductor 9 are obtained. , 9b, the discontinuity of the transmission line can be reduced, and the reflection loss of the high frequency signal can be suppressed. That is, the reflection level of the high-frequency signal at the connection portion between the differential line 8 and the differential through conductor 9 is about −33.5 dB, which is a very small value.

また、比較例1として、差動貫通導体9の信号貫通導体9a,9bと差動線路8の線路導体8a,8bとは、線路導体8a,8bとなす角度が90°である接続線路部を介して接続されるよう形成した配線基板においては、差動貫通導体9と差動線路8との接続部における高周波信号の反射レベルは−20.2dB程度と大きくなった。   Further, as Comparative Example 1, the signal through conductors 9a and 9b of the differential through conductor 9 and the line conductors 8a and 8b of the differential line 8 are connected line portions having an angle of 90 ° with the line conductors 8a and 8b. In the wiring board formed so as to be connected through the high frequency signal, the reflection level of the high frequency signal at the connection portion between the differential through conductor 9 and the differential line 8 is as high as about −20.2 dB.

本発明の配線基板の実施の形態の一例を示す断面図である。It is sectional drawing which shows an example of embodiment of the wiring board of this invention. 本発明の配線基板の実施の形態の一例を示す要部拡大平面図である。It is a principal part enlarged plan view which shows an example of embodiment of the wiring board of this invention. 本発明の配線基板の実施の形態の一例を示す部分拡大断面図である。It is a partial expanded sectional view which shows an example of embodiment of the wiring board of this invention. 従来の配線基板の一例を示す断面図である。It is sectional drawing which shows an example of the conventional wiring board. 従来の配線基板の一例を示す要部拡大平面図である。It is a principal part enlarged plan view which shows an example of the conventional wiring board.

符号の説明Explanation of symbols

1・・・配線基板
2・・・絶縁基板
2a〜2f・・・絶縁層
3・・・信号配線群
4・・・接地導体層
5・・・半導体素子
6・・・導体バンプ
7・・・電極パッド
8・・・差動線路
8a,8b・・・線路導体
9・・・差動貫通導体
9a,9b・・・信号貫通導体
10・・・接地貫通導体
12・・・接続線路部
13・・・差動線路と接続線路部との成す角度
DESCRIPTION OF SYMBOLS 1 ... Wiring board 2 ... Insulating board 2a-2f ... Insulating layer 3 ... Signal wiring group 4 ... Grounding conductor layer 5 ... Semiconductor element 6 ... Conductor bump 7 ... Electrode pads 8... Differential lines 8 a and 8 b... Line conductor 9. Differential through conductors 9 a and 9 b... Signal through conductor 10. ..An angle formed by the differential line and the connecting line part

Claims (3)

絶縁基板と、
前記絶縁基板に平行に形成された一対の線路導体を有する差動線路と、
前記絶縁基板に形成され、前記一対の線路導体に電気的に接続された一対の信号貫通導体を有し、該一対の信号貫通導体の間隔が、前記一対の線路導体の間隔よりも大きい差動貫通導体と、
前記絶縁基板における前記差動線路の上下に該差動線路から離間して配置された一対の接地導体層と
を有し、
前記差動線路は、前記一対の線路導体と前記一対の信号貫通導体とを接続する一対の接続線路部を有し、該一対の接続線路部は、平面視して、それぞれが前記線路導体と90度を超える角度をなし、
前記一対の接地導体層は、少なくとも一方が、平面視して、前記一対の信号貫通導体を内側に取り囲む環状の外周部を有する開口部を備え、
前記差動線路は、平面視して、前記環状の外周部から前記信号貫通導体との接続部までの長さが最小となるように形成されている配線基板。
An insulating substrate;
A differential line having a pair of line conductors formed in parallel to the insulating substrate;
A differential having a pair of signal through conductors formed on the insulating substrate and electrically connected to the pair of line conductors, wherein a distance between the pair of signal through conductors is larger than a distance between the pair of line conductors. A through conductor,
A pair of ground conductor layers disposed above and below the differential line in the insulating substrate and spaced apart from the differential line;
The differential line has a pair of connection line portions that connect the pair of line conductors and the pair of signal penetration conductors, and the pair of connection line portions are each in plan view, Make an angle of over 90 degrees,
At least one of the pair of ground conductor layers includes an opening having an annular outer peripheral portion that surrounds the pair of signal penetration conductors in a plan view,
The differential line is a wiring board formed to have a minimum length from the annular outer peripheral portion to the connection portion with the signal through conductor in plan view.
前記接続線路部は、その長さが使用周波数帯域の上限周波数の波長の1/4以下である請求項1記載の配線基板。   The wiring board according to claim 1, wherein the connection line portion has a length that is ¼ or less of a wavelength of an upper limit frequency of a use frequency band. 前記絶縁基板に前記外周部に沿って設けられ、前記一対の接地導体層を接続する接地用導体部を有し、
前記接地用導体部は、その一部が前記信号貫通導体を中心とする円に沿って形成されている請求項1または請求項2に記載の配線基板。
Provided along the outer peripheral portion on the insulating substrate, and having a grounding conductor portion for connecting the pair of ground conductor layers,
The wiring substrate according to claim 1, wherein a part of the grounding conductor portion is formed along a circle centered on the signal through conductor.
JP2008236802A 2008-09-16 2008-09-16 Wiring substrate Pending JP2009004809A (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010212617A (en) * 2009-03-12 2010-09-24 Sumitomo Electric Ind Ltd Flexible wiring board
JP2011095191A (en) * 2009-10-30 2011-05-12 Kyocer Slc Technologies Corp Measuring method of high-frequency signal transmission characteristic of wiring board, and the wiring board used therefor
JP2012033777A (en) * 2010-07-30 2012-02-16 Kyocer Slc Technologies Corp Wiring board
US10541216B2 (en) 2017-12-21 2020-01-21 Renesas Electronics Corporation Semiconductor device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05206678A (en) * 1992-01-28 1993-08-13 Nec Corp Multilayer interconnection board
JPH1117413A (en) * 1997-06-26 1999-01-22 Mitsubishi Electric Corp Strip line power feeding device
JPH1174644A (en) * 1997-06-24 1999-03-16 Advantest Corp Multilayer printed wiring board and automatic wiring method therefor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05206678A (en) * 1992-01-28 1993-08-13 Nec Corp Multilayer interconnection board
JPH1174644A (en) * 1997-06-24 1999-03-16 Advantest Corp Multilayer printed wiring board and automatic wiring method therefor
JPH1117413A (en) * 1997-06-26 1999-01-22 Mitsubishi Electric Corp Strip line power feeding device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010212617A (en) * 2009-03-12 2010-09-24 Sumitomo Electric Ind Ltd Flexible wiring board
JP2011095191A (en) * 2009-10-30 2011-05-12 Kyocer Slc Technologies Corp Measuring method of high-frequency signal transmission characteristic of wiring board, and the wiring board used therefor
JP2012033777A (en) * 2010-07-30 2012-02-16 Kyocer Slc Technologies Corp Wiring board
US10541216B2 (en) 2017-12-21 2020-01-21 Renesas Electronics Corporation Semiconductor device

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