JPH05206678A - Multilayer interconnection board - Google Patents
Multilayer interconnection boardInfo
- Publication number
- JPH05206678A JPH05206678A JP1327892A JP1327892A JPH05206678A JP H05206678 A JPH05206678 A JP H05206678A JP 1327892 A JP1327892 A JP 1327892A JP 1327892 A JP1327892 A JP 1327892A JP H05206678 A JPH05206678 A JP H05206678A
- Authority
- JP
- Japan
- Prior art keywords
- hole
- signal
- holes
- ground
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
Landscapes
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、多層配線基板に利用さ
れ、特に、多層セラミック配線基板のスルーホールの配
線構造に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is applied to a multilayer wiring board, and more particularly to a through hole wiring structure of a multilayer ceramic wiring board.
【０００２】[0002]
【従来の技術】超大型コンピュータ等に用いられる多層
配線セラミック基板内の配線は、従来、クロストーク係
数の低減および特性インピーダンスの安定化のため、配
線構造は直交した２層の信号線層ペアを接地層または電
源層ではさんだストリップ構造をとるのが一般的であ
る。2. Description of the Related Art Conventionally, wiring in a multilayer wiring ceramic substrate used in a super-large-sized computer or the like has a wiring structure of two signal line layer pairs orthogonal to each other in order to reduce a crosstalk coefficient and stabilize characteristic impedance. It is common to take a strip structure sandwiched between the ground layer and the power layer.
【０００３】従来、スルーホール部分については前述の
配線部分のように特に遮蔽構造ではなく、図３のように
信号スルーホール２１のまわりたかだか上下左右４個程
度の接地スルーホール２２が配置されている構造を有し
ていた。Conventionally, the through-hole portion is not a shield structure like the above-mentioned wiring portion, but about four ground through-holes 22 are arranged around the signal through-hole 21 as shown in FIG. Had a structure.
【０００４】[0004]
【発明が解決しようとする課題】前述した従来の多層配
線セラミック基板のように、スルーホール部分が遮蔽構
造となっていない構造でも、これまではこの部分の距離
が短いこともあり特に問題になっていなかった。しか
し、近年の配線基板の高密度化による配線間隙の減少、
基板厚の増大、およびクロックサイクルの高速化によっ
て、スルーホール部分の線路特性が問題となりつつあ
る。Even in the structure in which the through hole portion does not have the shielding structure like the above-mentioned conventional multilayer wiring ceramic substrate, the distance in this portion is short so far, which is a particular problem. I didn't. However, due to the high density of wiring boards in recent years, the reduction of wiring gap,
Due to the increase of the substrate thickness and the speeding up of the clock cycle, the line characteristic of the through hole part is becoming a problem.
【０００５】すなわち、従来の図３のような、信号スル
ーホール２１のまわりの４個程度の接地スルーホール２
２では、他の信号スルーホールおよび層内の信号配線２
３との相互のクロストーク雑音が大きく、また特性イン
ピーダンスの不安定さによって信号波形の乱れを生じる
課題が生じてきた。That is, about four ground through holes 2 around the signal through hole 21 as shown in FIG. 3 of the related art.
2, the other signal through hole and the signal wiring 2 in the layer
There is a problem that the crosstalk noise with the signal No. 3 is large and the signal waveform is disturbed due to the instability of the characteristic impedance.
【０００６】本発明の目的は、前記の課題を解決するこ
とにより、スルーホール部分のクロストーク雑音を減少
させ、特性インピーダンスの安定化を図った多層配線基
板を提供することにある。An object of the present invention is to solve the above problems by providing a multilayer wiring board in which the crosstalk noise in the through hole portion is reduced and the characteristic impedance is stabilized.
【０００７】[0007]
【課題を解決するための手段】本発明は、信号配線を接
続する信号スルーホールと、この信号スルーホールのま
わりに配置された複数の接地スルーホールまたは電源ス
ルーホールから構成された遮蔽スルーホールとを有する
多層配線基板において、前記遮蔽スルーホールの個数は
５個以上であることを特徴とする。According to the present invention, there is provided a signal through hole for connecting signal wiring, and a shield through hole composed of a plurality of ground through holes or power through holes arranged around the signal through hole. In the multi-layer wiring board having, the number of the shield through holes is 5 or more.
【０００８】また、本発明は、前記遮蔽スルーホールの
直径は前記信号スルーホールの直径よりも小であること
ができる。Further, according to the present invention, the diameter of the shield through hole may be smaller than the diameter of the signal through hole.
【０００９】また、本発明は、前記多層配線基板は多層
セラミック配線基板であることが好ましい。Further, in the present invention, it is preferable that the multilayer wiring board is a multilayer ceramic wiring board.
【００１０】[0010]
【作用】信号スルーホールのまわりに配置される遮蔽ス
ルーホールの個数とクロストーク雑音の関係を調べた結
果、遮蔽を十分にするには遮蔽スルーホールの個数は５
個以上必要なことが判明した（図２参照）。As a result of examining the relationship between the number of shielded through holes arranged around the signal through holes and the crosstalk noise, the number of shielded through holes is 5 in order to sufficiently shield the shield.
It was found that more than one is required (see Fig. 2).
【００１１】さらに、信号配線と信号スルーホールの間
隔、および信号スルーホール同士の間隔が小さい場合に
は、遮蔽スルーホールの直径を信号スルーホールの直径
よりも小さくすることで、遮蔽スルーホールの個数を容
易に増やすことができ、遮蔽効果を上げることができ
る。Further, when the distance between the signal wiring and the signal through hole and the distance between the signal through holes are small, the diameter of the shield through hole is made smaller than the diameter of the signal through hole to thereby reduce the number of shield through holes. Can be easily increased and the shielding effect can be enhanced.
【００１２】また、多層配線基板としては、多層セラミ
ック基板において最も効果的である。As a multilayer wiring board, a multilayer ceramic board is most effective.
【００１３】[0013]
【実施例】以下、本発明の実施例について図面を参照し
て説明する。Embodiments of the present invention will be described below with reference to the drawings.
【００１４】図１は本発明の一実施例におけるスルーホ
ールの配線構造を示す図である。FIG. 1 is a diagram showing a wiring structure of through holes in an embodiment of the present invention.
【００１５】本実施例は、信号配線１３を接続する信号
スルーホール１１と、信号スルーホール１１のまわりに
配置された複数の遮蔽スルーホールとを有する多層配線
セラミック基板において、本発明の特徴とするところ
の、前記遮蔽スルーホールは、８個の接地スルーホール
１２から構成されている。The present embodiment is a feature of the present invention in a multilayer wiring ceramic substrate having a signal through hole 11 for connecting the signal wiring 13 and a plurality of shield through holes arranged around the signal through hole 11. However, the shield through hole is composed of eight ground through holes 12.
【００１６】そして、信号スルーホール１１の直径は
０．２５ｍｍであるのに対し、接地スルーホール１２の
直径は０．１ｍｍで、各接地スルーホール１２は、信号
スルーホール１１のまわりに、信号スルーホールを中心
とする円周上に等間隔に配置される。While the diameter of the signal through hole 11 is 0.25 mm, the diameter of the ground through hole 12 is 0.1 mm, and each ground through hole 12 has a signal through hole around the signal through hole 11. They are arranged at equal intervals on the circumference centered on the hole.
【００１７】図２は図１の構造において、接地スルーホ
ール１２の個数とクロストークの関係を示す特性図であ
る。FIG. 2 is a characteristic diagram showing the relationship between the number of ground through holes 12 and crosstalk in the structure of FIG.
【００１８】図２から明らかなように、接地スルーホー
ル１２の個数が５個以上であれば、クロストーク量は何
もない場合に対して半分以下に減少し、その効果を上げ
ることができる。As is apparent from FIG. 2, when the number of ground through holes 12 is 5 or more, the amount of crosstalk is reduced to less than half that in the case where there is nothing, and the effect can be improved.
【００１９】次に、本実施例の製造方法について説明す
る。Next, the manufacturing method of this embodiment will be described.
【００２０】初めに、アルミナの粉体と固形化のための
バインダーとの混合粉に分散剤および可塑剤等の有機溶
剤とを加えて混合し十分に攪拌しスラリー化する。バイ
ンダーとしてはセルロース系（メチルセルロースおよび
エチルセルロース）、ポリビニルアルコール、アクリル
系、ならびにポリビニルブチラール等が主に用いられ
る。分散剤としては非イオン系界面活性剤が、可塑剤と
してはジブチルフタレート、ジオクチルフタレートおよ
びグリセリン等が用いられる。First, an organic solvent such as a dispersant and a plasticizer is added to and mixed with a mixed powder of alumina powder and a binder for solidification, and sufficiently stirred to form a slurry. Cellulose (methyl cellulose and ethyl cellulose), polyvinyl alcohol, acrylic, polyvinyl butyral, etc. are mainly used as the binder. A nonionic surfactant is used as the dispersant, and dibutyl phthalate, dioctyl phthalate, glycerin and the like are used as the plasticizer.
【００２１】セラミックグリーンシートを作成する方法
にはいくつかあるが、ここでは薄いシートを形成するの
に適しているドクターブレード法によっている。この方
法は前記のスラリーをドクターブレードと呼ばれるナイ
フと連続したフィルムとのギャップによってキャスティ
ングを行い、熱風乾燥させフィルム上にグリーンシート
を形成する方法である。この方法では、シート厚は約
０．０３〜１ｍｍの間で可能である。本実施例では約
０．１ｍｍとし、キャスティングの幅は約１６０ｍｍと
した。この連続シートを約１５０ｍｍ□の大きさに切り
方形のグリーンシートとする。There are several methods of making ceramic green sheets, but here it is by the doctor blade method which is suitable for making thin sheets. In this method, the above slurry is cast by a gap between a knife called a doctor blade and a continuous film, and dried with hot air to form a green sheet on the film. In this way, sheet thicknesses of between about 0.03 and 1 mm are possible. In this embodiment, the casting width is about 0.1 mm and the casting width is about 160 mm. This continuous sheet is cut into a rectangular green sheet having a size of about 150 mm □.
【００２２】前述の方法で製造されたシートは、この後
の工程での位置合わせのために金属製の枠に張り付け
る。以降枠と突き当てピンとの突き合わせによって位置
合わせを行う。位置合わせの方法にはこの他にもシート
に空けた穴とガイドピンによる方法があるが、本方法に
比べてシートの収縮の影響を受けやすくずれが起こりや
すい。The sheet manufactured by the above method is attached to a metal frame for alignment in the subsequent steps. After that, the alignment is performed by butting the frame and the butting pin. In addition to this method, there is a method using a hole formed in the sheet and a guide pin, but compared to this method, the sheet is more likely to be affected by contraction and is more likely to be displaced.
【００２３】次に、シートにスルーホール孔を、ピンと
金型の組み合わせで形成する。このとき空けるべき孔の
様子を示した図が図１である。シート全体のスルーホー
ル数は信号スルーホール１１が計約１０００個、直径は
０．２５ｍｍである。各信号スルーホール１１ごとに８
個ずつの接地スルーホール１２を有している。接地スル
ーホール１２は計約８０００個、直径は配線との間隙を
考慮し０．１ｍｍと信号スルーホール１１より小さくし
た。信号スルーホール１１間のピッチをここでは従来基
板と同様に２．５５ｍｍとしているが、接地スルーホー
ル１２と信号配線１３との間隙が小さくなるため、信頼
性を考慮するとピッチを多少大きめにするのもよい。な
おここで述べた数値は基板焼成後の値である。セラミッ
ク基板においては通常焼き上がり後１０〜１５％程度の
収縮が起こるため、実際にシートに空ける際の大きさは
ここで述べた数値に対して収縮率に応じた拡大率をかけ
る必要がある。Next, through holes are formed in the sheet by a combination of pins and molds. FIG. 1 is a diagram showing a state of holes to be formed at this time. The total number of through holes in the sheet is about 1000 signal through holes 11 and the diameter is 0.25 mm. 8 for each signal through hole 11
Each has ground through holes 12. The ground through-holes 12 were about 8000 in total, and the diameter was 0.1 mm smaller than the signal through-holes 11 in consideration of the gap with the wiring. Although the pitch between the signal through holes 11 is 2.55 mm here as in the conventional substrate, the gap between the ground through hole 12 and the signal wiring 13 becomes small. Therefore, the pitch should be made slightly larger in consideration of reliability. Good. Note that the numerical values described here are the values after firing the substrate. Since shrinkage of about 10 to 15% usually occurs in a ceramic substrate after baking, the size when actually vacating the sheet needs to be multiplied by the expansion ratio according to the shrinkage ratio with respect to the numerical value described here.
【００２４】スルーホール形成の後、厚膜印刷法で全て
のスルーホール中への導体ペーストの埋め込みと、シー
ト表面の所定の信号配線１３のパターン形成とを行う。
印刷のペースト材料にはセラミックの焼成温度を考慮
し、融点の高いタングステン（Ｗ）やモリブデン（Ｍ
ｏ）を用いる。この際信号配線１３と接地スルーホール
１２との間の間隙が従来基板に比べ減少しており、十分
な位置合わせを行いずれを生じさせないことが重要であ
る。After forming the through holes, the conductor paste is embedded in all the through holes by the thick film printing method, and the pattern of the predetermined signal wiring 13 on the surface of the sheet is formed.
Considering the firing temperature of ceramics, the paste material for printing has high melting points such as tungsten (W) and molybdenum (M
o) is used. At this time, the gap between the signal wiring 13 and the ground through hole 12 is smaller than that of the conventional substrate, and it is important that sufficient alignment is not caused.
【００２５】こうして製造された印刷後のセラミックグ
リーンシートを、積層工程にて正確に１４０ｍｍ□に切
断し、ずれの無いように積層する。積層シート枚数はこ
こでは基板一枚あたり８０枚としている。The thus-printed ceramic green sheets after printing are accurately cut into 140 mm square in the laminating step and laminated so that there is no deviation. Here, the number of laminated sheets is 80 per substrate.
【００２６】この後さらに、熱プレス法により複数シー
トの一体化形成を行い積層体にする。プレスの条件は圧
力１５０ｋｇ／ｃｍ2 、温度１００℃、時間約１時間で
ある。この工程で大きさ約１４０ｍｍ□、厚さ約７ｍｍ
の生積層基板ができあがる。Thereafter, a plurality of sheets are integrally formed by a hot pressing method to form a laminated body. The press conditions are a pressure of 150 kg / cm 2 , a temperature of 100 ° C., and a time of about 1 hour. In this process, the size is about 140 mm □ and the thickness is about 7 mm
The raw laminated substrate of is completed.
【００２７】最後に、１５００℃程度で生積層基板の脱
バインダー焼成を行い多層配線セラミック基板を得る。Finally, the green laminated substrate is subjected to binder removal firing at about 1500 ° C. to obtain a multilayer wiring ceramic substrate.
【００２８】本発明による前記構造の多層配線セラミッ
ク基板のクロストーク雑音は、図２に示すように低減さ
れ、ＭＨZ オーダーの信号であれば相互にまったく問題
にならない程度まで低下している。またインピーダンス
特性はスルーホール部分が配線部分と同程度に安定化し
ている。信号スルーホール１１と接地スルーホール１２
の直径および相互位置を適当な値とすれば、回路上要求
される特性インピーダンス例えば４０Ωおよび５０Ωは
問題なく実現できる。The crosstalk noise of the multilayer wiring ceramic substrate having the above-mentioned structure according to the present invention is reduced as shown in FIG. 2 and is reduced to such an extent that signals of the MH Z order do not cause any problem with each other. In addition, the impedance characteristics of the through hole are stabilized to the same extent as the wiring. Signal through hole 11 and ground through hole 12
The characteristic impedances required for the circuit, such as 40Ω and 50Ω, can be realized without any problem if the diameters and mutual positions of the two are set to appropriate values.
【００２９】なお、以上の説明は、遮蔽スルーホール
が、接地スルーホールであるとしたけれども、これは電
源が正電源の場合であって、電源が負電源の場合には接
地スルーホールの代わりに電源スルーホールが用いら
れ、その効果は同様である。In the above description, the shield through hole is the ground through hole, but this is the case where the power source is a positive power source and the power source is a negative power source, instead of the ground through hole. A power through hole is used and the effect is similar.
【００３０】また、多層配線基板としては多層セラミッ
ク配線基板を取り上げたけれども、多層プリント配線基
板でも同様である。Although a multilayer ceramic wiring board is taken as the multilayer wiring board, the same applies to a multilayer printed wiring board.
【００３１】[0031]
【発明の効果】以上説明したように、本発明は、信号ス
ルーホールのまわりに遮蔽スルーホールを５個以上設け
ることにより、信号伝搬の際のクロストーク特性の改善
や特性インピーダンスの安定化を図ることができる効果
がある。As described above, according to the present invention, by providing five or more shield through holes around the signal through hole, the crosstalk characteristic during signal propagation is improved and the characteristic impedance is stabilized. There is an effect that can be.
【図１】本発明の一実施例のスルーホール構造を示す
図。FIG. 1 is a diagram showing a through hole structure according to an embodiment of the present invention.
【図２】接地スルーホールの個数に対するクロストーク
雑音の関係を示す特性図。FIG. 2 is a characteristic diagram showing a relationship between crosstalk noise and the number of ground through holes.
【図３】従来例のスルーホール構造を示す図。FIG. 3 is a diagram showing a conventional through-hole structure.
１１、２１ 信号スルーホール １２、２２ 接地スルーホール １３、２３ 信号配線 11, 21 Signal through hole 12, 22 Ground through hole 13, 23 Signal wiring
Claims (3)
と、この信号スルーホールのまわりに配置された複数の
接地スルーホールまたは電源スルーホールから構成され
た遮蔽スルーホールとを有する多層配線基板において、 前記遮蔽スルーホールの個数は５個以上であることを特
徴とする多層配線基板。1. A multilayer wiring board having a signal through hole for connecting a signal wiring and a shield through hole composed of a plurality of ground through holes or power supply through holes arranged around the signal through hole, A multilayer wiring board characterized in that the number of shielding through holes is 5 or more.
スルーホールの直径よりも小である請求項１記載の多層
配線基板。2. The multilayer wiring board according to claim 1, wherein a diameter of the shield through hole is smaller than a diameter of the signal through hole.
基板である請求項１または請求項２記載の多層配線基
板。3. The multilayer wiring board according to claim 1, wherein the multilayer wiring board is a multilayer ceramic wiring board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1327892A JPH05206678A (en) | 1992-01-28 | 1992-01-28 | Multilayer interconnection board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1327892A JPH05206678A (en) | 1992-01-28 | 1992-01-28 | Multilayer interconnection board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05206678A true JPH05206678A (en) | 1993-08-13 |
Family
ID=11828738
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1327892A Pending JPH05206678A (en) | 1992-01-28 | 1992-01-28 | Multilayer interconnection board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05206678A (en) |
Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998027793A1 (en) * | 1996-12-16 | 1998-06-25 | Telefonaktiebolaget Lm Ericsson | Connector assembly, and associated method, for radio frequency circuit device |
| GB2343298A (en) * | 1998-10-29 | 2000-05-03 | Hewlett Packard Co | Circuit board via connections |
| US6392164B1 (en) | 1998-10-16 | 2002-05-21 | Matsushita Electric Industrial Co., Ltd. | Multi-level circuit substrate, method for manufacturing same and method for adjusting a characteristic impedance therefor |
| US6700789B2 (en) | 2002-01-07 | 2004-03-02 | Kyocera Corporation | High-frequency wiring board |
| JP2005108893A (en) * | 2003-09-26 | 2005-04-21 | Kyocera Corp | Wiring board |
| US7372143B2 (en) | 2003-06-09 | 2008-05-13 | Fujitsu Limited | Printed circuit board including via contributing to superior characteristic impedance |
| JP2008524845A (en) * | 2004-12-17 | 2008-07-10 | アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド | High frequency multilayer printed circuit board including through connection |
| JP2008311682A (en) * | 2008-09-16 | 2008-12-25 | Kyocera Corp | Wiring board |
| JP2009004809A (en) * | 2008-09-16 | 2009-01-08 | Kyocera Corp | Wiring substrate |
| JP2009021511A (en) * | 2007-07-13 | 2009-01-29 | Ricoh Co Ltd | Printed wiring board, and electronic device |
| US8319345B2 (en) | 2009-09-11 | 2012-11-27 | Hitachi, Ltd. | Semiconductor packaging substrate and semiconductor device |
| JP2014505909A (en) * | 2010-06-07 | 2014-03-06 | ジェイソン・エイ・サリヴァン | Miniaturization techniques, systems, and devices related to power supplies, memories, interconnects, and LEDs |
| JP2016100579A (en) * | 2014-11-26 | 2016-05-30 | 京セラサーキットソリューションズ株式会社 | Wiring board |
| US9606577B2 (en) | 2002-10-22 | 2017-03-28 | Atd Ventures Llc | Systems and methods for providing a dynamically modular processing unit |
| US9961788B2 (en) | 2002-10-22 | 2018-05-01 | Atd Ventures, Llc | Non-peripherals processing control module having improved heat dissipating properties |
| CN108076580A (en) * | 2016-11-15 | 2018-05-25 | 中兴通讯股份有限公司 | The method and device of crosstalk between a kind of isolation signals via |
| US10285293B2 (en) | 2002-10-22 | 2019-05-07 | Atd Ventures, Llc | Systems and methods for providing a robust computer processing unit |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6214489A (en) * | 1985-07-12 | 1987-01-23 | 大倉電気株式会社 | High frequency connection line for printed wiring board |
| JPH01119096A (en) * | 1987-10-31 | 1989-05-11 | Mitsumi Electric Co Ltd | Circuit board with shielding plate therein |
| JPH02226801A (en) * | 1989-02-28 | 1990-09-10 | Nec Corp | Distributed constant type transmission line |
-
1992
- 1992-01-28 JP JP1327892A patent/JPH05206678A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6214489A (en) * | 1985-07-12 | 1987-01-23 | 大倉電気株式会社 | High frequency connection line for printed wiring board |
| JPH01119096A (en) * | 1987-10-31 | 1989-05-11 | Mitsumi Electric Co Ltd | Circuit board with shielding plate therein |
| JPH02226801A (en) * | 1989-02-28 | 1990-09-10 | Nec Corp | Distributed constant type transmission line |
Cited By (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998027793A1 (en) * | 1996-12-16 | 1998-06-25 | Telefonaktiebolaget Lm Ericsson | Connector assembly, and associated method, for radio frequency circuit device |
| GB2335083A (en) * | 1996-12-16 | 1999-09-08 | Ericsson Telefon Ab L M | Connector assembly, and associated method,for radio frequency circuit device |
| GB2335083B (en) * | 1996-12-16 | 2001-11-28 | Ericsson Telefon Ab L M | Connector assembly, and associated method,for radio frequency circuit device |
| US6392164B1 (en) | 1998-10-16 | 2002-05-21 | Matsushita Electric Industrial Co., Ltd. | Multi-level circuit substrate, method for manufacturing same and method for adjusting a characteristic impedance therefor |
| US6870264B2 (en) | 1998-10-16 | 2005-03-22 | Matsushita Electric Industrial Co., Ltd. | Multi-level circuit substrate, method for manufacturing same and method for adjusting a characteristic impedance therefor |
| GB2343298A (en) * | 1998-10-29 | 2000-05-03 | Hewlett Packard Co | Circuit board via connections |
| GB2343298B (en) * | 1998-10-29 | 2003-03-12 | Hewlett Packard Co | Microcircuit shielded controlled impedance gatling gun via |
| US6700789B2 (en) | 2002-01-07 | 2004-03-02 | Kyocera Corporation | High-frequency wiring board |
| US9606577B2 (en) | 2002-10-22 | 2017-03-28 | Atd Ventures Llc | Systems and methods for providing a dynamically modular processing unit |
| US11751350B2 (en) | 2002-10-22 | 2023-09-05 | Atd Ventures, Llc | Systems and methods for providing a robust computer processing unit |
| US10849245B2 (en) | 2002-10-22 | 2020-11-24 | Atd Ventures, Llc | Systems and methods for providing a robust computer processing unit |
| US10285293B2 (en) | 2002-10-22 | 2019-05-07 | Atd Ventures, Llc | Systems and methods for providing a robust computer processing unit |
| US9961788B2 (en) | 2002-10-22 | 2018-05-01 | Atd Ventures, Llc | Non-peripherals processing control module having improved heat dissipating properties |
| US7372143B2 (en) | 2003-06-09 | 2008-05-13 | Fujitsu Limited | Printed circuit board including via contributing to superior characteristic impedance |
| JP2005108893A (en) * | 2003-09-26 | 2005-04-21 | Kyocera Corp | Wiring board |
| JP2008524845A (en) * | 2004-12-17 | 2008-07-10 | アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド | High frequency multilayer printed circuit board including through connection |
| JP2009021511A (en) * | 2007-07-13 | 2009-01-29 | Ricoh Co Ltd | Printed wiring board, and electronic device |
| JP2009004809A (en) * | 2008-09-16 | 2009-01-08 | Kyocera Corp | Wiring substrate |
| JP2008311682A (en) * | 2008-09-16 | 2008-12-25 | Kyocera Corp | Wiring board |
| US8319345B2 (en) | 2009-09-11 | 2012-11-27 | Hitachi, Ltd. | Semiconductor packaging substrate and semiconductor device |
| EP2577421A4 (en) * | 2010-06-07 | 2016-07-20 | Jason A Sullivan | Miniturization techniques, systems, and apparatus relating to power supplies, memory, interconnections, and leds |
| JP2014505909A (en) * | 2010-06-07 | 2014-03-06 | ジェイソン・エイ・サリヴァン | Miniaturization techniques, systems, and devices related to power supplies, memories, interconnects, and LEDs |
| JP2016100579A (en) * | 2014-11-26 | 2016-05-30 | 京セラサーキットソリューションズ株式会社 | Wiring board |
| CN108076580A (en) * | 2016-11-15 | 2018-05-25 | 中兴通讯股份有限公司 | The method and device of crosstalk between a kind of isolation signals via |
| CN108076580B (en) * | 2016-11-15 | 2021-01-22 | 中兴通讯股份有限公司 | Method and device for isolating crosstalk between signal via holes |
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