JPH1174644A - Multilayer printed wiring board and automatic wiring method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a pair pattern advantageous for waveform quality by employing a pair pattern transmission line for differential signal and disposing one pattern oppositely to an adjacent layer thereby suppressing the effect of noise. SOLUTION: Transmission line of difference signal is wired in pair pattern with one pattern being disposed oppositely to an adjacent layer. When a pair pattern is wired automatically on a multilayer printed wiring board, designation of the estimated pattern width and pattern layer, coordinate of pad position, or the like, are inputted. The estimated pattern width is one half of the design width determined according to conditions of the permittivity, the thickness, or the like, of an insulator in the wiring board and conditions for limiting the wiring of pair pattern onto the wiring board are inputted. Subsequently, automatic wiring program is executed and designation of pattern layer for one estimated pattern data of the estimated pair pattern is altered to an adjacent layer. For example, designation of pattern layer for estimated pattern 420 is altered to a third pattern layer 13.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed circuit board having a pair pattern provided between adjacent layers and a method of automatically wiring the same.

[0002]

2. Description of the Related Art An example of the prior art will be described with reference to FIGS. First, the relationship between the pair pattern of the printed wiring board and the differential signal transmission circuit will be described.

As shown in FIG. 6, a differential driver U1
The receiver U2 has a differential input / output terminal. The differential signal transmission circuit transmits the differential output signals of pins 2 and 3 of the driver U1 via the transmission lines 100 and 200, receives the signals at pins 4 and 5 of the receiver U2, and outputs the output pins of the 6 pins. The difference signal is output to 300.

[0004] For example, as shown in FIG. 7, when noise is present on two transmission lines 100 and 200, the noise level of the difference is output to an output line 300.

Therefore, if there is a difference in length between two transmission lines transmitting differential input / output signals, a difference in delay time occurs, and if the signal lines are far apart, a noise level difference between the lines will occur. And the noise level of the differential output also increases.

Accordingly, in order to form two transmission lines as a pair pattern on a printed wiring board to form a pattern wiring with little influence of noise, the two patterns are made equal in length.
In addition, it is desirable that the wiring be performed as close as possible to each other.

Next, a method of automatically wiring a pair pattern using the automatic wiring function of CAD will be described in a bulleted form with reference to a flowchart shown in FIG. Here, CAD (Computer Aided / Assisted Design) means designing with computer assistance.

(1) Design conditions for wiring a pair pattern,
For example, the coordinates of the pad position and the pattern width are input (step 201). The coordinates of the pad position are automatically generated by a CAD automatic arrangement program or manually input. The pattern width is determined by conditions such as the dielectric constant and the thickness of the insulating layer of the printed wiring board. For example, as shown in FIG. 8, each pattern width of the pattern 130 and the pattern 240 is 0.11 mm.

(2) Then, a restriction condition for wiring a pair pattern on a printed wiring board is input (step 202). For example, as shown in FIG.
And the clearance between pad P5 is 0.185 mm
It is. Also, a pattern 130 that becomes a pair pattern,
The minimum gap with the pattern 240 is 0.15 mm. These clearance and minimum gap limits are:
It is determined from electrical conditions such as withstand voltage and impedance.

(3) Next, when an automatic wiring program is executed, data of a pair pattern is automatically generated (step 203). For example, as shown in FIG. 10, in the same pattern layer of the printed wiring board, wiring of a pair pattern having the same length is completed. FIG. 9 shows an example of a cross-sectional view when a pair pattern is formed on a printed wiring board from the wiring of the pair pattern. Generally, in the pair pattern, the pattern on the opposite side of the insulating layer is a solid pattern of ground or a power supply in order to keep the characteristic impedance of the transmission line constant.

Therefore, as shown in FIG. 8, the pattern 130 and the pattern 240 constituting the pair pattern can pass if the space between the pad P5 and the pad P6 is 0.74 mm or more. However, if the space between the pad P5 and the pad P6 is not 0.74 mm, the pair pattern bypasses both patterns or only one pattern.

In this case, the length of the pair pattern becomes longer, or the gap between the pair patterns becomes wider, and the noise difference becomes larger, which is not preferable.

[0013]

SUMMARY OF THE INVENTION As described above, C
In the automatic wiring function of AD, an equal-length pair pattern can be automatically wired in the same layer of a printed wiring board.
It is limited by the clearance between the pattern and the pad and the gap between the patterns. Therefore, when the pad cannot be passed between the narrow pads, the pair pattern is detoured, so that the pair pattern becomes long, and the widening of the gap between the pair patterns is likely to cause noise, so that there is a practical difficulty.

The present invention has been made in view of such a problem, and has as its object to provide a multilayer printed wiring board provided with a pair pattern which is hardly affected by noise and has good waveform quality, and an automatic wiring method thereof. It is in.

[0015]

That is, a first aspect of the present invention, which has been made to achieve the above object, is to provide a multilayer printed wiring board in which transmission lines for differential signals are wired as a pair pattern. The multi-layer printed wiring board is characterized in that the pattern is provided so as to be opposed to an adjacent layer.

In order to achieve the above object, a second aspect of the present invention is an automatic wiring method of a multilayer printed wiring board for generating wiring of a pair pattern by CAD.
(1) Set the virtual pattern width of the pair pattern to half the design value width and set the gap between the two virtual patterns to 0, generate wiring data on the same pattern layer by an automatic wiring program, and (2) divide the wiring data. Then, one virtual pattern is used as the data of the layer and the other virtual pattern is used as the data of the adjacent layer. (3) The data of the virtual pattern width of the pair pattern is changed to the design value width, and the interlayer pair pattern is changed as described above. The gist is an automatic wiring method for a multilayer printed wiring board to be generated.

In order to achieve the above object, a third aspect of the present invention is to provide an automatic wiring method for a multilayer printed wiring board in which wiring of a pair pattern is generated by CAD. Wiring data is generated by an automatic wiring program, (2) all coordinate data of the wiring data are extracted, and (3) coordinate data of the other pattern of the pair pattern in the adjacent layer is based on one end of one coordinate. At this time, the coordinate from the second coordinate to the last coordinate minus the first coordinate is the same as the coordinate data of one of the pair patterns, and the automatic wiring method of the multilayer printed wiring board for generating the interlayer pair pattern is described as a gist. I have.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described in the following examples.

[0019]

【Example】

(Embodiment 1) Embodiment 1 of the present invention will be described with reference to FIGS. First, a first example of a method of automatically wiring a pair pattern on a multilayer printed wiring board using the automatic wiring function of CAD will be described with reference to the flowchart of FIG.

(1) Design conditions for wiring a virtual pair pattern, that is, a virtual pattern width, a designation of a pattern layer,
The coordinates of the pad position are input (step 101). Here, the virtual pair pattern is a pair pattern having a virtual pattern width and a gap between virtual patterns of 0. The virtual pattern width is half the design width determined by conditions such as the dielectric constant and thickness of the insulator of the multilayer printed wiring board. For example, as shown in FIG. 3, when the design pattern width of each of the virtual pattern 310 and the virtual pattern 420 is 0.11 mm, the virtual pattern width is reduced to half, that is, 0.055 mm. The designation of the pattern layer designates one of the pattern layers for performing the pair pattern wiring on the multilayer printed wiring board. The coordinates of the pad position are automatically generated by a CAD automatic arrangement program or manually input.

(2) Then, a restriction condition for wiring a pair pattern on the multilayer printed wiring board is input (step 102). For example, as shown in FIG. 3, the clearance between the virtual pattern 310 and the pad P5 is 0.185 m.
m. The limitation on the clearance is determined by the manufacturing conditions of the printed wiring board and the electrical conditions such as withstand voltage and impedance. However, the minimum gap between the virtual pattern 310, which is a virtual pair pattern, and the virtual pattern 420 is virtually Omm.

(3) Next, when an automatic wiring program is executed, virtual pair pattern data is automatically generated (step 103). For example, as shown in FIG. 3, in the same pattern layer of the printed wiring board, virtual pair pattern wiring having the same length is generated. This virtual pair pattern wiring is virtually as shown in FIG. 2 as a cross-sectional view of the multilayer printed wiring board. However, the multilayer printed wiring board in FIG. 2 is a virtual diagram for explanation, and is not actually created.

(4) Then, the pattern layer designation of one virtual pattern data of the virtual pair pattern is changed to the adjacent layer (step 104). For example, as shown in FIG. 2, when a virtual pair pattern is generated in the second pattern layer 12,
The pattern layer designation of the virtual pattern 420 is changed to the third pattern layer 13 without changing the data of the virtual pattern 310.

(5) Further, the width of the virtual pattern constituting the virtual pair pattern is changed to the design value (step 10).
5). For example, the virtual pattern 310 of the virtual pair pattern
And each virtual pattern width of the virtual pattern 420 is 0.055 m.
m is changed to a design pattern width of 0.11 mm.

(6) As a result, the data of the pattern 130 and the pattern 240 of the interlayer pair pattern are completed (step 106).

Therefore, in the method according to the present invention, as shown in FIG. 5, the pattern 130 and the pattern 240 constituting the pair pattern can be passed if the space between the pad P5 and the pad P6 is 0.48 mm or more. it can.

(Embodiment 2) A multilayer printed wiring board manufactured based on the data of an interlayer pair pattern will be described below with reference to FIG.

As shown in the sectional view of FIG. 1, a configuration example of the multilayer printed wiring board includes a first pattern layer 11, a first insulating layer 10, a second pattern layer 12, a second insulating layer 20,
Third pattern layer 13, third insulating layer 30, fourth pattern layer 14, pad P5, pad 6, pattern 13
0 and a pattern 240.

Here, the first pattern layer 11 and the fourth pattern layer 14 are a ground plane of the patterns 130 and 240 or a solid pattern of the power supply. Although not shown, the pattern 130 is connected to the pads P1 and P3, and the pattern 240 is connected to the pads P2 and P4.

For this reason, the pattern 130 of the second pattern layer 12 and the pattern 240 of the third pattern layer 13
This means that the second insulating layer 20 is provided so as to be vertically opposed to the second insulating layer 20. Therefore, the pattern 1 of the pair pattern
The pattern 30 and the pattern 240 are arranged so as to be hardly affected by external noise as compared with the conventional pattern in which a gap of 0.15 mm or more is required.

(Embodiment 3) Regarding Embodiment 3 of the present invention,
This will be described with reference to FIGS. A second example of a method of automatically wiring a pair pattern on a multilayer printed wiring board by using an automatic wiring function of CAD and program creation,
This will be described with reference to the flowchart of FIG. However, a detailed description common to the first embodiment is omitted.

(1) Design conditions for wiring a pair pattern,
That is, the pattern width, the designation of the pattern layer, the coordinates of the pad position, and the like are input (step 301). The designation of the pattern layer designates one of the pattern layers for performing the pair pattern wiring on the multilayer printed wiring board. The coordinates of the pad position are
Automatically generated by CAD automatic placement program or manually input.

(2) Then, a restriction condition for wiring a pair pattern on the multilayer printed wiring board is input (step 302).

(3) One of the pair patterns is selected (step 303). For example, the pattern 130 is selected from a pattern wired from the pad P1 to the pad P3 and a pattern wired from the pad P2 to the pad P4.

(4) Next, when the automatic wiring program is executed, one data of the pair pattern is automatically generated (step 304). For example, as shown in FIG. 12, data of one pattern 130 of a pair pattern is generated in the second pattern layer of the printed wiring board. The wiring pattern 130 includes wiring elements 131, 132, and 133 each of which includes two pieces of coordinate data. For example, the wiring element 131 includes two coordinate data of the coordinates (X1, Y1) and (X3, Y3) of the pad.

(4) Then, all the coordinate data of one of the pair patterns is extracted (step 305). For example,
As data of one pattern 130 of the pair pattern,
Coordinates (X1, Y1), (X3, Y3), (X4, Y4)
And (X5, Y5).

(5) Next, a program is executed based on one coordinate data of the pair pattern to generate the other data of the pair pattern in the adjacent layer (step 30).
6). In this case, the wiring element 1 at the end of the wiring pattern 130
31 (X1, Y1) and the coordinates (X
5, Y5) except for (X3, Y3), (X
4, Y4) are coordinate data of the other data of the pair pattern in the adjacent layer.

That is, as shown in FIG. 13, the coordinates (X2, Y2) connected to the pads of the wiring element 131 and the wiring element 133 of the other pattern 240 of the pair pattern 240 and the coordinates (X6, Y6) other than the coordinates (X6, Y6) X3, Y3), (X4,
Y4) is commonly used.

That is, when the coordinate data of the other pattern of the pair pattern is based on one end of one coordinate, the coordinate data of one pattern of the pair pattern is from the second coordinate to the last coordinate minus the first coordinate. It is the same as the data.

(6) As a result, the pattern 130 and pattern 240 data of the interlayer pair pattern are completed (step 307).

When a printed wiring board is prepared from the obtained data, a pattern 130 of the second pattern layer and a pattern 240 of the third pattern layer of the printed wiring board are formed as shown in FIG.

Therefore, in the method according to the second example of the present invention, as shown in FIG. 5, the pattern 130 and the pattern 240 forming the pair pattern are formed by the pad P5 and the pad P5.
If the space between 6 is equal to or larger than the clearance that allows one pattern wiring, it can be passed.

In the first to third embodiments, a pair pattern is described as an example. However, the present invention can be similarly implemented even when a printed wiring board has a large number of pair pattern wirings.

[0044]

The present invention is embodied in the form described above and has the following effects. That is,
Since the pattern is provided so as to oppose the pair pattern to two adjacent layers to make it less susceptible to external noise, the effect of high quality signal transmission is great. Also, since the pair pattern is divided into two layers, even if there is only one clearance for passing the pattern, only one of the pair patterns needs to be passed, so that there is an effect that high-density wiring can be performed. further,
Even in CAD in which automatic wiring of a pair pattern can be performed only in the same layer, there is an effect that it can be used as an automatic wiring function of a pair pattern in an adjacent layer.

[Brief description of the drawings]

FIG. 1 is a sectional view of a multilayer printed wiring board having a pair pattern according to the present invention.

FIG. 2 is an imaginary sectional view of the virtual pair pattern taken along the line AA in FIG. 3;

FIG. 3 is a plan view of a virtual pair pattern.

FIG. 4 is a flowchart of a first automatic wiring method according to the present invention.

FIG. 5 is a diagram in which one pattern passes between pads.

FIG. 6 is a circuit diagram for transmitting a differential signal.

FIG. 7 is a waveform diagram for transmitting a differential signal.

FIG. 8 is a diagram for passing a pair pattern between pads.

9 is a cross-sectional view of the conventional pair pattern taken along line BB of FIG. 8;

FIG. 10 is a plan view of a conventional pair pattern.

FIG. 11 is a flowchart of an automatic wiring method using CAD.

FIG. 12 is a plan view of one second pattern layer of the pair pattern.

FIG. 13 is a plan view of the other third pattern layer of the pair pattern.

FIG. 14 is a flowchart of a second automatic wiring method according to the present invention.

[Explanation of symbols]

 Reference Signs List 10 first insulating layer 11 first pattern layer 12 second pattern layer 13 third pattern layer 14 fourth pattern layer 20 second insulating layer 30 third insulating layer 130, 240 pattern 310, 420 virtual pattern P1, P2, P3, P4, P5, P6 pad

Claims (3)

[Claims] 1. A multilayer printed wiring board in which transmission lines for differential signals are wired as a pair pattern, wherein one of the pair patterns is provided so as to face an adjacent layer. 2. An automatic wiring method for a multilayer printed wiring board, wherein wiring of a pair pattern is generated by CAD.
(1) Set the virtual pattern width of the pair pattern to half of the design value width, set the gap between the two virtual patterns to 0, generate wiring data on the same pattern layer by an automatic wiring program, and (2) divide the wiring data. (3) changing the virtual pattern width data of the pair pattern to a design value width, and changing the interlayer pair pattern as described above. Automatic wiring method of the generated multilayer printed wiring board. 3. An automatic wiring method for a multilayer printed wiring board, wherein wiring of a pair pattern is generated by CAD.
(1) Wiring data is generated for one of the pair patterns by an automatic wiring program, (2) All coordinate data of the wiring data is extracted, and (3) The coordinate data of the other pattern of the pair pattern in the adjacent layer is With reference to one end of one of the coordinates, the coordinates from the second coordinate to the last coordinate minus the first coordinate are the same as the coordinate data of one of the pair patterns. Automatic wiring method for printed wiring boards.