JP2002217545A - Multilayer wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce both simultaneous switching noise and EMI noise in a multilayer wiring board, on which an electronic component operating at high speed is mounted. SOLUTION: In the multilayer wiring board 1, an electrode 9 for semiconductor-element connection is installed on the surface of an insulation board 2, an external electrode 8 is installed on the rear, and a power supply is supplied via an internal power supply or via built-in capacitors in which ground wiring layers 4 to 7 are formed, so as to be faced and arranged. In the board 1, the built-in capacitors are formed, in such a way that a plurality of built-in capacitors having different resonance frequencies in a range from the operating frequency band of a semiconductor element 10 up to a harmonic- component frequency band are connected in parallel, their synthetic impedance value, at an antiresonant frequency generated between the different resonance frequencies, is set at a prescribed value or lower, and at least one built-in capacitor has a capacitor electrode 12, which is arranged on the surface of the insulating board 2 facing the power supply or the ground wiring layer 4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-layer wiring board used for a semiconductor element housing package for housing a semiconductor element or an electronic circuit board on which a semiconductor element or an electronic component is mounted. The present invention relates to a multilayer wiring board having a wiring structure suitable for housing or mounting a semiconductor element.

[0002]

2. Description of the Related Art Conventionally, microprocessors and ASICs
(Application Specific Integrated Circuit) and other electronic components such as semiconductor elements are mounted on a multilayer wiring board used for an electronic circuit board or the like. Insulating layers made of ceramics and wiring conductor layers made of a refractory metal such as tungsten (W) are alternately laminated to form a multilayer wiring board.

On the other hand, as the demand for improving the information processing capability increases, as the operating speed of the semiconductor element increases and the number of simultaneous switching increases, the signal wiring among the wiring conductors for internal wiring has characteristic impedance. There has been a demand for improvements in electrical characteristics such as matching of signals and reduction of crosstalk noise between signal wirings. In order to cope with such a demand, the wiring structure of the signal wiring is a strip line structure, and a wide area power supply wiring layer or a ground (ground) wiring layer is formed above and below the signal wiring via an insulating layer. Was.

Further, with the increase in the speed of electric signals handled by the multilayer wiring board, a glass epoxy resin base material having a relatively small relative dielectric constant of 3 to 5 is used instead of an alumina ceramic having a relative dielectric constant of about 10 for an insulating layer. Is formed using an organic material such as polyimide, epoxy resin, or the like, and a conductive film for internal wiring made of copper (Cu) is formed on the insulating layer by using a thin film forming technique such as plating, vapor deposition, or sputtering. Then, a fine pattern of wiring conductors is formed by photolithography or etching, and this insulating layer and wiring conductors are alternately laminated in multiple layers to achieve high density and high density.
Production of a multi-layer wiring board having high performance and capable of high-speed operation of a semiconductor element is also performed.

On the other hand, a problem of simultaneous switching noise has arisen as a problem relating to power supply to semiconductor elements. This is because the power supply voltage required for switching the semiconductor element is supplied from outside the multilayer wiring board through the power supply wiring and the ground wiring, so that a plurality of switching operations of the semiconductor element are caused by the inductance component of the power supply wiring or the ground wiring. In this case, noise occurs on the power supply wiring and the ground wiring when the signal wirings occur simultaneously.

In order to solve such a problem, a method of incorporating a capacitor in which a large-area power supply wiring layer and a ground wiring layer are formed opposite to each other with an insulating layer interposed therebetween in a multilayer wiring board has been performed. . By forming the power wiring layer and the ground wiring layer having a large area to face each other, a capacitor having a large capacitance value of several nF can be built in the multilayer wiring board, and the impedance value of the built-in capacitor becomes small. Simultaneous switching noise can be reduced. Here, the impedance value is proportional to the square root of the inductance value, and is inversely proportional to the square root of the capacitance value. In general, it is known that simultaneous switching noise is reduced when the impedance value of the built-in capacitor is reduced. Further, in order to obtain a capacitance value of a larger capacitance, a plurality of capacitors are formed in a multilayer wiring board.

In a multilayer wiring board having a built-in capacitance, a capacitance electrode provided on the multilayer wiring board is trimmed to adjust the capacitance value of the capacitance (capacitance value) to a desired value. Also, realization of a highly accurate capacitor has been performed.

[0008]

However, as the information processing capability is required to be further improved, the operating speed of the semiconductor device exceeds 1 GHz, and the number of simultaneously switching semiconductor devices is rapidly increasing. I'm going to As a result, a transient current generated at the time of switching of the semiconductor element flows into the power supply wiring layer and the ground wiring layer disposed in the multilayer wiring board, and a voltage variation occurs due to an inductance component of the power supply wiring and the ground wiring, thereby causing a malfunction of the semiconductor element. A new problem has arisen.

Further, the transient current generated during the switching of the semiconductor element contains various harmonic components besides the basic operating frequency of the semiconductor element. It is necessary to consider wave components.

This harmonic component is generally an nth-order frequency component when the operating frequency of the semiconductor element is a fundamental wave, and the intensity of the higher-order harmonic component decreases. It is known that this harmonic component has a large component especially up to about five times the operating frequency.

Therefore, it has been found that in order to reduce the simultaneous switching noise in consideration of the harmonic components, it is necessary to reduce the impedance value even in a frequency band up to about five times the operating frequency of the semiconductor device. . At this time, since the conventional multilayer wiring board has a structure in which a plurality of built-in capacitors having a single capacitance value are formed, the resonance frequency of the impedance characteristic of the built-in capacitor is set near the operating frequency of the semiconductor element. By doing so, the impedance value near the operating frequency could be reduced, but no consideration was given to the impedance value in the frequency band corresponding to higher-order harmonic components. Therefore, simultaneous switching noise could be reduced in the region where the operating frequency of the semiconductor element was low, but the impedance value of the built-in capacitor became large in the high frequency region where the operating frequency was several GHz or more.
There was a problem that simultaneous switching noise became large.

Also, due to the parasitic inductance component contained in the multilayer wiring board, an anti-resonance frequency other than the self-resonance frequency is generated in the built-in capacitor, and EMI (Electro Magnetic Interference) noise at that frequency is increased. I also know that there are points. Further, with respect to such EMI noise, a method of shifting the anti-resonance frequency to a high frequency side where EMI noise is not a problem has been adopted. However, the capacitance value of the built-in capacitor cannot be adjusted to a desired value. However, there was a problem that the desired effect could not be obtained.

The present invention has been completed to solve the above problems, and an object of the present invention is to provide an electronic component such as a semiconductor element which operates at high speed and which can reduce both simultaneous switching noise and EMI noise. An object is to provide a multilayer wiring board suitable for an electronic circuit board or the like to be mounted.

[0014]

According to the present invention, there is provided a multilayer wiring board comprising an insulating substrate having a plurality of insulating layers laminated, an upper surface of which has electrodes for connecting semiconductor elements, and a lower surface having external electrodes for supplying power to the semiconductor elements. A built-in capacitor provided therein, in which a power supply wiring layer and a ground wiring layer are arranged opposite to each other with the insulating layer interposed therebetween, and power is supplied to the semiconductor element from the external electrode via the built-in capacitor. In the multilayer wiring board, the built-in capacitor is formed so that a plurality of capacitors having different resonance frequencies in a range of a frequency band of a harmonic component from an operating frequency band of the semiconductor element are connected in parallel, and The combined impedance value at the anti-resonance frequency generated between the resonance frequencies is equal to or less than a predetermined value, and at least One has a capacitor electrode disposed on the surface of the insulating substrate so as to face the power wiring layer or the ground wiring layer with the insulating layer interposed therebetween, and the capacitor electrode is covered with an insulating coating layer. It is characterized by having.

According to the multilayer wiring board of the present invention, there is provided a built-in capacitor for supplying power, wherein the power supply wiring layer and the ground wiring layer are arranged opposite to each other with the insulating layer interposed therebetween inside the insulating substrate, Since this built-in capacitor is formed such that a plurality of capacitors having different resonance frequencies are connected in parallel in a range from the operating frequency band of the semiconductor element to the frequency band of the harmonic component, the resonance frequency with the lowest impedance value is set to each. For each built-in capacitor, it can be set to be dispersed in the frequency range of the harmonic component from the operating frequency of the semiconductor element, and the combined impedance value at the anti-resonance frequency generated between different resonance frequencies is set to a predetermined value or less. Therefore, the combined impedance value in the range from the operating frequency of the semiconductor element to the frequency band of the harmonic component is wide. It can be reduced in frequency band.

Further, since the capacitor electrode forming at least one built-in capacitor is disposed on the surface of the insulating substrate and covered with the insulating coating layer, the capacitance value of the built-in capacitor can be adjusted by trimming it. Since the capacitance value can be adjusted and controlled, the anti-resonance frequency included in the impedance characteristic of the built-in capacitor can be set to a frequency that does not match the frequency of the harmonic component included in the electric signal, thereby reducing EMI noise. It is also possible.

At this time, when the capacitor electrode disposed on the surface of the insulating substrate is trimmed together with the insulating coating layer and the trimmed portion is filled with a heat-resistant insulating resin, the capacitor electrode exposed by trimming is removed. Oxidation can be effectively prevented, and high reliability with excellent environmental resistance can be obtained.

When the combined impedance value at the anti-resonance frequency is 1 Ω or less, the inductance components of the power supply wiring layer and the ground wiring layer become small, and even when the operating frequency of the semiconductor element is in a high frequency band of several GHz or more, the harmonic component becomes high. Simultaneous switching noise can be reduced including the frequency band of the wave component.

Further, since the power supply wiring layer and the ground wiring layer have a large area and a built-in capacitor having a large capacitance value of several nF can be formed, simultaneous switching can be performed even in a frequency band where the operating frequency of the semiconductor element is as low as several MHz. It is possible to reduce noise.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a multilayer wiring board according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a sectional view showing an embodiment of a multilayer wiring board according to the present invention. In FIG. 1, 1 is a multilayer wiring board, 2 is an insulating board, and the insulating board 2 is formed by laminating a plurality of insulating layers 2a to 2f. In the multilayer wiring board 1 of this example, the insulating layers 2a to 2f are basically formed of an insulating material having the same relative dielectric constant. On the insulating layer 2d, a signal wiring group 3 is formed. On the insulating layers 2c and 2e, power supply wiring layers or ground wiring layers 5 and 6 having a large area are formed so as to face the signal wiring group 3. The wiring group 3 has a microstrip line structure.

When the power wiring layers or the ground wiring layers 5 and 6 having a large area are formed facing the signal wiring group 3 in this manner,
Since the electromagnetic coupling between the signal lines included in the signal line group 3 is reduced, crosstalk noise generated between the signal lines can be reduced. By appropriately setting the wiring width of the signal wiring and the thickness of the insulating layers 2c and 2d interposed between the signal wiring group 3 and the power supply wiring layers or the ground wiring layers 5 and 6, the characteristic impedance of the signal wiring group 3 can be improved. Can be set to an arbitrary value, so that the signal wiring group 3 having good transmission characteristics can be formed. The characteristic impedance of the signal wiring group 3 is generally
Often set to 50Ω.

The plurality of signal lines included in the signal line group 3 may transmit different electric signals.

In this example, a semiconductor element 10 such as a microprocessor or an ASIC is mounted on the upper surface of the multilayer wiring board 1, and a conductive bump 11 made of solder such as tin-lead alloy (Sn-Pb) or gold (Au) is used. The semiconductor device 10 is electrically connected to the multilayer wiring board 1 via a semiconductor element connection electrode 9 for connecting the semiconductor element 10. A semiconductor element 10 is provided on the lower surface of the multilayer wiring board 1 opposite to the upper surface on which the semiconductor element 10 is mounted.
Has an external electrode 8 for supplying power.

Reference numerals 4 and 7 denote wide-area power supply wiring layers or ground wiring layers as in 5.6. In this example,
By these power supply wiring layers or ground wiring layers 4 to 7, two built-in capacitors are formed in parallel in the multilayer wiring board 1.

At this time, the power supply wiring layers or the ground wiring layers 4 to 7 alternately have layers having different functions. That is, when 4 and 6 are power wiring layers, 5 and 7 are ground wiring layers, and when 4 and 6 are ground wiring layers, 5 and 7 are power wiring layers.

On the upper surface of the multilayer wiring board 1, among the built-in capacitors formed in the multilayer wiring board 1, those having the power supply wiring layer or the ground wiring layer 4 with the insulating layer 2 a interposed therebetween. A capacitor electrode 12 is provided so as to face the capacitor electrode 12. The capacitor electrode 12 is covered with an insulator coating layer 13. In this example, a plurality of capacitor electrodes 12 are formed, and these capacitor electrodes 12 form a built-in capacitor together with the power supply wiring layer or the ground wiring layers 4, 5 and the insulating layers 2a, 2b.

Next, the built-in capacitor will be described in detail with reference to FIGS.

FIG. 5A is a sectional view of an essential part showing an example of an embodiment of the multilayer wiring board of the present invention. In FIG. 1, reference numerals 4 and 6 denote power supply wiring layers, and reference numerals 5 and 7 denote ground wirings. This is for layers. In FIG. 5A, the power supply wiring layers 63 and 65 correspond to the power supply wiring layers or the ground wiring layers 6 and 4 shown in FIG. Also, the ground wiring layer 7
Reference numerals 0 and 72 correspond to the power supply wiring layers or the ground wiring layers 5 and 7 shown in FIG. Note that, in FIG. 5A, the illustration corresponding to the capacitor electrode 12 is omitted.

In FIG. 5A, the power supply wiring is an external electrode.
From 61, it is connected to the power supply wiring layer 63 through the via hole 62,
It is connected to the power supply wiring layer 65 through the via hole 64 and to the semiconductor element connection electrode 67 through the via hole 66. The ground wiring is connected from the external electrode 68 to the ground wiring layer 70 through the via hole 69, and the via hole 71
Through the via hole 73 and to the semiconductor element connection electrode 74. As a result, a first built-in capacitor is formed between the power supply wiring layer 63 and the ground wiring layer 70, and a second built-in capacitor is formed between the power supply wiring layer 65 and the ground wiring layer 72. These electric circuits can be represented by an electric circuit diagram shown in FIG. As can be seen from FIG. 5B, the two built-in capacitors are connected in parallel.

FIG. 6 is a sectional view of a principal part showing another embodiment of the multilayer wiring board of the present invention. In FIG. 1, reference numerals 4 and 6 denote ground wiring layers, and reference numerals 5 and 7 denote a power supply. This is for a wiring layer. In FIG. 6, the ground wiring layer 90
And 92 are power supply wiring layers or ground wiring layers 6 shown in FIG.
And 4 are equivalent. The power supply wiring layers 83 and 85 correspond to the power supply wiring layers or the ground wiring layers 5 and 7 shown in FIG. Note that, also in FIG. 6 (a), illustration of those corresponding to the capacitor electrodes 12 is omitted.

In FIG. 6, the ground wiring is connected from the external electrode 88 to the ground wiring layer 92 through the via hole 89, is connected to the ground wiring layer 92 through the via hole 91, and is connected to the semiconductor element connection electrode 94 through the via hole 93. ing. In addition, the power supply wiring extends from the external electrode 81 to the via hole 82.
Through a via hole 84 to the power supply wiring layer 85, and to a semiconductor element connection electrode 87 through a via hole 86. As a result, a first built-in capacitor is formed between the ground wiring layer 90 and the power supply wiring layer 83, and the ground wiring layer 92 and the power supply wiring layer 85 are formed.
And a second built-in capacitor is formed between them, and these electric circuits can be represented by an electric circuit diagram similar to FIG. 5B. Therefore, also in this case, the two built-in capacitors are connected in parallel.

In the example shown in FIG. 1, an insulating layer 2e having a power supply wiring layer or a ground wiring layer 6 formed on its upper surface is formed.
Is set to be larger than the thickness of the insulating layer 2b on which the power supply wiring layer or the ground wiring layer 4 is formed on the upper surface.
Thereby, the first built-in capacitor formed between the power supply wiring layer or the ground wiring layer 4 and the power supply wiring layer or the ground wiring layer 5, the power supply wiring layer or the ground wiring layer 6, and the power supply wiring layer or the ground wiring layer 7 has a different capacitance value from the second built-in capacitor, and as shown in FIG. 2, each built-in capacitor has an impedance characteristic including a different resonance frequency.

FIG. 2 is a diagram showing an example of the impedance characteristic of the built-in capacitor in the multilayer wiring board of the present invention. In FIG. 2, the horizontal axis represents the frequency, and the vertical axis represents the impedance value of the built-in capacitor. Here, in the built-in capacitor formed in the multilayer wiring board 1,
The impedance characteristic in a region lower in frequency than the resonance frequency tends to show a capacitance component, and the impedance characteristic in a region higher in frequency than the resonance frequency tends to show an inductance component. Further, when a plurality of capacitors having different resonance frequencies are formed in parallel, the resonance frequencies of the respective built-in capacitors remain unchanged.
The impedance characteristics are synthesized at the intersection (anti-resonance point) of the impedance characteristics, and the frequency at the anti-resonance point, that is, the anti-resonance frequency is the frequency at which the respective impedance characteristics intersect.

Simultaneous switching noise can be reduced as the impedance value of the built-in capacitor formed by the power supply wiring layer or the ground wiring layers 4 to 7 having a large area becomes smaller. In particular, in a high frequency region where the operating frequency of the semiconductor element 10 is several GHz or higher, a harmonic component having a large component is included at a frequency that is an integral multiple of the operating frequency, and in particular, the operating frequency of the semiconductor element 10 in which the harmonic component is large. By reducing the impedance value in the frequency region including the frequency band up to about 5 times, the simultaneous switching noise of the semiconductor element 10 operating at high speed can be reduced.

Here, the impedance value of the built-in capacitor becomes the smallest at the resonance frequency. According to the multilayer wiring board of the present invention, by forming a plurality of built-in capacitors having different resonance frequencies in parallel, the resonance frequency of each built-in capacitor is changed from the operating frequency band of the semiconductor element 10 to the frequency band of the harmonic component. Can be set arbitrarily in the range between. In the example shown in FIG. 2, the resonance frequency included in the impedance characteristic of the first internal capacitor is adjusted to the operating frequency band of the semiconductor device 10, and the resonance frequency included in the impedance characteristic of the second internal capacitor is adjusted to the frequency of the harmonic component. Match the band. The resonance frequency included in the impedance characteristics of the built-in capacitor can be arbitrarily set by changing the capacitance value of the built-in capacitor formed by the power wiring layer or the ground wiring layers 4 to 7 having a large area. In this example, the resonance frequency included in the impedance characteristic of the built-in capacitor is changed by changing the thickness of the insulating layer 2b or 2e on which the power supply wiring layer or the ground wiring layer 4 or 6 is formed, thereby changing the capacitance value of the built-in capacitor. It is set to the desired value. In this example, the thickness of the insulating layer 2e on which the second built-in capacitor is formed is 1.5 times the thickness of the insulating layer 2b on which the first built-in capacitor is formed.

Further, since the combined impedance value at the anti-resonance frequency generated between these resonance frequencies is set to a predetermined value or less, the combined impedance value in the frequency band of the harmonic component from the operating frequency of the semiconductor element 10 can be widened. It can be reduced in the frequency band. Here, the combined impedance value at the anti-co-frequency generated between the resonance frequencies included in the respective impedance characteristics of the plurality of built-in capacitors is determined by the capacitance value of each built-in capacitor and the number of the built-in capacitors.
It can be set arbitrarily. The predetermined value of the combined impedance value in the multilayer wiring board of the present invention is a semiconductor element.
Based on the operating frequency of 10 and the required simultaneous switching noise amount, it is appropriately set so as to satisfy the required characteristics.

By setting the combined impedance value at the anti-resonance frequency to 1 Ω or less, the inductance component of the power supply wiring layer or the ground wiring layers 4 to 7 can be extremely reduced, and the operating frequency of the semiconductor element 10 becomes several GHz. It is possible to sufficiently effectively reduce simultaneous switching noise even in the high frequency region described above.
Here, the operating frequency of the semiconductor element 10 in which it is effective to make the combined impedance value 1 Ω or less is about 1 to 10 GHz, and the frequency of the harmonic component at that time is converted into five times the operating frequency of the semiconductor element 10. It is about 5 to 50 GHz.

The anti-resonance frequency included in the impedance characteristics of the built-in capacitor formed by the wide area power supply wiring layer or the ground wiring layers 4 to 7 formed in the multilayer wiring board 1 is determined by the operating frequency of the semiconductor element 10 and When the harmonic component coincides with the harmonic component, EMI noise tends to increase. Therefore, it is preferable to set the anti-resonance frequency of the impedance characteristic of the built-in capacitor to a frequency that does not coincide with the operating frequency of the semiconductor element 10.

The resonance frequency and anti-resonance frequency in the impedance characteristics of the built-in capacitor formed by the power wiring layer or the ground wiring layers 4 to 7 having a large area formed in the multilayer wiring board 1 are determined by the capacitance value of the built-in capacitor. And the inductance value of the parasitic inductor, the outer size of the multilayer wiring board 1, etc.
In order to more effectively reduce EMI noise, it is necessary to adjust the built-in capacitance value to a desired value.

Next, a method of adjusting the capacitance value of the built-in capacitor using the capacitance electrode 12 will be described.

An insulating coating layer covering the capacitance electrode 12 disposed on the surface of the insulating substrate 2
13 is irradiated with laser light from above, and as shown in the sectional view of the main part in FIG.
A part of 12 is deleted to form a trimming portion 14. Thereby, the effective area of the capacitor electrode 12 can be adjusted to a desired size, and the capacitance value of the built-in capacitor can be adjusted to a desired value. As the laser beam, for example, a YAG laser, a CO ₂ laser, or the like can be used.

After trimming the capacitor electrode 12 to adjust the capacitance value, the trimmed end of the capacitor electrode 12 is exposed to the outside in the trimming section 14. In this case, FIG. As shown in the main part sectional view, the trimming portion 14 is preferably filled with a heat-resistant insulating resin 15 such as a polyimide resin or an epoxy resin. As a result, it is possible to effectively prevent deterioration and deterioration due to oxidation and the like while maintaining the electrical characteristics of the capacitor electrode 12 in the trimming portion 14, so that a highly reliable one having excellent environmental resistance can be obtained. It becomes possible.

In the multilayer wiring board of the present invention, the desired capacitance values of the plurality of built-in capacitors are set, and the capacitor electrode 12 disposed on the surface of the insulating substrate 2 is trimmed together with the insulating coating layer 13 to obtain a desired value. Since the capacitance can be adjusted, by appropriately setting the resonance frequency included in the impedance characteristics of the plurality of built-in capacitors, the anti-resonance frequency is set to a frequency that does not match the operating frequency of the semiconductor element 10 and the frequency of its harmonic component. Since the setting can be made, EMI noise can be effectively reduced.

Next, another embodiment of the multilayer wiring board according to the present invention will be described with reference to FIGS.

FIG. 3 is a sectional view similar to FIG. In FIG. 3, 21 is a multilayer wiring board, 22 is an insulating substrate, and the insulating substrate 22 is formed by laminating a plurality of insulating layers 22a to 22f. In the multilayer wiring board 21 of this example, the insulating layer 22
a to 22f are basically formed of an insulating material having the same relative dielectric constant. On the insulating layer 22d, a signal wiring group 23 is formed. On the insulating layers 22c and 22e, a wide-area power supply wiring layer or ground wiring layers 25 and 26 are formed so as to face the signal wiring group 23. The wiring group 23 has a microstrip line structure.

Note that the plurality of signal wires included in the signal wire group 23 may transmit different electric signals.

In this example, a semiconductor element 30 such as a microprocessor or an ASIC is mounted on the upper surface of the multilayer wiring board 21, and a conductive bump 31 made of solder such as tin-lead alloy (Sn-Pb) or gold (Au) is used. The semiconductor device 30 is electrically connected to the multilayer wiring board 21 via a semiconductor device connection electrode 29 for connecting the semiconductor device 30. A semiconductor element 30 is provided on the lower surface of the multilayer wiring board 21 opposite to the upper surface on which the semiconductor element 30 is mounted.
Has an external electrode 28 for supplying power.

Also, 24 and 27 are power wiring layers or ground wiring layers having the same large area as 25 and 26. In this example, these power wiring layers or ground wiring layers 24 to 27 form the multilayer wiring board 21 in the multilayer wiring board 21. Two built-in capacitors are formed in parallel.

At this time, the power supply wiring layer or the ground wiring layer
24 to 27 alternately make layers of different functions overlap. That is, when 24 and 26 are power wiring layers, 25 and 27 are ground wiring layers, and when 24 and 26 are ground wiring layers, 25 and 27 are power wiring layers.

On the upper surface of the multilayer wiring board 21, among the built-in capacitors formed in the multilayer wiring board 21, those having a power supply wiring layer or a ground wiring layer 24 are provided with insulating layers.
A capacitor electrode 32 is provided so as to face the wiring layer 24 with the 22a interposed therebetween. The capacitor electrode 32 is covered with an insulator coating layer 33. In this example, a plurality of capacitor electrodes 32 are formed, and these capacitor electrodes 32 form a built-in capacitor together with the power supply wiring layer or the ground wiring layers 24 and 25 and the insulating layers 22a and 22b.

In this example, the power supply wiring layers or the ground wiring layers 24 and 25 are wide wiring layers having substantially the same area, and the power supply wiring layer or the ground wiring layer 27 is compared with the power supply wiring layer or the ground wiring layer 26. And is formed of a wide area wiring layer having a small area. Thereby, a first built-in capacitor is formed between the power supply wiring layer or the ground wiring layer 24 and the power supply wiring layer or the ground wiring layer 25, and the power supply wiring layer or the ground wiring layer 26 and the power supply wiring layer or the ground wiring layer 27 are formed. A second built-in capacitor having a smaller area between the power supply wiring layer and the ground wiring layer than the first built-in capacitor is formed between them. And since each built-in capacitor has a different area of the power supply wiring layer and the ground wiring layer facing each other,
The capacitors have different capacitance values, and each built-in capacitor has an impedance characteristic including a different resonance frequency.

In this example, the resonance frequency included in the impedance characteristic of the first built-in capacitor is adjusted to the operating frequency band of the semiconductor device 30, and the resonance frequency included in the impedance characteristic of the second built-in capacitor is adjusted to the frequency of the harmonic component. Match the band. The resonance frequency included in the impedance characteristic of the built-in capacitor can be arbitrarily set by changing the capacitance value of the built-in capacitor formed by the power wiring layer or the ground wiring layers 24 to 27 having a large area. In this example, the capacitance value of the built-in capacitor is changed by changing the area of the large-area wiring layer 27 for the power supply wiring layer or the ground wiring layers 26 and 27, and the capacitance electrode disposed on the surface of the insulating substrate 22 is changed. 32
Is trimmed together with the insulator coating layer 33 to set the resonance frequency included in the impedance characteristics of the built-in capacitor to a desired value.

Further, by setting the combined impedance value at the anti-resonance frequency generated between these resonance frequencies to a predetermined value or less, the combined impedance value in the frequency band of the harmonic component from the operating frequency of the semiconductor element 30 is increased over a wide frequency band. I'm making it smaller. In particular, by setting the combined impedance value at the anti-resonance frequency to 1 Ω or less, the inductance component of the power supply wiring layer or the ground wiring layers 24 to 27 can be suppressed to a very small value.
Even in a high-frequency region where the operating frequency of 30 is several GHz or more, it is possible to sufficiently reduce simultaneous switching noise.

Also in this example, by setting the capacitance values of the plurality of built-in capacitors respectively, and trimming the capacitor electrode 32 disposed on the surface of the insulating substrate 22 together with the insulating coating layer 33, the desired capacitance value is obtained. When the anti-resonance frequency is set to a frequency that does not match the operating frequency of the semiconductor element 30 by appropriately setting the resonance frequency included in the impedance characteristics of the plurality of built-in capacitors, the EMI can be more effectively reduced. Noise can be reduced.

After the capacitance value is adjusted by trimming the capacitor electrode 32, the trimming portion is filled with a heat-resistant insulating resin such as a polyimide resin or an epoxy resin.
It is possible to effectively prevent the occurrence of deterioration or deterioration due to oxidation or the like while maintaining the electrical characteristics of 32, and it is possible to obtain a highly reliable device having excellent environmental resistance.

With such a structure, the set frequency range of the resonance frequency included in the impedance characteristic can be further expanded as compared with the case where a plurality of built-in capacitors having different resonance frequencies are formed by changing the thickness of the insulating layer. Therefore, it becomes easier to cope with the increase in the operating frequency of the semiconductor element 30.

In this example, the area of the wide area wiring layer of the power supply wiring layer or the ground wiring layer 27 is smaller than that of the power supply wiring layer or the ground wiring layer 26. On the other hand, the same effect can be obtained even if the area of the wide area wiring layer of the power supply wiring layer or the ground wiring layer 24 is reduced.

FIG. 4 is a sectional view similar to FIG.
In FIG. 4, 41 is a multilayer wiring board, 42 is an insulating substrate, and the insulating substrate 42 is formed by laminating a plurality of insulating layers 42a to 42f. In the multilayer wiring board 41 of this example,
The insulating layers 42a to 42d and 42f are basically formed of an insulating material having the same relative dielectric constant. A signal wiring group 43 is formed on the insulating layer 42d, and a large-area power supply wiring layer or ground wiring layers 45 and 46 are formed on the insulating layers 42c and 42e so as to face the signal wiring group 43. The wiring group 43 has a microstrip line structure.

The plurality of signal lines included in the signal line group 43 may transmit different electric signals.

In this example, a semiconductor element 50 such as a microprocessor or an ASIC is mounted on the upper surface of the multilayer wiring board 41, and a conductive bump 51 made of solder such as tin-lead alloy (Sn-Pb) or gold (Au). The semiconductor device 50 is electrically connected to the multilayer wiring board 41 via a semiconductor device connection electrode 49 for connection. The lower surface of the multilayer wiring board 41 opposite to the upper surface on which the semiconductor element 50 is mounted is provided with the semiconductor element 50.
Has an external electrode 48 for supplying power.

Also, 44 and 47 are power wiring layers or ground wiring layers having the same large area as 45 and 46. In this example, these power wiring layers or ground wiring layers 44 to 47 form the multilayer wiring board 41. Two built-in capacitors are formed in parallel.

At this time, the power supply wiring layer or the ground wiring layer
44 to 47 alternately make layers of different functions overlap. That is, when 44 and 46 are power wiring layers, 45 and 47 are ground wiring layers, and when 44 and 46 are ground wiring layers, 45 and 47 are power wiring layers.

On the upper surface of the multilayer wiring board 41, among the built-in capacitors formed in the multilayer wiring board 41 and having the power supply wiring layer or the ground wiring layer 44, the insulating layer
A capacitor electrode 52 is provided so as to face the wiring layer 44 with the 42 a interposed therebetween. The capacitor electrode 52 is covered with an insulator coating layer 53. In this example, a plurality of capacitor electrodes 52 are formed, and these capacitor electrodes 52 form a built-in capacitor together with a power supply wiring layer or ground wiring layers 44 and 45 and insulating layers 42a and 42b.

In this example, the insulating layer 42e having the power supply wiring layer or the ground wiring layer 46 formed on the upper surface is different from the insulating layer 42 having the power supply wiring layer or the ground wiring layer 44 formed on the upper surface.
It is formed of an insulating material having a relative dielectric constant larger than 42b.
Accordingly, the first built-in capacitor formed between the power supply wiring layer or the ground wiring layer 44 and the power supply wiring layer or the ground wiring layer 45, the power supply wiring layer or the ground wiring layer 46, and the power supply wiring layer or the ground wiring layer The capacitance value of the second built-in capacitor formed between the capacitor and the second built-in capacitor differs, and each built-in capacitor has an impedance characteristic including a different resonance frequency.

In this example, the resonance frequency included in the impedance characteristic of the first built-in capacitor is adjusted to the operating frequency band of the semiconductor device 50, and the resonance frequency included in the impedance characteristic of the second built-in capacitor is adjusted to the frequency of the harmonic component. Match the band. The resonance frequency included in the impedance characteristics of the built-in capacitor can be arbitrarily set by changing the capacitance value of the built-in capacitor formed by the power wiring layer or the ground wiring layers 44 to 47 having a large area. In this example, by changing the relative permittivity of the insulating layers 42b and 42e on which the power supply wiring layers or the ground wiring layers 44 and 46 are formed, the capacitance value of the built-in capacitor is changed, and the resonance characteristics included in the impedance characteristics of the built-in capacitor are changed. The frequency is set to a desired value.

Further, by setting the combined impedance value at the anti-resonance frequency generated between these resonance frequencies to be equal to or less than a predetermined value, the combined impedance value in the frequency band from the operating frequency of the semiconductor element 50 to the harmonic component is widened. I'm making it smaller. In particular, by setting the combined impedance value at the anti-resonance frequency to 1 Ω or less, the inductance component of the power supply wiring layer or the ground wiring layers 44 to 47 can be suppressed to a very small value.
Even in the high-frequency region where the operating frequency is 50 GHz or more, it is possible to sufficiently reduce simultaneous switching noise.

Also in this example, by setting the capacitance values of the plurality of built-in capacitors, and trimming the capacitor electrode 52 disposed on the surface of the insulating substrate 42 together with the insulating coating layer 53, the desired capacitance can be obtained. When the anti-resonance frequency is set to a frequency that does not match the operating frequency of the semiconductor element 50 by appropriately setting the resonance frequency included in the impedance characteristics of the plurality of built-in capacitors, the EMI can be more effectively adjusted. Noise can be reduced.

After trimming the capacitor electrode 52 to adjust the capacitance value, the trimming portion is filled with a heat-resistant insulating resin such as a polyimide resin or an epoxy resin, so that the capacitor electrode in the trimming portion is filled.
It is possible to effectively prevent the occurrence of deterioration or deterioration due to oxidation or the like while maintaining the electrical characteristics of 52, and it is possible to obtain a highly reliable device having excellent environmental resistance.

With this structure, the capacitance value of the built-in capacitor can be further increased, so that the impedance value can be further reduced.

In this example, the dielectric constant of the insulating layer 42e is larger than that of the insulating layer 42b. However, the relative dielectric constant of the insulating layer 42b may be larger than that of the insulating layer 42e. Similar effects can be obtained.

In the multilayer wiring board of the present invention, a similar wiring structure may be further laminated in multiple layers to form a multilayer wiring board.

The structure of the signal wiring includes a microstrip structure having a power wiring layer or a ground wiring layer formed opposite to the signal wiring, and a strip having a power wiring layer or a ground wiring layer above and below the signal wiring. It may have a coplanar structure in which a power supply wiring layer or a ground wiring layer is formed adjacent to the structure and signal wiring, and can be appropriately selected and used according to specifications required for a multilayer wiring board.

Further, a multilayered wiring board may be constructed by attaching a chip resistor, a thin film resistor, a coil inductor, a cross inductor, a chip capacitor or an electrolytic capacitor.

The shape of each insulating layer in plan view is as follows:
In addition to the square shape and the rectangular shape, the shape may be a diamond shape, a hexagonal shape, an octagonal shape, or the like.

The multi-layer wiring board of the present invention includes a package for storing electronic parts such as a package for storing semiconductor elements, a substrate for mounting electronic parts, a so-called multi-chip module or multi-chip on which a large number of semiconductor elements are mounted. Used as a package or motherboard.

In the multilayer wiring board of the present invention, each insulating layer is formed, for example, by a ceramic green sheet laminating method.
Using inorganic insulating materials such as aluminum oxide sintered body, aluminum nitride sintered body, silicon carbide sintered body, silicon nitride sintered body, mullite sintered body, glass ceramics, or polyimide / epoxy Electricity such as composite insulating materials using organic insulating materials such as resin, fluororesin, polynorbornene or benzocyclobutene, or combining inorganic insulating powder such as ceramic powder with thermosetting resin such as epoxy resin It is formed using an insulating material.

These insulating layers are produced as follows. For example, if it is made of an aluminum oxide-based sintered body, first, an appropriate organic binder or a solvent is added to a raw material powder such as aluminum oxide, silicon oxide, calcium oxide, or magnesium oxide to form a slurry. This is formed into a sheet by employing a conventionally known doctor blade method to obtain a ceramic green sheet. Then, a metal paste to be used for each signal wiring group and each wiring conductor layer is printed and applied in a predetermined pattern, and is laminated on top and bottom. Finally, the laminated body is fired at a temperature of about 1600 ° C. in a reducing atmosphere. Is done.

For example, in the case of an epoxy resin, an insulating layer of a glass epoxy resin or the like formed by impregnating a ceramic or a glass fiber woven fabric with an epoxy resin in general. An insulating layer made of an organic resin such as an epoxy resin formed by applying an organic resin precursor by a coating technique such as a spin coating method or a curtain coating method and performing a thermosetting treatment on the upper surface thereof, and copper. It is manufactured by alternately laminating thin film wiring conductor layers formed by adopting thin film forming technology such as electroless plating method and vapor deposition method and photolithography technology, and heating and curing at a temperature of about 170 ° C. .

The thickness of these insulating layers is appropriately set according to the characteristics of the material to be used so as to satisfy the conditions such as mechanical strength and electrical characteristics corresponding to required specifications.

As a method for obtaining insulating layers having different relative dielectric constants, for example, an inorganic insulating material such as aluminum oxide, aluminum nitride, silicon carbide, silicon nitride, mullite or glass ceramic, or a polyimide / epoxy resin・ Add powder of high dielectric material such as barium titanate, strontium titanate, calcium titanate or magnesium titanate to organic insulating material such as fluororesin, polynorbornene or benzocyclobutene, and heat and cure at appropriate temperature By doing so, a material having a desired relative permittivity may be obtained.

At this time, the particle diameter of the high dielectric material to be added to and mixed with the inorganic insulating material or the organic insulating material is determined by the ratio in the insulating layer caused by adding and mixing the high dielectric material to the inorganic or organic insulating material. In order to reduce the occurrence of variation in the dielectric constant and the reduction in workability due to a change in the viscosity of the insulating layer, the thickness is preferably in the range of 0.5 μm to 50 μm.

The content of the high dielectric material to be added to and mixed with the inorganic insulating material or the organic insulating material may be set so as to increase the relative dielectric constant of the insulating layer. In order to prevent a decrease in the adhesive strength of the material, the content is desirably 5% by weight to 75% by weight.

A wide area pattern as each signal wiring group, a power supply layer or a ground layer, and a capacitor electrode are:
For example, tungsten (W), molybdenum (Mo), molybdenum manganese (Mo-Mn), copper (Cu), silver (A
g) or metal powder such as silver palladium (Ag-Pd), or copper (Cu) / silver (Ag) / nickel (Ni) / chromium (Cr) / titanium (Ti) / gold (A
u) or a thin film of a metal material such as niobium (Nb) or an alloy thereof.

Specifically, when forming a wide area pattern as each signal wiring group, power supply layer or ground layer, and a capacitor electrode by metallizing metal powder of W, an appropriate organic binder, solvent or the like is added to W powder and mixed. The metal paste obtained as described above can be formed by printing and applying a predetermined pattern on a ceramic green sheet to be an insulating layer, and firing this together with a laminate of ceramic green sheets.

On the other hand, in the case of forming a thin film of a metal material,
For example, after a metal film is formed by a sputtering method, a vacuum evaporation method, or a plating method, a predetermined wiring pattern can be formed by a photolithography method.

In such a multilayer wiring board, by appropriately setting the wiring width of each signal wiring group according to the relative dielectric constant of the insulating layer on which each signal wiring group is provided, The characteristic impedance values of the signal wirings can be the same.

The insulator coating layer covering the capacitor electrode may be formed by simultaneously firing a glass material paste or the same ceramic material as the insulating substrate. The thickness of this insulator coating layer is 5 μm
It is desirable that the thickness be about 100 μm. If the thickness is less than 5 μm, sufficient coating cannot be performed, and the capacitor electrode tends to be oxidized, making it difficult to maintain good characteristics. Conversely, a coating having a thickness of more than 100 μm requires a high-output laser beam for trimming for capacitance adjustment, and thus it may be difficult to handle the laser beam.

The present invention is not limited to the above-described embodiment, and various changes may be made without departing from the scope of the present invention. For example, three or more signal wiring groups may be formed between different insulating layers. Further, the number of capacitors formed in the multilayer wiring board may be three or more. Further, the shape of the pattern of the power supply layer or the ground layer may be a so-called mesh pattern having a large number of openings.

Further, the number of capacitor electrodes provided on the surface of the insulating substrate may be one or more per one built-in capacitor, and the plurality of built-in capacitors located immediately below the surface of the insulating substrate may be plural. The built-in capacitor may have a capacitor electrode on the surface.

[0091]

According to the multilayer wiring board of the present invention, there is provided a built-in capacitor for power supply which is formed by arranging a power supply wiring layer and a ground wiring layer facing each other with an insulating layer interposed therebetween inside the insulating substrate. The built-in capacitor is formed such that a plurality of capacitors having different resonance frequencies are connected in parallel in a range from the operating frequency band of the semiconductor element to the frequency band of the harmonic component. Each of the built-in capacitors can be set to be dispersed within the frequency band of the harmonic component from the operating frequency of the semiconductor element, and furthermore, the combined impedance value at an anti-resonance frequency generated between different resonance frequencies is equal to or less than a predetermined value. Therefore, the combined impedance value in a range from the operating frequency of the semiconductor element to the frequency band of the harmonic component is widened. It can be reduced in the frequency band.

Further, since the capacitor electrode forming at least one built-in capacitor is arranged on the surface of the insulating substrate and covered with the insulating coating layer, the capacitance value of the built-in capacitor can be trimmed to a desired value. Since the capacitance value can be adjusted and controlled, the anti-resonance frequency included in the impedance characteristic of the built-in capacitor can be set to a frequency that does not match the frequency of the harmonic component included in the electric signal, thereby reducing EMI noise. It is also possible.

At this time, when the capacitor electrode disposed on the surface of the insulating substrate is trimmed together with the insulating coating layer, and the trimmed portion is filled with a heat-resistant insulating resin, the capacitor electrode exposed by the trimming is removed. Oxidation can be effectively prevented, and high reliability with excellent environmental resistance can be obtained.

When the combined impedance value at the anti-resonance frequency is 1 Ω or less, the inductance components of the power supply wiring layer and the ground wiring layer become small, and even when the operating frequency of the semiconductor element is higher than several GHz, the harmonic component becomes higher. Simultaneous switching noise can be reduced including the frequency band of the wave component.

Further, since the power supply wiring layer and the ground wiring layer have a large area and a built-in capacitor having a large capacitance value of several nF can be formed, simultaneous switching can be performed even in a frequency band where the operating frequency of the semiconductor element is as low as several MHz. It is possible to reduce noise.

As a result, according to the present invention, simultaneous switching noise and EMI noise can be reduced.
A multilayer wiring board suitable for an electronic circuit board or the like on which electronic components such as a semiconductor element operating at high speed are mounted can be provided.

[Brief description of the drawings]

FIG. 1 is a sectional view showing an example of an embodiment of a multilayer wiring board of the present invention.

FIG. 2 is a diagram showing an example of impedance characteristics of a built-in capacitor in the multilayer wiring board of the present invention.

FIG. 3 is a sectional view showing another example of the embodiment of the multilayer wiring board of the present invention.

FIG. 4 is a sectional view showing another example of the embodiment of the multilayer wiring board of the present invention.

FIG. 5A is a cross-sectional view of an essential part showing an example of an embodiment of a multilayer wiring board of the present invention, and FIG. 5B shows an example of impedance characteristics of a built-in capacitor of the multilayer wiring board of the present invention. It is an electric circuit diagram.

FIG. 6 is a sectional view of a main part showing an example of an embodiment of the multilayer wiring board of the present invention.

FIG. 7 is a sectional view of a main part showing an example of trimming of a capacitor electrode in a multilayer wiring board of the present invention.

FIG. 8 is a cross-sectional view of a principal part showing an example of a state in which a trimming portion of a capacitor electrode in a multilayer wiring board of the present invention is filled with a heat-resistant insulating resin.

[Explanation of symbols]

1, 21, 41: multilayer wiring board 2, 22, 42: insulating substrate 2a to 2f, 22a to 22f, 42a to 42f: insulating layer 4 to 7, 24 to 27, 44 to 47 ...・ Power supply wiring layer or ground wiring layer 8, 28, 48 ・ ・ ・ External electrode 9, 29, 49 ・ ・ ・ Semiconductor element connection electrode 10, 30, 50 ・ ・ ・ Semiconductor element 12, 32, 52 ・ ・ ・ Capacitor Electrode 14: trimming part 15: heat-resistant insulating resin 61, 81: external electrode for power supply wiring 63, 65, 83, 85: power supply wiring layer 67, 87: for power supply wiring Electrodes for connecting semiconductor elements 68, 88: External electrodes for ground wiring 70, 72, 90, 92 ... Ground wiring layers 74, 94 ... Electrodes for connecting semiconductor elements for ground wiring

Claims (3)

[Claims] An insulating substrate formed by laminating a plurality of insulating layers is provided with an electrode for connecting a semiconductor element on an upper surface and an external electrode for supplying power to the semiconductor element on a lower surface, and a power supply wiring layer and a ground wiring layer inside. Comprises a built-in capacitor formed oppositely disposed with the insulating layer interposed therebetween, and a multilayer wiring board for supplying power to the semiconductor element from the external electrode through the built-in capacitor, wherein the built-in capacitor is A plurality of components having different resonance frequencies in a range from the operating frequency band of the semiconductor element to the harmonic component frequency band are formed so as to be connected in parallel, and a combined impedance at an anti-resonance frequency generated between the different resonance frequencies The value is not more than a predetermined value, and at least one of the plurality of built-in capacitors is provided on the surface of the insulating substrate by the insulating layer. A capacitor electrode disposed opposite to the power supply wiring layer or the ground wiring layer with the
A multilayer wiring board, wherein the capacitor electrode is covered with an insulator coating layer. 2. The multilayer wiring board according to claim 1, wherein the capacitor electrode is trimmed together with the insulator coating layer, and the trimmed portion is filled with a heat-resistant insulating resin. 3. The multilayer wiring board according to claim 1, wherein a combined impedance value at the anti-resonance frequency is set to 1Ω or less.