JP2002158448A - Multilayer wring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem in which a multilayer wiring board mounted with an electronic part that operates at a high speed is apt to get increased simultaneous switching noise and EMI noise. SOLUTION: A multilayer wiring board 1 has a structure where semiconductor element connecting electrodes 8 are provided on the top surface of an insulating board 2, and outer electrodes 7 are provided on the undersurface of the board 2, inner power supply wiring layers or grounding wiring layers 4 to 6 are arranged as they are opposed to each other with insulating layers 2c and 2d sandwiched between them for the formation of an internal capacitor, and the wiring board 1 feeds a power supply through the intermediary of the above internal capacitor. The internal capacitor is so formed that a plurality of capacitor elements which are possessed of different resonant frequencies in a frequency band range from the operating frequency band of a semiconductor element 9 to a frequency band of harmonics are connected in parallel, and the multilayer wiring board 1 has a resultant impedance smaller than a prescribed value in an antiresonant frequency that occurs between the different resonance frequencies. A frequency band where a resultant impedance is small is widened, and a resonance frequency can be optionally set up, so that simultaneous switching noise and EMI noise can be reduced at the same time.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-layer wiring board used for a semiconductor element housing package for housing a semiconductor element, an electronic circuit board on which semiconductor elements and electronic components are mounted, and more particularly to a high-speed operation. The present invention relates to a multilayer wiring board having a wiring structure suitable for housing or mounting a semiconductor element.

[0002]

2. Description of the Related Art Conventionally, microprocessors and ASICs
(Multi-layered wiring boards used for electronic circuit boards, etc., on which electronic components such as semiconductor elements typified by (Application Specific Integrated Circuits) and the like are mounted. In forming wiring conductors for internal wiring, alumina ceramics, etc. Insulating layers made of ceramics and wiring conductor layers made of a refractory metal such as tungsten (W) are alternately laminated to form a multilayer wiring board.

On the other hand, as the demand for improving the information processing capability has increased, the operating speed of the semiconductor element has been increased, and among the wiring conductors for the internal wiring, signal wiring has characteristic impedance matching and inter-signal wiring. Improvements in electrical characteristics such as reduction of crosstalk noise have been demanded. In order to cope with such a demand, the wiring structure of the signal wiring is a strip line structure, and a wide area power supply wiring layer or a ground (ground) wiring layer is formed above and below the signal wiring via an insulating layer. Was.

However, in such a multilayer wiring board, since the insulating layer is made of alumina ceramic or the like having a relative dielectric constant of about 10, the electromagnetic coupling between the signal wirings is increased, so that the crosstalk noise is increased. As a result, there arises a problem that the operation speed of the semiconductor device cannot be increased.

Therefore, instead of alumina ceramics having a relative dielectric constant of about 10, a glass epoxy resin base material having a relatively small relative dielectric constant of 3 to 5 or a multilayer wiring using an organic material such as polyimide or epoxy resin as an insulating layer. Substrates have been used.

In such a multilayer wiring board, an internal wiring conductor film made of copper (Cu) is formed on an insulating layer made of an organic material by using a thin film forming technique such as a plating method, a vapor deposition method or a sputtering method. By forming a wiring conductor layer having a fine pattern of wiring conductors by a photolithography method or an etching method, and alternately laminating the insulating layers and the wiring conductor layers, a multilayer wiring capable of high-speed operation of a semiconductor element is provided. Fabrication of substrates has been performed.

On the other hand, as a problem relating to power supply to a semiconductor element, a problem of simultaneous switching noise has occurred. This is because the power supply voltage required for switching the semiconductor element is supplied from outside the multilayer wiring board through the power supply wiring and the ground wiring, so that a plurality of switching operations of the semiconductor element are caused by the inductance component of the power supply wiring or the ground wiring. In this case, noise occurs on the power supply wiring and the ground wiring when the signal wirings occur simultaneously.

In order to solve such a problem, a method of incorporating a capacitor in which a large-area power supply wiring layer and a ground wiring layer are formed opposite to each other with an insulating layer interposed therebetween in a multilayer wiring board has been performed. . As described above, by forming the power supply wiring layer and the ground wiring layer having a large area facing each other, a capacitor having a large capacitance value of several nF can be built in the multilayer wiring board, and the impedance value of the built-in capacitor is reduced. Therefore, simultaneous switching noise can be reduced. Here, the impedance value is proportional to the square root of the inductance value, and is inversely proportional to the square root of the capacitance value. In general, it is known that simultaneous switching noise is reduced when the impedance value of the built-in capacitor is reduced. Further, in order to obtain a capacitance value of a larger capacity, a plurality of capacitors are formed in a multilayer wiring board.

[0009]

However, with the demand for further improvement in information processing capability, the operating speed of semiconductor devices, such as the operating frequency exceeding 1 GHz, has been rapidly increased. In such a situation, a new problem has arisen in that simultaneous switching noise increases due to harmonic components of an electric signal transmitted in the multilayer wiring board. This harmonic component is a higher frequency component contained in the digital signal, and has a large component at a frequency that is an integral multiple of the operating frequency (fundamental wave) of the semiconductor element.
The component decreases as the frequency of the harmonic component increases. In particular, it is known that harmonic components up to about five times the operating frequency have large components.
Therefore, it has been found that it is necessary to reduce the impedance value even in a frequency band up to about five times the operating frequency of the semiconductor element. At this time, since the conventional multilayer wiring board has a structure in which a plurality of built-in capacitors having a single capacitance value are formed, the resonance frequency of the impedance characteristic of the built-in capacitor is set near the operating frequency of the semiconductor element. By doing so, the impedance value near the operating frequency could be reduced, but the impedance value in the frequency band of the harmonic component was not considered. Therefore, simultaneous switching noise can be reduced in a region where the operating frequency of the semiconductor element is low, but in a high frequency region where the operating frequency is several GHz or more, the impedance value of the built-in capacitor increases, and the simultaneous switching noise increases. Had problems.

When the anti-resonance frequency included in the impedance characteristic of the built-in capacitor matches the frequency of the harmonic component, the harmonic acts as electromagnetic noise on the power supply wiring and the ground wiring, so that EMI ( Electr
o Magnetic Interference) It has been found that there is a problem that noise increases.

The present invention has been completed to solve the above problems, and has as its object to mount electronic parts such as semiconductor elements operating at high speed, which can reduce both simultaneous switching noise and EMI noise. It is an object of the present invention to provide a multilayer wiring board suitable for an electronic circuit board or the like.

[0012]

According to the present invention, there is provided a multilayer wiring board comprising an insulating substrate having a plurality of insulating layers laminated, an upper surface of which has electrodes for connecting semiconductor elements, and a lower surface having external electrodes for supplying power to the semiconductor elements. A built-in capacitor provided therein, in which a power supply wiring layer and a ground wiring layer are arranged opposite to each other with the insulating layer interposed therebetween, and power is supplied to the semiconductor element from the external electrode via the built-in capacitor. In the multilayer wiring board, the built-in capacitor is formed so that a plurality of capacitors having different resonance frequencies in a range of a frequency band of a harmonic component from an operating frequency band of the semiconductor element are connected in parallel, and The combined impedance value at the anti-resonance frequency generated between the resonance frequencies is not more than a predetermined value.

According to the multilayer wiring board of the present invention, there is provided a built-in capacitor for power supply, which is formed by arranging a power supply wiring layer and a ground wiring layer opposite to each other with the insulating layer interposed therebetween inside the insulating substrate, Since this built-in capacitor is formed such that a plurality of capacitors having different resonance frequencies are connected in parallel in a range from the operating frequency band of the semiconductor element to the frequency band of the harmonic component, the resonance frequency with the lowest impedance value is set to each. For each built-in capacitor, it can be set to be dispersed in the frequency range of the harmonic component from the operating frequency of the semiconductor element, and the combined impedance value at the anti-resonance frequency generated between different resonance frequencies is set to a predetermined value or less. Therefore, the combined impedance value in the range from the operating frequency of the semiconductor element to the frequency band of the harmonic component is wide. It can be reduced in frequency band.

When the combined impedance value at the anti-resonance frequency is set to 1 Ω or less, the inductance components of the power supply wiring layer and the ground wiring layer become small, and even when the operating frequency of the semiconductor element is in a high frequency band of several GHz or more, the harmonic component thereof becomes Simultaneous switching noise can be reduced including the frequency band of the wave component.

Further, since the power supply wiring layer and the ground wiring layer have a large area and a built-in capacitor having a large capacitance value of several nF can be formed, simultaneous switching can be performed even in a frequency band where the operating frequency of the semiconductor element is as low as several MHz. It is possible to reduce noise.

Further, the anti-resonance frequency included in the impedance characteristic of the built-in capacitor can be set to a frequency that does not match the frequency of the harmonic component included in the electric signal by controlling the capacitance values of the plurality of built-in capacitors. , EMI noise can also be reduced.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a multilayer wiring board according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a sectional view showing an example of an embodiment of a multilayer wiring board according to the present invention. In FIG. 1, 1 is a multilayer wiring board, 2 is an insulating board, and the insulating board 2 is formed by laminating a plurality of insulating layers 2a to 2e. In the multilayer wiring board 1 of this example, the insulating layers 2a to 2e are basically formed of an insulating material having the same relative dielectric constant. A signal wiring group 3 is formed on the insulating layer 2b, and a wide-area power supply wiring layer or ground wiring layer 4 is formed on the insulating layer 2c so as to face the signal wiring group 3. It has a microstrip line structure.

When the power supply wiring layer or the ground wiring layer 4 having a large area is formed so as to face the signal wiring group 3, the electromagnetic coupling between the signal wirings included in the signal wiring group 3 is reduced. Crosstalk noise generated between the wirings can be reduced. Also, by appropriately setting the wiring width of the signal wiring and the thickness of the insulating layer 2b interposed between the signal wiring group 3 and the power supply wiring layer or the ground wiring layer 4, the characteristic impedance of the signal wiring group 3 can be set to an arbitrary value. , The signal wiring group 3 having good transmission characteristics can be formed. Generally, the characteristic impedance of the signal wiring group 3 is often set to 50Ω.

The plurality of signal wires included in the signal wire group 3 may transmit different electric signals.

In this example, a semiconductor element 9 such as a microprocessor or an ASIC is mounted on the upper surface of the multilayer wiring board 1, and a conductive bump 10 made of solder such as tin-lead alloy (Sn-Pb) or gold (Au) is used. The semiconductor device 9 is electrically connected to the multilayer wiring board 1 via a semiconductor element connection electrode 8 for connecting the semiconductor element 9. External electrodes 7 for supplying power to the semiconductor element 9 are provided on the lower surface of the multilayer wiring board 1 opposite to the upper surface on which the semiconductor element 9 is mounted.

Reference numerals 5 and 6 denote a power supply wiring layer or a ground wiring layer having a large area as in the case of 4. In this example, two power supply wiring layers or ground wiring layers 4 to 6 form two layers in the multilayer wiring board 1. Are formed in parallel. At this time, the power supply wiring layer or the ground wiring layers 4 and 6 are different from the power supply wiring layer or the ground wiring layer 5. That is, when 4 and 6 are power wiring layers, 5 is a ground wiring layer, and when 4 and 6 are ground wiring layers, 5 is a power wiring layer.

This will be described in detail with reference to FIGS.

FIG. 5A is a cross-sectional view of an essential part showing an example of an embodiment of the multilayer wiring board of the present invention. In FIG. 1, reference numerals 4 and 6 indicate power supply wiring layers, and reference numeral 5 indicates a ground wiring layer. Is the case. In FIG. 5A, the power supply wiring layers 63 and 65 correspond to the power supply wiring layers or the ground wiring layers 6 and 4 shown in FIG. The ground wiring layer 70 is shown in FIG.
2 corresponds to the power supply wiring layer or the ground wiring layer 5 shown in FIG. In FIG. 5A, the power supply wiring is connected from the external electrode 61 to the power supply wiring layer 63 through the via hole 62, and is connected to the power supply wiring layer 65 through the via hole 64.
The via holes 66 are connected to the semiconductor element connection electrodes 67. Also, the ground wiring is connected to the external electrode 68 via hole.
It is connected to a ground wiring layer 70 through 69 and to a semiconductor element connection electrode 72 through a via hole 71. Thus, a first built-in capacitor is formed between the power supply wiring layer 63 and the ground wiring layer 70, and the power supply wiring layer 65 and the ground wiring layer 70 are formed.
Since the second built-in capacitor is formed between these two circuits, these electric circuits can be represented by the electric circuit diagram shown in FIG. As can be seen from FIG.
The built-in capacitors are connected in parallel.

FIG. 6 is a sectional view of a principal part showing another embodiment of the multilayer wiring board according to the present invention. In FIG. 1, reference numerals 4 and 6 denote ground wiring layers, and reference numeral 5 denotes a power supply wiring layer. This is the case. In FIG. 6, ground wiring layers 88 and 90
Are power or ground wiring layers 6 and 4 shown in FIG.
Is equivalent to The power supply wiring layer 83 corresponds to the power supply wiring layer or the ground wiring layer 5 shown in FIG. In FIG. 6, the ground wiring is connected from the external electrode 86 to the ground wiring layer 88 through the via hole 87, and is connected to the ground wiring layer 90 through the via hole 89.
It is connected to a semiconductor element connection electrode 92 through 91.
The power supply wiring is connected from the external electrode 81 to the power supply wiring layer 83 through the via hole 82, and is connected to the semiconductor element connection electrode 85 through the via hole 84. As a result, a first built-in capacitor is formed between the ground wiring layer 88 and the power supply wiring layer 83, and a second built-in capacitor is formed between the ground wiring layer 90 and the power supply wiring layer 83. Can be represented by an electric circuit diagram similar to FIG. 5 (b).
Therefore, also in this case, the two built-in capacitors are connected in parallel.

In the example shown in FIG. 1, an insulating layer 2d having a power supply wiring layer or a ground wiring layer 5 formed on the upper surface is provided.
Is set to be larger than the thickness of the insulating layer 2c in which the power supply wiring layer or the ground wiring layer 4 is formed on the upper surface.
Thus, the first built-in capacitor formed between the power supply wiring layer or the ground wiring layer 4 and the power supply wiring layer or the ground wiring layer 5, the power supply wiring layer or the ground wiring layer 5, and the power supply wiring layer or the ground wiring layer 6 have different capacitance values from the second built-in capacitor, and as shown in FIG. 2, each built-in capacitor has an impedance characteristic including a different resonance frequency. FIG.
FIG. 4 is a diagram illustrating an example of impedance characteristics of a built-in capacitor in the multilayer wiring board of the present invention. In FIG. 2, the horizontal axis represents the frequency, and the vertical axis represents the impedance value of the built-in capacitor. Here, in the built-in capacitor formed in the multilayer wiring board 1, the impedance characteristic in a region lower in frequency than the resonance frequency indicates a capacitance component, and the impedance characteristic in a region higher in frequency than the resonance frequency tends to indicate an inductance component. is there.
Further, when a plurality of capacitors having different resonance frequencies are formed in parallel, the impedance characteristics are synthesized at the intersection (anti-resonance point) of the impedance characteristics while maintaining the resonance frequency of each built-in capacitor, and The frequency of the point, that is, the anti-resonance frequency is the frequency at which the respective impedance characteristics intersect.

Simultaneous switching noise can be reduced as the impedance value of the built-in capacitor formed by the power supply wiring layer or the ground wiring layers 4 to 6 having a large area becomes smaller. In particular, in a high frequency region where the operating frequency of the semiconductor element 9 is several GHz or more, a harmonic component having a large component is contained at a frequency that is an integral multiple of the operating frequency, and in particular, the operating frequency of the semiconductor element 9 where the harmonic component becomes large The simultaneous switching noise of the semiconductor element 9 operating at high speed can be reduced by reducing the impedance value in the frequency region including the frequency band up to about five times the frequency band.

Here, the impedance value of the built-in capacitor becomes the smallest at the resonance frequency. According to the multilayer wiring board of the present invention, since a plurality of built-in capacitors having different resonance frequencies are formed in parallel, the resonance frequency of each built-in capacitor is changed from the operating frequency band of the semiconductor element 9 to the frequency band of the harmonic component. Can be set arbitrarily in the range between. In the example shown in FIG. 2, the resonance frequency included in the impedance characteristic of the first internal capacitor is matched with the operating frequency band of the semiconductor element 9, and the resonance frequency included in the impedance characteristic of the second internal capacitor is adjusted to the frequency of the harmonic component. Match the band. The resonance frequency included in the impedance characteristics of the built-in capacitor can be arbitrarily set by changing the capacitance value of the built-in capacitor formed by the power wiring layer or the ground wiring layers 4 to 6 having a large area. In this example, the resonance frequency included in the impedance characteristic of the built-in capacitor is changed by changing the thickness of the insulating layer 2c or 2d on which the power supply wiring layer or the ground wiring layer 4 or 5 is formed, thereby changing the capacitance value of the built-in capacitor. It is set to the desired value. In this example, the thickness of the insulating layer 2d on which the second built-in capacitor is formed is 1.5 times the thickness of the insulating layer 2c on which the first built-in capacitor is formed.

Further, since the combined impedance value at the anti-resonance frequency generated between these resonance frequencies is set to a predetermined value or less, the combined impedance value in the frequency band from the operating frequency of the semiconductor element 9 to the harmonic component is widened. It can be reduced in the frequency band. Here, the combined impedance value at the anti-co-frequency generated between the resonance frequencies included in the respective impedance characteristics of the plurality of built-in capacitors is determined by the capacitance value of each built-in capacitor and the number of the built-in capacitors.
It can be set arbitrarily. The predetermined value of the combined impedance value in the multilayer wiring board of the present invention is appropriately set so as to satisfy the operating frequency of the semiconductor element 9, the required simultaneous switching noise amount, and the required characteristics.

By setting the combined impedance value at the anti-resonance frequency to 1 Ω or less, the inductance component of the power supply wiring layer or the ground wiring layers 4 to 6 can be extremely reduced, and the operating frequency of the semiconductor element 9 becomes several GHz. It is possible to sufficiently effectively reduce simultaneous switching noise even in the high frequency region described above.
Here, the operating frequency of the semiconductor element 9 in which it is effective to set the combined impedance value to 1 Ω or less is about 1 to 10 GHz, and the frequency of the harmonic component at that time is converted into five times the operating frequency of the semiconductor element 9. It is about 5 to 50 GHz.

The anti-resonance frequency included in the impedance characteristics of the built-in capacitor formed by the wide area power supply wiring layer and the ground wiring layers 4 to 6 formed in the multilayer wiring board 1 is different from the operating frequency of the semiconductor element 9. If they match,
EMI noise tends to increase. Therefore, it is preferable to set the anti-resonance frequency of the impedance characteristic of the built-in capacitor to a frequency that does not coincide with the operating frequency of the semiconductor element 9, thereby making it possible to reduce EMI noise more effectively.

In the multilayer wiring board of the present invention, the anti-resonance frequency can be reduced by appropriately setting the resonance frequency included in the impedance characteristics of the plurality of built-in capacitors.
Can be set to a frequency that does not coincide with the operating frequency of EMI, so that EMI noise can be effectively reduced.

Next, another embodiment of the multilayer wiring board according to the present invention will be described with reference to FIGS. FIG. 3 is a sectional view similar to FIG. 3, reference numeral 21 denotes a multilayer wiring board, 22 denotes an insulating substrate, and the insulating substrate 22 includes a plurality of insulating layers 22.
a to 22e are laminated. In the multilayer wiring board 21 of this example, the insulating layers 22a to 22e are basically formed of an insulating material having the same relative dielectric constant. Insulating layer
A signal wiring group 23 is formed on 22b, and a large-area power supply wiring layer or ground wiring layer 24 is formed on the insulating layer 22c so as to face the signal wiring group 23. It has a line structure.

The plurality of signal lines included in the signal line group 23 may transmit different electric signals.

In this example, a semiconductor element 29 such as a microprocessor or an ASIC is mounted on the upper surface of the multilayer wiring board 21, and a conductive bump 30 made of solder such as tin-lead alloy (Sn-Pb) or gold (Au) is used. The semiconductor device 29 is electrically connected to the multilayer wiring board 21 via a semiconductor element connection electrode 28 for connecting the semiconductor element 29. A semiconductor element is provided on the lower surface of the multilayer wiring board 21 opposite to the upper surface on which the semiconductor element 29 is mounted.
29 has an external electrode 27 for supplying power.

Reference numerals 25 and 26 denote power wiring layers or ground wiring layers having the same large area as 24. In this example, two power wiring layers or ground wiring layers 24 to 26 are provided in the multilayer wiring board 21 by these power wiring layers or ground wiring layers 24 to 26. Are formed in parallel. At this time, the power supply wiring layer or the ground wiring layers 24 and 26 and the power supply wiring layer or the ground wiring layer 25 are different. That is, when 24 and 26 are power wiring layers, 25 is a ground wiring layer, and when 24 and 26 are ground wiring layers, 25 is a power wiring layer.

In this example, the power supply wiring layer or the ground wiring layers 24 and 25 are wide wiring layers having substantially the same area, and the power supply wiring layer or the ground wiring layer 26 is formed of the power supply wiring layer or the ground wiring layers 24 and 25. It is formed of a wide area wiring layer having a smaller area than that of. Thereby, the power supply wiring layer or the ground wiring layer 24 is connected to the power supply wiring layer or the ground wiring layer.
A first internal capacitor is formed between the first internal capacitor and the power supply wiring layer or the ground wiring layer. The second built-in capacitor having a small area is formed. Each of the built-in capacitors has a different capacitance value because the facing areas of the power supply wiring layer and the ground wiring layer are different,
Each built-in capacitor has impedance characteristics including different resonance frequencies.

In this example, the resonance frequency included in the impedance characteristic of the first internal capacitor is adjusted to the operating frequency band of the semiconductor element 29, and the resonance frequency included in the impedance characteristic of the second internal capacitor is adjusted to the frequency of the harmonic component. Match the band. The resonance frequency included in the impedance characteristics of the built-in capacitor can be arbitrarily set by changing the capacitance value of the built-in capacitor formed by the power wiring layer or the ground wiring layers 24 to 26 having a large area. In this example, by changing the area of the wide area wiring layer of the power supply wiring layer or the ground wiring layer 24 or 26,
By changing the capacitance value of the built-in capacitor, the resonance frequency included in the impedance characteristic of the built-in capacitor is set to a desired value.

Further, by setting the combined impedance value at the anti-resonance frequency generated between these resonance frequencies to be equal to or less than a predetermined value, the combined impedance value in the range from the operating frequency of the semiconductor element 29 to the frequency band of the harmonic component is widened. I'm making it smaller. In particular, by setting the combined impedance value at the anti-resonance frequency to 1 Ω or less, the inductance component of the power supply wiring layer or the ground wiring layers 24 to 26 can be suppressed to a very small value.
Even in a high-frequency region where the operating frequency of 29 is several GHz or more, it is possible to sufficiently reduce simultaneous switching noise.

Also in this example, if the anti-resonance frequency is set to a frequency that does not coincide with the operating frequency of the semiconductor element 29, the resonance frequency included in the impedance characteristics of the plurality of built-in capacitors is appropriately set. EMI noise can be reduced.

With such a structure, the set frequency range of the resonance frequency included in the impedance characteristics can be further expanded as compared with the case where a plurality of built-in capacitors having different resonance frequencies are formed by changing the thickness of the insulating layer. Therefore, it becomes easier to cope with the increase in the operating frequency of the semiconductor element 29.

In this example, the area of the large-area wiring layer of the power supply wiring layer or the ground wiring layer 26 is smaller than that of the power supply wiring layer or the ground wiring layer 24. On the other hand, the same effect can be obtained even if the area of the wide area wiring layer of the power supply wiring layer or the ground wiring layer 24 is reduced.

FIG. 4 is a sectional view similar to FIG.
In FIG. 4, 41 is a multilayer wiring board, 42 is an insulating substrate, and the insulating substrate 42 is formed by laminating a plurality of insulating layers 42a to 42e. In the multilayer wiring board 41 of this example,
The insulating layers 42a to 42c and 42e are basically formed of an insulating material having the same relative dielectric constant. A signal wiring group 43 is formed on the insulating layer 42b, and a signal wiring group 43 is formed on the insulating layer 42c.
Wide area power supply wiring layer or ground wiring layer facing 43
44 are formed, and the signal wiring group 43 has a microstrip line structure.

The plurality of signal wires included in the signal wire group 43 may transmit different electric signals.

In this example, a semiconductor element 49 such as a microprocessor or an ASIC is mounted on the upper surface of the multilayer wiring board 41, and a conductor bump 50 made of solder such as tin-lead alloy (Sn-Pb) or gold (Au) is used. The semiconductor device 49 is electrically connected to the multilayer wiring board 41 via a semiconductor device connection electrode 48 for connection. A semiconductor element is provided on the lower surface of the multilayer wiring board 41 opposite to the upper surface on which the semiconductor element 49 is mounted.
49 has an external electrode 47 for supplying power.

Also, 45 and 46 are power wiring layers or ground wiring layers having the same large area as 44. In this example, two power wiring layers or ground wiring layers 44 to 46 are provided in the multilayer wiring board 41. Are formed in parallel. At this time, the power supply wiring layer or the ground wiring layers 44 and 46 are different from the power supply wiring layer or the ground wiring layer 45. That is, when 44 and 46 are power wiring layers, 45 is a ground wiring layer, and when 44 and 46 are ground wiring layers, 45 is a power wiring layer.

In this example, the insulating layer 42d having the power supply wiring layer or the ground wiring layer 45 formed on the upper surface is different from the insulating layer 42d having the power supply wiring layer or the ground wiring layer 44 formed on the upper surface.
It is formed of an insulating material having a relative dielectric constant larger than 42c.
Thereby, the first built-in capacitor formed between the power supply wiring layer or the ground wiring layer 44 and the power supply wiring layer or the ground wiring layer 45, the power supply wiring layer or the ground wiring layer 45, and the power supply wiring layer or the ground wiring layer The capacitance value of the second built-in capacitor formed between 46 differs from that of the second built-in capacitor, and each built-in capacitor has an impedance characteristic including a different resonance frequency.

In this example, the resonance frequency included in the impedance characteristics of the first built-in capacitor is adjusted to the operating frequency band of the semiconductor element 49, and the resonance frequency included in the impedance characteristics of the second built-in capacitor is adjusted to the frequency of the harmonic component. Match the band. The resonance frequency included in the impedance characteristic of the built-in capacitor can be arbitrarily set by changing the capacitance value of the built-in capacitor formed by the power wiring layer or the ground wiring layers 44 to 46 having a large area. In this example, by changing the relative permittivity of the insulating layer 42c or 42d on which the power supply wiring layer or the ground wiring layer 44 or 45 is formed, the capacitance value of the built-in capacitor is changed, and the resonance value included in the impedance characteristic of the built-in capacitor is changed. The frequency is set to a desired value.

Further, by setting the combined impedance value at the anti-resonance frequency generated between these resonance frequencies to a predetermined value or less, the combined impedance value in the range from the operating frequency of the semiconductor element 49 to the frequency band of the harmonic component is widened. I'm making it smaller. In particular, by setting the combined impedance value at the anti-resonance frequency to 1 Ω or less, the inductance component of the power supply wiring layer or the ground wiring layers 44 to 46 can be extremely reduced.
It is possible to sufficiently reduce simultaneous switching noise even in a high-frequency region where the operating frequency is several GHz or more.

Also in this example, if the anti-resonance frequency is set to a frequency that does not match the operating frequency of the semiconductor element 49 by appropriately setting the resonance frequency included in the impedance characteristics of the plurality of built-in capacitors, it is more effective. EMI noise can be reduced.

With such a structure, the capacitance value of the built-in capacitor can be further increased, so that the impedance value can be further reduced.

In this example, the relative permittivity of the insulating layer 42d is larger than the relative permittivity of the insulating layer 42c. However, the relative permittivity of the insulating layer 42c may be larger than the relative permittivity of the insulating layer 42d. Similar effects can be obtained.

In the multilayer wiring board of the present invention, a similar wiring structure may be further laminated in multiple layers to form a multilayer wiring board.

The structure of the signal wiring includes a microstrip structure having a power wiring layer or a ground wiring layer formed facing the signal wiring, and a strip having a power wiring layer or a ground wiring layer above and below the signal wiring. It may have a coplanar structure in which a power supply wiring layer or a ground wiring layer is formed adjacent to the structure and signal wiring, and can be appropriately selected and used according to specifications required for a multilayer wiring board.

Further, a multilayer wiring board may be formed by attaching a chip resistor, a thin film resistor, a coil inductor, a cross inductor, a chip capacitor, an electrolytic capacitor, or the like.

The shape of each insulating layer in plan view is as follows:
In addition to the square shape and the rectangular shape, the shape may be a diamond shape, a hexagonal shape, an octagonal shape, or the like.

The multi-layer wiring board of the present invention includes a package for storing electronic parts such as a package for storing semiconductor elements, a board for mounting electronic parts, a so-called multi-chip module or multi-chip on which a large number of semiconductor elements are mounted. Used as a package or motherboard.

In the multilayer wiring board of the present invention, each insulating layer is formed by, for example, a ceramic green sheet laminating method.
Using inorganic insulating materials such as aluminum oxide sintered body, aluminum nitride based sintered body, silicon carbide based sintered body, silicon nitride based sintered body, mullite sintered body or glass ceramics, or polyimide, epoxy Electricity such as composite insulating material using resin, fluorine resin, organic insulating material such as polynorbornene or benzocyclobutene, or combining inorganic insulating powder such as ceramic powder with thermosetting resin such as epoxy resin It is formed using an insulating material.

These insulating layers are produced as follows. For example, in the case of an aluminum oxide-based sintered body, first, an appropriate organic binder or a solvent is added to a raw material powder such as aluminum oxide, silicon oxide, calcium oxide, or magnesium oxide to form a slurry. This is formed into a sheet by employing a conventionally known doctor blade method to obtain a ceramic green sheet. Then, a metal paste to be used for each signal wiring group and each wiring conductor layer is printed and applied in a predetermined pattern, and is laminated on top and bottom. Finally, the laminated body is fired at a temperature of about 1600 ° C. in a reducing atmosphere. Is done.

For example, in the case of an epoxy resin, an insulating layer of a glass epoxy resin or the like formed by impregnating a ceramic or a glass fiber woven cloth with an epoxy resin in general. An insulating layer made of an organic resin such as an epoxy resin formed by applying an organic resin precursor by a coating technique such as a spin coating method or a curtain coating method and performing a thermosetting treatment on the upper surface thereof, and copper. It is manufactured by alternately laminating thin film wiring conductor layers formed by adopting thin film forming technology such as electroless plating method and vapor deposition method and photolithography technology, and heating and curing at a temperature of about 170 ° C. .

The thickness of these insulating layers is appropriately set according to the characteristics of the material to be used so as to satisfy conditions such as mechanical strength and electrical characteristics corresponding to required specifications.

As a method for obtaining insulating layers having different dielectric constants, for example, an inorganic insulating material such as aluminum oxide, aluminum nitride, silicon carbide, silicon nitride, mullite or glass ceramics, or a polyimide or epoxy resin Add powder of high dielectric material such as barium titanate, strontium titanate, calcium titanate or magnesium titanate to organic insulating material such as fluorinated resin, polynorbornene or benzocyclobutene, and heat and cure at appropriate temperature By doing so, a material having a desired relative permittivity may be obtained.

At this time, the particle diameter of the high dielectric material to be added to and mixed with the inorganic insulating material or the organic insulating material is determined by the ratio in the insulating layer caused by adding and mixing the high dielectric material to the inorganic or organic insulating material. In order to reduce the occurrence of variation in the dielectric constant and the reduction in workability due to a change in the viscosity of the insulating layer, the thickness is preferably in the range of 0.5 μm to 50 μm.

The content of the high dielectric material to be added to and mixed with the inorganic insulating material or the organic insulating material is set so as to increase the relative dielectric constant of the insulating layer, and to make the inorganic insulating material or the organic insulating material highly compatible with the high dielectric material. In order to prevent a decrease in the adhesive strength of the material, the content is desirably 5% by weight to 75% by weight.

The wide area pattern as each signal wiring group or power supply layer or ground layer is made of, for example, tungsten (W), molybdenum (Mo), molybdenum manganese (M
o-Mn), metal powder such as copper (Cu), silver (Ag) or silver palladium (Ag-Pd), or copper (Cu), silver (Ag), nickel (Ni), chromium (C
r), titanium (Ti), gold (Au) or niobium (N
b) or a thin film of a metal material such as an alloy thereof.

Specifically, when a wide area pattern as each signal wiring group or power supply layer or ground layer is formed by metallizing metal powder of W, an appropriate organic binder, a solvent or the like is added to and mixed with W powder. The metal paste can be formed by printing and applying a predetermined pattern on a ceramic green sheet to be an insulating layer, and firing this together with a laminate of ceramic green sheets.

On the other hand, when a thin film of a metal material is formed,
For example, after a metal film is formed by a sputtering method, a vacuum evaporation method, or a plating method, a predetermined wiring pattern can be formed by a photolithography method.

In such a multilayer wiring board, by appropriately setting the wiring width of each signal wiring group according to the relative dielectric constant of the insulating layer in which each signal wiring group is provided, The characteristic impedance values of the signal wirings can be the same.

It should be noted that the present invention is not limited to the above-described embodiment, and that various changes may be made without departing from the spirit of the present invention. For example, three or more signal wiring groups may be formed between different insulating layers. Further, the number of capacitors formed in the multilayer wiring board may be three or more. Further, the shape of the pattern of the power supply layer or the ground layer may be a so-called mesh pattern having a large number of openings.

[0070]

According to the multilayer wiring board of the present invention, an electrode for connecting a semiconductor element is provided on an upper surface of an insulating substrate formed by laminating a plurality of insulating layers, and an external electrode for supplying power to the semiconductor element is provided on a lower surface. A multilayer wiring board including a built-in capacitor in which a power supply wiring layer and a ground wiring layer are disposed to face each other with an insulating layer interposed therebetween, and supplying power to a semiconductor element from an external electrode via the built-in capacitor. The built-in capacitor is formed such that a plurality of capacitors having different resonance frequencies are connected in parallel in a range from the operating frequency band of the semiconductor element to the frequency band of the harmonic component, and the anti-resonance frequency generated between the different resonance frequencies By setting the combined impedance value at or below the specified value, the resonance frequency with the lowest impedance value is semiconductive for each built-in capacitor. It can be set to be dispersed in the range of the frequency band of the harmonic component from the operating frequency of the element, and the combined impedance value in the range of the frequency band of the harmonic component from the operating frequency of the semiconductor element can be reduced in a wide frequency band. it can.

Further, since the combined impedance value at the anti-resonance frequency is set to 1 Ω or less, the inductance components of the power supply wiring layer and the ground wiring layer are reduced, and even in the high frequency band where the operating frequency of the semiconductor element is several GHz or more. Simultaneous switching noise can be reduced including the frequency band of the harmonic component.

Further, since the power supply wiring layer and the ground wiring layer have a large area and a built-in capacitor having a large capacitance value of several nF can be formed, simultaneous switching can be performed even in a frequency band where the operating frequency of the semiconductor element is as low as several MHz. Noise can be reduced.

Further, the anti-resonance frequency included in the impedance characteristic of the built-in capacitor can be set to a frequency that does not match the frequency of the harmonic component included in the electric signal by controlling the capacitance values of the plurality of built-in capacitors. , EMI noise can also be reduced.

As a result, according to the present invention, simultaneous switching noise and EMI noise can be reduced.
A multilayer wiring board suitable for an electronic circuit board or the like on which electronic components such as a semiconductor element operating at high speed are mounted can be provided.

[Brief description of the drawings]

FIG. 1 is a sectional view showing an example of an embodiment of a multilayer wiring board of the present invention.

FIG. 2 is a diagram showing an example of impedance characteristics of a built-in capacitor in the multilayer wiring board of the present invention.

FIG. 3 is a sectional view showing another example of the embodiment of the multilayer wiring board of the present invention.

FIG. 4 is a sectional view showing another example of the embodiment of the multilayer wiring board of the present invention.

FIG. 5A is a cross-sectional view of an essential part showing an example of an embodiment of a multilayer wiring board of the present invention, and FIG. 5B shows an example of impedance characteristics of a built-in capacitor of the multilayer wiring board of the present invention. FIG.

FIG. 6 is a sectional view of a main part showing an example of an embodiment of the multilayer wiring board of the present invention.

[Explanation of symbols]

1, 21, 41: multilayer wiring board 2, 22, 42: insulating substrate 2a-2e, 22a-22e, 42a-42e: insulating layer 4, 5, 6, 24, 25, 26, 44 , 45, 46 ... power supply wiring layer or ground wiring layer 7, 27, 47 ... external electrode 8, 28, 48 ... semiconductor element connection electrode 9, 29, 49 ... semiconductor element 61, 81・ ・ ・ External electrodes for power supply wiring 63, 65, 83 ・ ・ ・ Power supply wiring layers 67, 85 ・ ・ ・ Electrode for semiconductor element connection for power supply wiring 68, 86 ・ ・ ・ External electrodes 70, 88 for ground wiring , 90: Ground wiring layer 72, 92: Electrode for connecting semiconductor element for ground wiring

Claims (2)

[Claims] An insulating substrate formed by laminating a plurality of insulating layers is provided with an electrode for connecting a semiconductor element on an upper surface and an external electrode for supplying power to the semiconductor element on a lower surface, and a power supply wiring layer and a ground wiring layer inside. Comprises a built-in capacitor formed oppositely disposed with the insulating layer interposed therebetween, and a multilayer wiring board for supplying power to the semiconductor element from the external electrode through the built-in capacitor, wherein the built-in capacitor is A plurality of components having different resonance frequencies in a range from the operating frequency band of the semiconductor element to the frequency band of the harmonic component are formed so as to be connected in parallel, and a combined impedance at an anti-resonance frequency generated between the different resonance frequencies A multilayer wiring board having a value equal to or less than a predetermined value. 2. The multilayer wiring board according to claim 1, wherein a combined impedance value at the anti-resonance frequency is 1Ω or less.