JP2008515224A5 - - Google Patents

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Publication number
JP2008515224A5
JP2008515224A5 JP2007534608A JP2007534608A JP2008515224A5 JP 2008515224 A5 JP2008515224 A5 JP 2008515224A5 JP 2007534608 A JP2007534608 A JP 2007534608A JP 2007534608 A JP2007534608 A JP 2007534608A JP 2008515224 A5 JP2008515224 A5 JP 2008515224A5
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JP
Japan
Prior art keywords
semiconductor layer
gate electrode
semiconductor
adjacent
semiconductor device
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Application number
JP2007534608A
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English (en)
Japanese (ja)
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JP2008515224A (ja
JP5147403B2 (ja
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Priority claimed from US10/952,676 external-priority patent/US7067868B2/en
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Publication of JP2008515224A publication Critical patent/JP2008515224A/ja
Publication of JP2008515224A5 publication Critical patent/JP2008515224A5/ja
Application granted granted Critical
Publication of JP5147403B2 publication Critical patent/JP5147403B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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JP2007534608A 2004-09-29 2005-08-31 歪みチャネルを備える二重ゲートデバイス Expired - Lifetime JP5147403B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/952,676 2004-09-29
US10/952,676 US7067868B2 (en) 2004-09-29 2004-09-29 Double gate device having a heterojunction source/drain and strained channel
PCT/US2005/031000 WO2006039037A1 (en) 2004-09-29 2005-08-31 Double gate device having a strained channel

Publications (3)

Publication Number Publication Date
JP2008515224A JP2008515224A (ja) 2008-05-08
JP2008515224A5 true JP2008515224A5 (cg-RX-API-DMAC7.html) 2008-07-31
JP5147403B2 JP5147403B2 (ja) 2013-02-20

Family

ID=36098040

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007534608A Expired - Lifetime JP5147403B2 (ja) 2004-09-29 2005-08-31 歪みチャネルを備える二重ゲートデバイス

Country Status (5)

Country Link
US (1) US7067868B2 (cg-RX-API-DMAC7.html)
EP (1) EP1797592A1 (cg-RX-API-DMAC7.html)
JP (1) JP5147403B2 (cg-RX-API-DMAC7.html)
KR (1) KR20070061565A (cg-RX-API-DMAC7.html)
WO (1) WO2006039037A1 (cg-RX-API-DMAC7.html)

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US7279758B1 (en) * 2006-05-24 2007-10-09 International Business Machines Corporation N-channel MOSFETs comprising dual stressors, and methods for forming the same
US20080293192A1 (en) * 2007-05-22 2008-11-27 Stefan Zollner Semiconductor device with stressors and methods thereof
KR100848242B1 (ko) * 2007-07-11 2008-07-24 주식회사 동부하이텍 반도체 소자 및 반도체 소자의 제조 방법
JP5164745B2 (ja) * 2007-09-03 2013-03-21 株式会社半導体エネルギー研究所 記憶装置
US7671418B2 (en) * 2007-09-14 2010-03-02 Advanced Micro Devices, Inc. Double layer stress for multiple gate transistors
US8007727B2 (en) * 2008-05-30 2011-08-30 Intel Corporation Virtual semiconductor nanowire, and methods of using same
US20100279479A1 (en) * 2009-05-01 2010-11-04 Varian Semiconductor Equipment Associates, Inc. Formation Of Raised Source/Drain On A Strained Thin Film Implanted With Cold And/Or Molecular Carbon
US8053318B2 (en) * 2009-06-25 2011-11-08 International Business Machines Corporation FET with replacement gate structure and method of fabricating the same
US8354719B2 (en) * 2010-02-18 2013-01-15 GlobalFoundries, Inc. Finned semiconductor device with oxygen diffusion barrier regions, and related fabrication methods
KR101321833B1 (ko) 2010-04-09 2013-10-23 가부시키가이샤 한도오따이 에네루기 켄큐쇼 산화물 반도체 메모리 장치
JP5592281B2 (ja) * 2011-01-05 2014-09-17 猛英 白土 半導体装置及びその製造方法
US8803233B2 (en) * 2011-09-23 2014-08-12 International Business Machines Corporation Junctionless transistor
JP6050034B2 (ja) * 2012-06-12 2016-12-21 猛英 白土 半導体装置及びその製造方法
US8823059B2 (en) 2012-09-27 2014-09-02 Intel Corporation Non-planar semiconductor device having group III-V material active region with multi-dielectric gate stack
US8957476B2 (en) * 2012-12-20 2015-02-17 Intel Corporation Conversion of thin transistor elements from silicon to silicon germanium
US9559181B2 (en) 2013-11-26 2017-01-31 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for FinFET device with buried sige oxide
US9147682B2 (en) 2013-01-14 2015-09-29 Taiwan Semiconductor Manufacturing Company, Ltd. Fin spacer protected source and drain regions in FinFETs
US9502538B2 (en) 2014-06-12 2016-11-22 Taiwan Semiconductor Manufacturing Co., Ltd Structure and formation method of fin-like field effect transistor
US9490365B2 (en) 2014-06-12 2016-11-08 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and formation method of fin-like field effect transistor
US9490346B2 (en) 2014-06-12 2016-11-08 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and formation method of fin-like field effect transistor
US8916872B1 (en) 2014-07-11 2014-12-23 Inoso, Llc Method of forming a stacked low temperature diode and related devices
US9087689B1 (en) 2014-07-11 2015-07-21 Inoso, Llc Method of forming a stacked low temperature transistor and related devices
KR102255174B1 (ko) 2014-10-10 2021-05-24 삼성전자주식회사 활성 영역을 갖는 반도체 소자 및 그 형성 방법
US10211781B2 (en) 2015-07-29 2019-02-19 Circuit Seed, Llc Complementary current field-effect transistor devices and amplifiers
US10514716B2 (en) 2015-07-30 2019-12-24 Circuit Seed, Llc Reference generator and current source transistor based on complementary current field-effect transistor devices
US10491177B2 (en) 2015-07-30 2019-11-26 Circuit Seed, Llc Multi-stage and feed forward compensated complementary current field effect transistor amplifiers
CN108141180A (zh) 2015-07-30 2018-06-08 电路种子有限责任公司 基于互补电流场效应晶体管装置的低噪声跨阻抗放大器
CN108140613B (zh) 2015-12-14 2020-07-28 电路种子有限责任公司 过饱和电流场效应晶体管和跨阻抗mos装置
KR102402945B1 (ko) 2017-08-31 2022-05-30 마이크론 테크놀로지, 인크 금속 산화물 반도체 디바이스의 접촉을 위한 반도체 디바이스, 트랜지스터, 및 관련된 방법
US10943953B2 (en) 2017-08-31 2021-03-09 Micron Technology, Inc. Semiconductor devices, hybrid transistors, and related methods
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US11177366B2 (en) 2020-01-13 2021-11-16 International Business Machines Corporation Gate induced drain leakage reduction in FinFETs

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JP3450547B2 (ja) * 1995-09-14 2003-09-29 株式会社東芝 半導体装置およびその製造方法
JP3383154B2 (ja) * 1996-06-20 2003-03-04 株式会社東芝 半導体装置
US6124627A (en) 1998-12-03 2000-09-26 Texas Instruments Incorporated Lateral MOSFET having a barrier between the source/drain region and the channel region using a heterostructure raised source/drain region
US7312485B2 (en) 2000-11-29 2007-12-25 Intel Corporation CMOS fabrication process utilizing special transistor orientation
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US6638802B1 (en) 2002-06-20 2003-10-28 Intel Corporation Forming strained source drain junction field effect transistors
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US7303949B2 (en) * 2003-10-20 2007-12-04 International Business Machines Corporation High performance stress-enhanced MOSFETs using Si:C and SiGe epitaxial source/drain and method of manufacture

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