JP2008244290A - Multilayer printed wiring board - Google Patents

Multilayer printed wiring board Download PDF

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Publication number
JP2008244290A
JP2008244290A JP2007084929A JP2007084929A JP2008244290A JP 2008244290 A JP2008244290 A JP 2008244290A JP 2007084929 A JP2007084929 A JP 2007084929A JP 2007084929 A JP2007084929 A JP 2007084929A JP 2008244290 A JP2008244290 A JP 2008244290A
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printed wiring
wiring board
multilayer printed
anisotropic conductive
conductive film
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JP5022750B2 (en
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Masaru Kojima
勝 小島
Toshiyuki Kobayashi
利行 小林
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Nippon CMK Corp
CMK Corp
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Nippon CMK Corp
CMK Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board having high reliability, even when if using an anisotropic conductive film. <P>SOLUTION: The multilayer printed wiring board is configured such that at least two printed wiring boards, each having an insulating substrate equipped with conductor circuits having different thicknesses on at least one surface of the front surface and the rear surface of the substrate are laminated, with the conductor circuits having different thicknesses made to face each other via the anisotropic conductive film. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は多層プリント配線板、特に異方性導電膜を使用した多層プリント配線板に関する。   The present invention relates to a multilayer printed wiring board, and more particularly to a multilayer printed wiring board using an anisotropic conductive film.

従来、異方性導電ペーストや異方性導電フィルムなどを使用して、端子間を接続する方法が知られている。これらは主に、基板の突起電極の層間に異方性導電ペーストや異方性導電フィルムを介して回路間の接続のみを目的とするものであった。   Conventionally, a method of connecting terminals using an anisotropic conductive paste or an anisotropic conductive film is known. These were mainly intended only for connection between circuits via an anisotropic conductive paste or anisotropic conductive film between the protruding electrodes of the substrate.

図6は斯かる従来例を示すもので、絶縁基板601に層間接続用電極602を設けた基板と、もう一方の絶縁基板601に層間接続用電極602を設けた基板の間に異方性導電フィルム603を介して積層し、層間接続用電極602の間に導電粒子604を挟み込むことで層間接続されたプリント基板600となっている(例えば特許文献1参照)。   FIG. 6 shows such a conventional example. An anisotropic conductive film is provided between a substrate in which an interlayer connection electrode 602 is provided on an insulating substrate 601 and a substrate in which an interlayer connection electrode 602 is provided on the other insulating substrate 601. The printed circuit board 600 is laminated via a film 603 and is interlayer-connected by sandwiching conductive particles 604 between the interlayer connection electrodes 602 (see, for example, Patent Document 1).

また、図7は他の従来例を示すもので、絶縁基板701の両面に厚い回路702aと702b、薄い回路703a、703bを形成し、その上下に異方性導電フィルム704aと704bを介して最外層の導体回路706aと706bを形成することにより、内層の厚みの厚い導体回路702a、702bと上層の導体回路706a、706bの間に導電粒子705a、705bが挟まれ、層間の導通が得られたビルドアップ基板700となっている(例えば特許文献2参照)。
特開2003−318502号公報 特開2001−326469号公報
FIG. 7 shows another conventional example. Thick circuits 702a and 702b and thin circuits 703a and 703b are formed on both surfaces of an insulating substrate 701, and the anisotropic conductive films 704a and 704b are formed on the upper and lower sides thereof. By forming the outer layer conductor circuits 706a and 706b, the conductive particles 705a and 705b are sandwiched between the inner layer thick conductor circuits 702a and 702b and the upper layer conductor circuits 706a and 706b, and conduction between the layers is obtained. This is a build-up substrate 700 (see, for example, Patent Document 2).
JP 2003-318502 A JP 2001-326469 A

しかしながら、上述した図6に示す従来例では、単に電極を層間接続にのみ使用しているに過ぎず、多層プリント配線板として利用するものではなかった。特に、層間接続電極と同一面上に配線回路を形成することは何ら想定されていないものであった。   However, in the conventional example shown in FIG. 6 described above, the electrodes are merely used for interlayer connection, and are not used as a multilayer printed wiring board. In particular, it has not been assumed at all that a wiring circuit is formed on the same surface as the interlayer connection electrode.

また、図7に示す従来例では、ビルドアップ多層プリント配線板についての記載があり、コア基板の導電パターンの厚みの厚い部分を層間接続として用いてはいるものの、この従来例のように、コア基板上に異方性導電フィルムをビルドアップしたのでは、積層時の圧力がうまくかからないため、実際にはコア基板上に厚みの厚い導電パターンを形成しても安定した導通を得ることが出来ないという問題が発生していた。また、プリント配線板の表層に異方性導電フィルムを用いると部品実装の際に表層の絶縁層に剛性がなく部品実装時に表面が凹んでしまうという問題も発生していた。   Further, in the conventional example shown in FIG. 7, there is a description of a build-up multilayer printed wiring board, and although the thick part of the conductive pattern of the core substrate is used as an interlayer connection, When an anisotropic conductive film is built up on a substrate, the pressure at the time of lamination does not work, so even if a thick conductive pattern is actually formed on the core substrate, stable conduction cannot be obtained. The problem that occurred. Further, when an anisotropic conductive film is used for the surface layer of the printed wiring board, there is a problem that the surface insulating layer does not have rigidity when the component is mounted and the surface is recessed when the component is mounted.

本発明は、上記問題点に鑑み、異方性導電膜を用いても接続信頼性の高い多層プリント配線板を提供することを課題としている。   In view of the above problems, an object of the present invention is to provide a multilayer printed wiring board having high connection reliability even when an anisotropic conductive film is used.

本発明は、表裏両面の少なくとも一方の面に厚みの異なる導体回路を備えた絶縁基板を有するプリント配線板が少なくとも2枚、異方性導電膜を介して、前記厚みの異なる導体回路同士を対向せしめて積層配置されていることを特徴とする多層プリント配線板により上記課題を解決したものである。   In the present invention, at least two printed wiring boards each having an insulating substrate having conductor circuits with different thicknesses on at least one of the front and back surfaces face each other with the conductive circuits having different thicknesses interposed therebetween via an anisotropic conductive film. The above-mentioned problems are solved by a multilayer printed wiring board characterized by being laminated at least.

本発明多層プリント配線板は、異方性導電膜を介した上下の基板に導体回路の厚い部分と薄い部分を備えているため、当該導体回路の厚い部分同士で安定した層間接続を得ることができる。   Since the multilayer printed wiring board of the present invention has thick and thin portions of the conductor circuit on the upper and lower substrates via the anisotropic conductive film, a stable interlayer connection can be obtained between the thick portions of the conductor circuit. it can.

また、本発明は、前記異方性導電膜側に配置された導体回路のうち厚みの薄い導体回路が配線回路を構成していると共に、厚みの厚い導体層が層間接続層を構成していることを特徴とする。   In the present invention, among the conductor circuits arranged on the anisotropic conductive film side, a thin conductor circuit constitutes a wiring circuit, and a thick conductor layer constitutes an interlayer connection layer. It is characterized by that.

これにより、異方性導電膜を介した面にも配線回路が形成されるため、より高密度な回路を形成することができる。   Thereby, since a wiring circuit is also formed on the surface through the anisotropic conductive film, a higher-density circuit can be formed.

また、本発明は、前記異方性導電膜側に配置された導体回路間に、絶縁層が形成されていることを特徴とする。   Moreover, the present invention is characterized in that an insulating layer is formed between conductor circuits arranged on the anisotropic conductive film side.

これにより、絶縁基板上の導体回路間に導電粒子が入り込まないため、回路間の絶縁性が保たれる。   Thereby, since conductive particles do not enter between conductor circuits on the insulating substrate, insulation between circuits is maintained.

また、本発明は、前記異方性導電膜側に配置された導体回路上に、絶縁層が形成されていることを特徴とする。   Further, the present invention is characterized in that an insulating layer is formed on a conductor circuit disposed on the anisotropic conductive film side.

これにより、異方性導電膜の厚みを薄くしても導体回路上に絶縁層が形成されているため層間の絶縁性が保たれる。   Thereby, even if the thickness of the anisotropic conductive film is reduced, the insulation between the layers is maintained because the insulating layer is formed on the conductor circuit.

また、本発明は、最外層の導体回路が、内層の導体回路に比べより微細化されていることを特徴とする。   Further, the present invention is characterized in that the outermost conductor circuit is made finer than the inner conductor circuit.

本発明においては、最外層の導体回路は、異方性導電膜と接続する部分がないので、より薄く形成することが可能なため、内層回路よりも微細化が可能になる。   In the present invention, since the outermost conductor circuit does not have a portion connected to the anisotropic conductive film, the outermost conductor circuit can be formed thinner, and thus can be made finer than the inner layer circuit.

本発明によれば、異方性導電膜を利用した多層プリント配線板であっても、安定した層間接続性と、異方性導電膜内に形成した導体回路の絶縁性を確保することができ、表層に部品を実装しても表層の絶縁層に凹みがなく安定した部品の実装が可能となる。   According to the present invention, even in a multilayer printed wiring board using an anisotropic conductive film, stable interlayer connectivity and insulation of a conductor circuit formed in the anisotropic conductive film can be ensured. Even if a component is mounted on the surface layer, the surface insulating layer does not have a recess, and a stable component mounting is possible.

本発明の第一の実施の形態を図1(a)〜(d)を用いて説明する。   A first embodiment of the present invention will be described with reference to FIGS.

図1(d)は本発明多層プリント配線板の第一の実施の形態を示す概略断面説明図である。
当該図1(d)において、P1は4層の本発明多層プリント配線板で、絶縁基板の表裏両面の一方の面に厚みの厚い導体回路101と厚みの薄い導体回路102を備えている両面基板100が2枚、異方性導電膜103を介して、当該厚みの厚い導体回路101同士及び当該厚みの薄い導体回路102同士をそれぞれ対向せしめて積層配置されているものである。
FIG. 1D is a schematic cross-sectional explanatory view showing a first embodiment of the multilayer printed wiring board of the present invention.
In FIG. 1 (d), P1 is a four-layer multilayer printed wiring board according to the present invention, and is provided with a thick conductive circuit 101 and a thin conductive circuit 102 on one side of both sides of the insulating substrate. Two conductive layers 100 are laminated and arranged such that the thick conductive circuits 101 and the thin conductive circuits 102 face each other through an anisotropic conductive film 103.

また、当該厚みの薄い導体回路102が配線回路を構成している一方、当該厚みの厚い導体回路101は層間接続層を構成している。   Further, the thin conductor circuit 102 constitutes a wiring circuit, while the thick conductor circuit 101 constitutes an interlayer connection layer.

次に、斯かる本発明多層プリント配線板P1の製造方法について説明する。
まず、図1(a)、(c)に示す両面基板100を2枚用意する。ここに各両面基板100は、その絶縁基板の一方の面に厚みの厚い導体回路101と厚みの薄い導体回路102を備えている。次いで、当該両面基板100の間に図1(b)に示す異方性導電膜103を介在せしめると共に、当該両面基板100の厚みの厚い導体回路101同士及び厚みの薄い導体回路102同士を対向せしめて2枚の両面基板100を積層することによって、図(d)に示す4層の本発明プリント配線板P1を得る。
Next, a method for manufacturing the multilayer printed wiring board P1 of the present invention will be described.
First, two double-sided substrates 100 shown in FIGS. 1A and 1C are prepared. Here, each double-sided board 100 includes a thick conductor circuit 101 and a thin conductor circuit 102 on one surface of the insulating substrate. Next, the anisotropic conductive film 103 shown in FIG. 1B is interposed between the double-sided substrates 100, and the thick conductive circuits 101 and the thin conductive circuits 102 of the double-sided substrate 100 are opposed to each other. By laminating the two double-sided boards 100, a four-layer printed wiring board P1 of the present invention shown in FIG.

尚、上記両面基板100は、例えば次のようにして得られる。
まず、両面銅張積層板にレーザ加工にて非貫通穴を形成し、表層の銅箔部分を写真法で回路形成する。次いで、非貫通穴を含む全面に無電解銅めっき処理を施し、非貫通穴及び層間接続を形成する導体部分以外には、めっきレジストを写真法により形成する。次いで、非貫通穴及びめっきレジストの露出した部分に電解銅めっきを形成する。次いで、めっきレジストを剥離し、全面に施された無電解銅めっきをフラッシュエッチングして回路形成することにより両面基板100を得る。
The double-sided substrate 100 is obtained, for example, as follows.
First, a non-through hole is formed in a double-sided copper-clad laminate by laser processing, and a circuit is formed on the surface copper foil portion by a photographic method. Next, electroless copper plating is performed on the entire surface including the non-through holes, and a plating resist is formed by a photographic method except for the conductor portions that form the non-through holes and the interlayer connection. Next, electrolytic copper plating is formed on the exposed portions of the non-through holes and the plating resist. Next, the double-sided substrate 100 is obtained by removing the plating resist and flash-etching the electroless copper plating applied to the entire surface to form a circuit.

また、上記異方性導電膜103は、異方性導電フィルムや異方性導電ペーストなどからなり、バインダーとしては、熱硬化性樹脂や熱可塑性樹脂が使用される。含有される導電粒子105としては、ニッケル、ニッケルに金めっき処理したもの、ニッケルに金めっき処理したものに絶縁皮膜を形成したものが主に使用され、形状としては、球状、燐片状、針状、などが挙げられる。因に、球状の場合、直径が2μm〜20μmの大きさのものが好適に使用される。   The anisotropic conductive film 103 is made of an anisotropic conductive film, an anisotropic conductive paste, or the like, and a thermosetting resin or a thermoplastic resin is used as the binder. The conductive particles 105 contained are mainly nickel, nickel plated with gold, nickel plated with an insulating film, and the shape is spherical, flake shaped, needle And the like. In the case of a spherical shape, one having a diameter of 2 μm to 20 μm is preferably used.

本発明多層プリント配線板P1は、図1(d)に示すように、互いに厚みの厚い導体回路101部分が、異方性導電膜103側に形成されるため、安定した状態で導電粒子105を該導体回路101部分で挟むことができ、安定した導通を得ることができる。
また、本発明多層プリント配線板P1は、両面基板100に補強材、例えば、ガラスクロスやガラス繊維などを含んでいるものを使用することにより、剛性のある多層プリント配線板を得ることができる。
As shown in FIG. 1 (d), the multilayer printed wiring board P1 of the present invention has a conductive circuit 101 portion in a stable state because the thick conductive circuit 101 portions are formed on the anisotropic conductive film 103 side. The conductor circuit 101 can be sandwiched and stable conduction can be obtained.
Moreover, the multilayer printed wiring board P1 of the present invention can obtain a rigid multilayer printed wiring board by using a reinforcing material such as glass cloth or glass fiber for the double-sided substrate 100.

また、本発明多層プリント配線板P1は、最外層の絶縁層に積層板が使用されているため、最外層の導体回路に部品を実装してもへこむ事がない。さらに、異方性導電膜103を中心に上下対象構造となるため、基板の反りを抑制する効果もある。加えて最外層の導体回路106は、異方性導電膜103と接続する部分がないのでより薄く形成すること可能なため、内層回路よりも微細化が可能となる。   In addition, since the multilayer printed wiring board P1 of the present invention uses a laminated board as the outermost insulating layer, it does not dent even when components are mounted on the outermost conductor circuit. Further, since the upper and lower target structures are formed around the anisotropic conductive film 103, there is an effect of suppressing warpage of the substrate. In addition, since the outermost conductor circuit 106 does not have a portion connected to the anisotropic conductive film 103 and can be formed thinner, it can be made finer than the inner layer circuit.

次に、本発明の第二の実施の形態を図2(a)〜(d)を用いて説明する。   Next, a second embodiment of the present invention will be described with reference to FIGS.

図2(d)は本発明多層プリント配線板の第二の実施の形態を示す概略断面説明図である。
当該図2(d)において、P2は4層の本発明多層プリント配線板で、異方性導電膜103側に配置された厚みの薄い導体回路102間に、絶縁層104が形成されている以外は図1に示した多層プリント配線板P1と同様に構成されている。
FIG. 2 (d) is a schematic cross-sectional explanatory view showing a second embodiment of the multilayer printed wiring board of the present invention.
In FIG. 2D, P2 is a four-layer multilayer printed wiring board of the present invention, except that an insulating layer 104 is formed between thin conductive circuits 102 arranged on the anisotropic conductive film 103 side. Is configured in the same manner as the multilayer printed wiring board P1 shown in FIG.

また、斯かる本発明多層プリント配線板P2も、図2(a)〜(d)に示すように、両面基板100の厚みの薄い導体回路102間に、予め絶縁層104を形成した後、積層する以外は図1に示した製造方法と同様に製造される。   In addition, as shown in FIGS. 2A to 2D, the multilayer printed wiring board P <b> 2 of the present invention is also laminated after an insulating layer 104 is formed in advance between the thin conductive circuits 102 of the double-sided substrate 100. The manufacturing method is the same as the manufacturing method shown in FIG.

上記第一の実施の形態に係る多層プリント配線板P1で、異方性導電膜103の厚みが薄くなったり、異方性導電膜103側の厚みの薄い導体回路102が微細になった場合は、導体回路間の絶縁層と層間の絶縁性の向上のために、第二の実施の形態のように、当該内層の導体回路間に絶縁層104を設けるのがより望ましい。   In the multilayer printed wiring board P1 according to the first embodiment, when the thickness of the anisotropic conductive film 103 becomes thin or the thin conductive circuit 102 on the anisotropic conductive film 103 side becomes fine In order to improve the insulation between the insulating layers between the conductor circuits and the layers, it is more desirable to provide the insulating layer 104 between the conductor circuits of the inner layer as in the second embodiment.

次に、本発明の第三の実施形態を図3(a)〜(d)を用いて説明する。   Next, a third embodiment of the present invention will be described with reference to FIGS.

図3(d)は本発明多層プリント配線板の第三の実施の形態を示す概略断面説明図である。
当該図3(d)において、P3は8層の本発明多層プリント配線板で、図1の両面基板100に代えて4層基板200が用いられている以外は図1に示した多層プリント配線板P1と同様に構成されている。
FIG. 3 (d) is a schematic cross-sectional explanatory view showing a third embodiment of the multilayer printed wiring board of the present invention.
3 (d), P3 is an 8-layer multilayer printed wiring board of the present invention, and the multilayer printed wiring board shown in FIG. 1 is used except that a four-layer board 200 is used instead of the double-sided board 100 of FIG. The configuration is the same as P1.

また、斯かる本発明多層プリント配線板P3は次のようにして製造される。
まず、図3(a)、(c)に示すように、貫通4層基板200を2枚用意する。ここに各4層基板200は、その絶縁基板の一方の面に、厚みの厚い導体回路201と厚みの薄い導体回路202を備えている。次いで、当該4層基板200の間に図3(b)に示す異方性導電膜203を介在せしめると共に、当該貫通4層基板200の厚みの厚い導体回路201同士及び厚みの薄い導体回路202同士を対向せしめて2枚の貫通4層基板200を積層することによって、図3(d)に示す8層の本発明多層プリント配線板P3を得る。
Moreover, the multilayer printed wiring board P3 of the present invention is manufactured as follows.
First, as shown in FIGS. 3A and 3C, two through four-layer substrates 200 are prepared. Here, each four-layer substrate 200 includes a thick conductor circuit 201 and a thin conductor circuit 202 on one surface of the insulating substrate. Next, the anisotropic conductive film 203 shown in FIG. 3B is interposed between the four-layer substrates 200, and the conductive circuits 201 having a large thickness and the conductive circuits 202 having a small thickness are disposed between the through-four-layer substrates 200. Are stacked so that two through-four-layer substrates 200 are laminated to obtain an 8-layer multilayer printed wiring board P3 of the present invention shown in FIG.

尚、当該貫通4層基板200のめっきスルーホールには、導電性ペーストや非導電性ペースト、絶縁樹脂にフィラーが充填された充填物が充填され、蓋めっきされている。   The plated through hole of the through four-layer substrate 200 is filled with a conductive paste, a non-conductive paste, or a filler in which an insulating resin is filled, and is plated with a lid.

本発明多層プリント配線板P3によれば、内層側のスルーホール部分のランドの導体厚みが厚く形成され、異方性導電膜203に含まれる導電粒子が該導体厚の厚い部分に挟まれた状態となるので、安定した導通を得ることができる。   According to the multilayer printed wiring board P3 of the present invention, the conductor thickness of the land in the through hole portion on the inner layer side is formed thick, and the conductive particles contained in the anisotropic conductive film 203 are sandwiched between the thick conductor portions. Therefore, stable conduction can be obtained.

次に、本発明の第四の実施の形態を図4(a)〜(d)を用いて説明する。   Next, a fourth embodiment of the present invention will be described with reference to FIGS.

図4(d)は本発明多層プリント配線板の第四の実施の形態を示す概略断面説明図である。
当該図4(d)において、P4は8層の本発明多層プリント配線板で、異方性導電膜203側に配置された厚みの薄い導体回路202間及びその上部に、絶縁層204が形成されている以外は図3に示した多層プリント配線板P3と同様に構成されている。
FIG. 4D is a schematic cross-sectional explanatory view showing a fourth embodiment of the multilayer printed wiring board of the present invention.
In FIG. 4D, P4 is an eight-layer multilayer printed wiring board of the present invention, and an insulating layer 204 is formed between and above the thin conductive circuit 202 disposed on the anisotropic conductive film 203 side. The multi-layer printed wiring board P3 shown in FIG.

また、斯かる本発明多層プリント配線板P4も、図4(a)〜(d)に示すように、4層基板200の厚みの薄い導体回路202間及びその上部に、予め絶縁層204を塗布形成した後、積層する以外は図3に示した製造方法と同様に製造される。   In addition, as shown in FIGS. 4A to 4D, the multilayer printed wiring board P4 of the present invention also has an insulating layer 204 applied in advance between and above the thin conductor circuit 202 of the four-layer board 200. After the formation, the manufacturing method is the same as the manufacturing method shown in FIG.

上記第三の実施の形態に係る多層プリント配線板P3で、異方性導電膜203の厚みが薄くなったり、異方性導電膜203側の厚みの薄い導体回路202が微細になった場合は、導体回路間の絶縁性と層間の絶縁性の向上のために、第四の実施の形態のように、当該内層の導体回路間やその上部に、絶縁層204を設けるのがより好ましい。   In the multilayer printed wiring board P3 according to the third embodiment, when the anisotropic conductive film 203 is thin or the thin conductive circuit 202 on the anisotropic conductive film 203 side is fine In order to improve the insulation between the conductor circuits and the insulation between the layers, it is more preferable to provide the insulation layer 204 between the conductor circuits of the inner layer or in the upper part thereof as in the fourth embodiment.

次に、本発明の第五の実施の形態を図5(a)〜(f)を用いて説明する。   Next, a fifth embodiment of the present invention will be described with reference to FIGS.

図5(f)は本発明多層プリント配線板の第五の実施の形態を示す概略断面説明図である。
当該図5(f)において、P5は6層の本発明多層プリント配線板で、厚みの薄い導体回路302間及びその上部に絶縁層304が形成された両面基板300が3枚積層されている以外は図1に示した多層プリント配線板P1と同様に構成されている。
FIG. 5 (f) is a schematic cross-sectional explanatory view showing a fifth embodiment of the multilayer printed wiring board of the present invention.
In FIG. 5 (f), P5 is a six-layer multilayer printed wiring board according to the present invention, except that three double-sided substrates 300 each having an insulating layer 304 formed between the thin conductor circuits 302 and above are laminated. Is configured in the same manner as the multilayer printed wiring board P1 shown in FIG.

また、斯かる本発明多層プリント配線板P5は次のようにして製造される。
まず、図5(a)、(c)、(e)に示すように、両面基板300を3枚用意する。ここに図5(a)、(c)に示す両面基板300は、その絶縁基板の一方の面に厚みの厚い導体回路301と厚みの薄い導体回路302を備えていると共に、厚みの薄い導体回路302間及びその上部には予め絶縁層304が形成されており、また、図5(b)に示す両面基板300は、その絶縁基板の表裏両面に厚みの厚い導体回路301と厚みの薄い導体回路302を備えていると共に、厚みの薄い導体回路302間及びその上部には予め絶縁層304が形成されている。次いで、各両面基板300の間に図5(b)、(d)に示す異方性導電膜303を介在せしめると共に、当該各両面基板300の厚みの厚い導体回路301同士及び厚みの薄い導体回路302同士を対向せしめて3枚の両面基板300を一括積層することによって、図5(f)に示す6層の本発明多層プリント配線板P5を得る。
The multilayer printed wiring board P5 of the present invention is manufactured as follows.
First, as shown in FIGS. 5A, 5C, and 5E, three double-sided substrates 300 are prepared. Here, the double-sided board 300 shown in FIGS. 5A and 5C includes a thick conductor circuit 301 and a thin conductor circuit 302 on one surface of the insulating substrate, and a thin conductor circuit. An insulating layer 304 is formed in advance between and above 302, and a double-sided board 300 shown in FIG. 5B has a thick conductor circuit 301 and a thin conductor circuit on both front and back surfaces of the insulating board. 302, and an insulating layer 304 is formed in advance between and above the thin conductor circuit 302. Next, the anisotropic conductive film 303 shown in FIGS. 5B and 5D is interposed between the double-sided substrates 300, and the thick conductive circuits 301 of the double-sided substrates 300 and the thin conductive circuits are provided. The multilayer printed wiring board P5 of the present invention having six layers shown in FIG. 5 (f) is obtained by laminating the three double-sided substrates 300 with the 302s facing each other.

本発明多層プリント配線板の第一の製造例を示す概略断面工程説明図。BRIEF DESCRIPTION OF THE DRAWINGS The schematic cross-sectional process explanatory drawing which shows the 1st manufacture example of this invention multilayer printed wiring board. 本発明多層プリント配線板の第二の製造例を示す概略断面工程説明図。The schematic cross-sectional process explanatory drawing which shows the 2nd manufacturing example of this invention multilayer printed wiring board. 本発明多層プリント配線板の第三の製造例を示す概略断面工程説明図。FIG. 6 is a schematic cross-sectional process explanatory diagram showing a third production example of the multilayer printed wiring board of the present invention. 本発明多層プリント配線板の第四の製造例を示す概略断面工程説明図。FIG. 10 is a schematic cross-sectional process explanatory diagram showing a fourth production example of the multilayer printed wiring board of the present invention. 本発明多層プリント配線板の第五の製造例を示す概略断面工程説明図。FIG. 10 is a schematic cross-sectional process explanatory diagram illustrating a fifth production example of the multilayer printed wiring board of the present invention. 従来の多層プリント配線板の概略断面説明図。Schematic cross-sectional explanatory drawing of the conventional multilayer printed wiring board. 他の従来の多層プリント配線板の概略断面説明図。The schematic cross-section explanatory drawing of another conventional multilayer printed wiring board.

符号の説明Explanation of symbols

100、300:両面基板
101、201、301:厚みの厚い導体回路
102、202、302:厚みの薄い導体回路
103、203、303:異方性導電膜
104、204、304:絶縁層
105:導電粒子
106:最外層の導体回路
200:4層基板
P1、P2:本発明の多層プリント配線板(4層)
P3、P4:本発明の多層プリント配線板(8層)
P5:本発明の多層プリント配線板(6層)
600:従来のプリント基板
601、701:絶縁基板
602:電極
603、704a、704b:異方性導電フィルム
604、705a、705b:導電粒子
700:従来のビルドアップ基板
702a、702b:厚みの厚い導体回路
703a、703b:厚みの薄い導体回路
706a、706b:最外層の導体回路
100, 300: Double-sided substrate 101, 201, 301: Thick conductor circuit 102, 202, 302: Thin conductor circuit 103, 203, 303: Anisotropic conductive film 104, 204, 304: Insulating layer 105: Conductive Particle 106: outermost conductor circuit 200: four-layer substrate P1, P2: multilayer printed wiring board of the present invention (four layers)
P3, P4: Multilayer printed wiring board of the present invention (8 layers)
P5: Multilayer printed wiring board of the present invention (six layers)
600: Conventional printed circuit board 601, 701: Insulating substrate 602: Electrodes 603, 704a, 704b: Anisotropic conductive films 604, 705a, 705b: Conductive particles 700: Conventional build-up substrates 702a, 702b: Thick conductor circuits 703a, 703b: thin conductor circuits 706a, 706b: outermost conductor circuits

Claims (5)

表裏両面の少なくとも一方の面に厚みの異なる導体回路を備えた絶縁基板を有するプリント配線板が少なくとも2枚、異方性導電膜を介して、前記厚みの異なる導体回路同士を対向せしめて積層配置されていることを特徴とする多層プリント配線板。   At least two printed wiring boards having an insulating substrate provided with conductor circuits having different thicknesses on at least one surface of the front and back surfaces are arranged so that the conductor circuits having different thicknesses face each other through an anisotropic conductive film. A multilayer printed wiring board characterized by being made. 前記異方性導電膜側に配置された導体回路のうち厚みの薄い導体回路が配線回路を構成していると共に、厚みの厚い導体回路が層間接続層を構成していることを特徴とする請求項1記載の多層プリント配線板。   The thin conductor circuit among the conductor circuits arranged on the anisotropic conductive film side constitutes a wiring circuit, and the thick conductor circuit constitutes an interlayer connection layer. Item 11. A multilayer printed wiring board according to Item 1. 前記異方性導電膜側に配置された導体回路間に、絶縁層が形成されていることを特徴とする請求項1又は2記載の多層プリント配線板。   The multilayer printed wiring board according to claim 1, wherein an insulating layer is formed between conductor circuits arranged on the anisotropic conductive film side. 前記異方性導電膜側に配置された導体回路上に、絶縁層が形成されていることを特徴とする請求項1〜3の何れか1項記載の多層プリント配線板。   The multilayer printed wiring board according to claim 1, wherein an insulating layer is formed on the conductor circuit disposed on the anisotropic conductive film side. 最外層の導体回路が、内層の導体回路に比べより微細化されていることを特徴とする請求項1〜4の何れか1項記載の多層プリント配線板。   The multilayer printed wiring board according to any one of claims 1 to 4, wherein the outermost conductor circuit is made finer than the inner layer conductor circuit.
JP2007084929A 2007-03-28 2007-03-28 Multilayer printed wiring board Expired - Fee Related JP5022750B2 (en)

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JP2011082203A (en) * 2009-10-02 2011-04-21 Nec Corp Insulating layer with conductive region, electronic component, and method of manufacturing the insulating layer and the electronic component
JP2012028463A (en) * 2010-07-21 2012-02-09 Sumitomo Electric Printed Circuit Inc Manufacturing method of multilayer printed wiring board and multilayer printed wiring board
JP2017003702A (en) * 2015-06-08 2017-01-05 日本放送協会 Double side wiring board, display and display device

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Publication number Priority date Publication date Assignee Title
JP2011082203A (en) * 2009-10-02 2011-04-21 Nec Corp Insulating layer with conductive region, electronic component, and method of manufacturing the insulating layer and the electronic component
JP2012028463A (en) * 2010-07-21 2012-02-09 Sumitomo Electric Printed Circuit Inc Manufacturing method of multilayer printed wiring board and multilayer printed wiring board
JP2017003702A (en) * 2015-06-08 2017-01-05 日本放送協会 Double side wiring board, display and display device

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