JP2005079402A - Circuit board and its manufacturing method - Google Patents

Circuit board and its manufacturing method Download PDF

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Publication number
JP2005079402A
JP2005079402A JP2003309254A JP2003309254A JP2005079402A JP 2005079402 A JP2005079402 A JP 2005079402A JP 2003309254 A JP2003309254 A JP 2003309254A JP 2003309254 A JP2003309254 A JP 2003309254A JP 2005079402 A JP2005079402 A JP 2005079402A
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Prior art keywords
circuit board
conductive pattern
insulating base
base material
sided circuit
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JP2003309254A
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Inventor
Hiroki Hashiba
浩樹 橋場
Satoru Nakao
知 中尾
Shoji Ito
彰二 伊藤
Ryoichi Kishihara
亮一 岸原
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Fujikura Ltd
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Fujikura Ltd
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Priority to JP2003309254A priority Critical patent/JP2005079402A/en
Priority to US10/542,649 priority patent/US20060180344A1/en
Priority to PCT/JP2003/016377 priority patent/WO2004066697A1/en
Priority to CN200380109013.2A priority patent/CN1739323B/en
Publication of JP2005079402A publication Critical patent/JP2005079402A/en
Priority to FI20050767A priority patent/FI122414B/en
Priority to US12/463,708 priority patent/US7886438B2/en
Pending legal-status Critical Current

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit board capable of both-side mounting mounting electronic components on both front and back surfaces by using a one-side circuit board as a mother board substrate. <P>SOLUTION: At least one part of an insulating base material 11 of the mother board substrate 10 formed with a conductive pattern 12 on one surface of the insulating base material 11 is partially removed and the back surface of the conductive pattern 12 is exposed at the removed part 19 of the insulating base material 11. From the side of the other surface of the insulating base material 11, the one-side circuit board 30 for a multilayer wiring board having an interlayer conducting part 34 and the conductive pattern 32 on one surface of the insulating base material 31 is laminated in a form of being conducted and connected to the back surface exposed part 12B of the conductive pattern 12. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

この発明は、回路基板およびその製造方法に関し、特に、両面実装可能な回路基板およびその製造方法に関するものである。   The present invention relates to a circuit board and a method for manufacturing the same, and more particularly to a circuit board that can be mounted on both sides and a method for manufacturing the same.

近年の電子機器は、高周波信号、ディジタル信号化等に加え、小型、軽量化が進み、それに伴い、電子機器に搭載されるプリント配線板においても、小型、高密度実装化等が要求される。これらの要求に応えるプリント配線板として、リジッド部とフレックス部とを含み、表裏両面に電子部品を実装することができる両面実装タイプのリジッドフレックスプリント配線板がある(たとえば、特許文献1)。   In recent years, electronic devices have become smaller and lighter in addition to high-frequency signals and digital signals, and accordingly, printed wiring boards mounted on electronic devices are also required to be small and have high density mounting. As a printed wiring board that meets these requirements, there is a rigid-flex printed wiring board of a double-sided mounting type that includes a rigid part and a flex part and can mount electronic components on both the front and back sides (for example, Patent Document 1).

両面実装のプリント配線板では、主回路基板(コア基板)として、両面銅張積層板等を出発材とした絶縁性基材の表裏両面に導電性パターンを有する両面回路基板を用い、コア基板の表面側と裏面側の各々に片面銅張積層板等による多層配線板用片面回路基板を積層することが行われる。   In a double-sided printed wiring board, a double-sided circuit board having conductive patterns on both front and back surfaces of an insulating base material using a double-sided copper clad laminate as a main circuit board (core board) is used. A single-sided circuit board for multilayer wiring boards such as a single-sided copper-clad laminate is laminated on each of the front side and the back side.

従来の両面実装のプリント配線板は、コア基板として両面回路基板が必須であるが、導電性パターンの形成において片面の導電層はほとんど除去することにより、材料、資源の無駄が多い。また、スルーホール形成など、製造工程が複雑なものになる。
特開2002−158445号公報
A conventional double-sided printed wiring board requires a double-sided circuit board as a core substrate, but wastes material and resources by removing most of the conductive layer on one side in forming a conductive pattern. In addition, the manufacturing process becomes complicated, such as through-hole formation.
Japanese Patent Laid-Open No. 2002-158445

この発明が解決しようとする課題は、コア基板(主回路基板)として、言い換えると、マザーボード基板として、片面回路基板を使用して表裏両面に電子部品を実装することができる両面実装可能な回路基板を実現することである。   The problem to be solved by the present invention is a circuit board that can be mounted on both sides as a core board (main circuit board), in other words, as a mother board, using a single-sided circuit board to mount electronic components on both sides. Is to realize.

この発明による回路基板は、絶縁性基材の一方の面に導電性パターンを有する主片面回路基板の前記絶縁性基材の少なくとも1箇所が部分的に除去され、前記絶縁性基材の除去部分において前記導電性パターンの裏面が露出し、前記主片面回路基板の前記絶縁性基材の他方の面の側から、電子部品が前記導電性パターンの裏面露出部に導通接続された形態で実装、あるいは/および、層間導通部と絶縁性基材の片面に導電性パターンを有する多層配線板用片面回路基板が前記導電性パターンの裏面露出部に導通接続された形態で積層されている。   In the circuit board according to the present invention, at least one portion of the insulating base material of the main single-sided circuit board having a conductive pattern on one surface of the insulating base material is partially removed, and the removed portion of the insulating base material is removed. In the back surface of the conductive pattern is exposed, from the other surface side of the insulating base material of the main single-sided circuit board, the electronic component is mounted in a conductively connected form to the back surface exposed portion of the conductive pattern, Alternatively, and / or a single-sided circuit board for a multilayer wiring board having a conductive pattern on one side of the interlayer conductive part and the insulating base material is laminated in a conductive connection with the back side exposed part of the conductive pattern.

この発明による回路基板は、両面実装化のために、前記主片面回路基板の前記一方の面にも、電子部品が当該主片面回路基板の前記導電性パターンに導通接続された形態で実装、あるいは/および、層間導通部と絶縁性基材の片面に導電性パターンを有する多層配線板用片面回路基板が当該主片面回路基板の前記導電性パターンに導通接続された形態で積層されている。   The circuit board according to the present invention is mounted on the one surface of the main single-sided circuit board in a form in which an electronic component is conductively connected to the conductive pattern of the main single-sided circuit board for double-sided mounting, or / And a multilayer circuit board single-sided circuit board having a conductive pattern on one side of the interlayer conductive part and the insulating base material is laminated in a form of being conductively connected to the conductive pattern of the main single-sided circuit board.

この発明による回路基板は、好ましくは、前記主片面回路基板がフレキシブル配線板である。   In the circuit board according to the present invention, preferably, the main single-sided circuit board is a flexible wiring board.

また、この発明による回路基板は、前記主片面回路基板がマザーボード基板をなし、前記多層配線板用片面回路基板は予め前記マザーボード基板の外形より小さい外形に加工されて前記マザーボード基板に島状に配置されている構成にすることができる。   Further, in the circuit board according to the present invention, the main single-sided circuit board constitutes a mother board, and the single-sided circuit board for multilayer wiring board is previously processed into an outer shape smaller than the outer shape of the mother board and arranged in an island shape on the mother board. Can be configured.

この発明による回路基板の製造方法は、絶縁性基材の一方の面にのみ導電層を有する片面導電体張積層板を主片面回路基板の出発材とし、前記導電層によって導電性パターンを形成する導電性パターン形成工程と、主片面回路基板の前記絶縁性基材の少なくとも1箇所を部分的に除去し、当該絶縁性基材の除去部分に前記導電性パターンの裏面を露出させる絶縁性基材除去工程と、主片面回路基板の前記絶縁性基材の他方の面の側から、電子部品を前記導電性パターンの裏面露出部に導通接続された形態で実装する裏面側実装工程、あるいは/および、層間導通部と絶縁性基材の片面に導電性パターンを有する多層配線板用片面回路基板を前記導電性パターンの裏面露出部に導通接続された形態で積層する裏面側積層工程と、主片面回路基板の前記一方の面に、電子部品を前記導電性パターンの裏面露出部に導通接続された形態で実装する表面側実装工程、あるいは/および、層間導通部と絶縁性基材の片面に導電性パターンを有する多層配線板用片面回路基板を前記導電性パターンの裏面露出部に導通接続された形態で積層する表面側積層工程とを有する。   In the method for manufacturing a circuit board according to the present invention, a single-sided conductor-clad laminate having a conductive layer only on one side of an insulating base material is used as a starting material for a main single-sided circuit board, and a conductive pattern is formed by the conductive layer. An electrically conductive pattern forming step and an insulating base material in which at least one portion of the insulating base material of the main single-sided circuit board is partially removed and the back surface of the conductive pattern is exposed at the removed portion of the insulating base material. And / or a back side mounting step of mounting the electronic component in a conductively connected form to the back side exposed portion of the conductive pattern from the other side of the insulating base of the main single-sided circuit board, and / or A back side laminating step of laminating a single-sided circuit board for a multilayer wiring board having a conductive pattern on one side of an interlayer conductive part and an insulating base material in a form connected to the back side exposed part of the conductive pattern; Circuit board A surface-side mounting process for mounting the electronic component in a form in which the electronic component is conductively connected to the back surface exposed portion of the conductive pattern on the one surface, or / and a conductive pattern on one surface of the interlayer conductive portion and the insulating substrate. And a front surface side lamination step of laminating the single-sided circuit board for a multilayer wiring board having a conductive connection with the back surface exposed portion of the conductive pattern.

この発明による回路基板の製造方法における前記絶縁性基材除去工程は、エッチング加工あるいはレーザ加工により行うことができる。   The insulating base material removing step in the circuit board manufacturing method according to the present invention can be performed by etching or laser processing.

また、この発明による回路基板の製造方法における前記裏面側積層工程と前記表面側積層工程における複数枚の多層配線板用片面回路基板の積層を一括積層により1工程で行うことができる。   Moreover, the lamination | stacking of the several single-sided circuit board for multilayer wiring boards in the said back surface side lamination process in the manufacturing method of the circuit board by this invention and the said surface side lamination process can be performed by 1 process by batch lamination.

この発明による回路基板は、主片面回路基板の絶縁性基材の少なくとも1箇所が部分的に除去され、その除去部分においては導電性パターンの裏面が露出し、主片面回路基板の絶縁性基材の他方の面の側から、電子部品を導電性パターンの裏面露出部に導通接続された形態で実装、あるいは/および、層間導通部と絶縁性基材の片面に導電性パターンを有する多層配線板用片面回路基板を導電性パターンの裏面露出部に導通接続された形態で積層することができる。そして、主片面回路基板の絶縁性基材の一方の面にも、電子部品を実装、あるいは/および、多層配線板用片面回路基板を積層することで、両面実装の回路基板が得られる。   In the circuit board according to the present invention, at least one portion of the insulating base material of the main single-sided circuit board is partially removed, and the back surface of the conductive pattern is exposed at the removed portion, so that the insulating base material of the main single-sided circuit board is exposed. A multilayer wiring board having a conductive pattern mounted on the back surface of the conductive pattern in an electrically conductive manner from the other surface side, or / and having a conductive pattern on one side of the interlayer conductive portion and the insulating substrate The single-sided circuit board can be laminated in a form in which the single-sided circuit board is conductively connected to the back surface exposed portion of the conductive pattern. A circuit board mounted on both sides can be obtained by mounting electronic components on one surface of the insulating base material of the main single-sided circuit board and / or laminating a single-sided circuit board for a multilayer wiring board.

図1、図2はこの発明による回路基板の一つの実施形態を示している。この回路基板は、マザーボード基板10と、マザーボード基板10の表裏の複数箇所に、各々積層された島状の部分的多層配線基板(多層化部分)20A、20B、20C、20Dとを有する。   1 and 2 show an embodiment of a circuit board according to the present invention. This circuit board has a motherboard 10 and island-like partial multilayer wiring boards (multilayered portions) 20A, 20B, 20C, and 20D that are respectively stacked at a plurality of locations on the front and back of the motherboard 10.

部分的多層配線基板20A、20B、20C、20Dは、予め、マザーボード基板10の外形よりも小さい所定形状に外形加工された複数枚の多層配線板用片面回路基板30をマザーボード基板10の表裏に一括積層したものである。この実施形態では、部分的多層配線基板20A、20B、20C、20Dのすべてが2層になっている。   The partial multilayer wiring boards 20 </ b> A, 20 </ b> B, 20 </ b> C, and 20 </ b> D are collectively packaged with a plurality of single-sided circuit boards 30 for multilayer wiring boards that have been previously processed into a predetermined shape smaller than the outer shape of the motherboard 10. Laminated. In this embodiment, all of the partial multilayer wiring boards 20A, 20B, 20C, and 20D have two layers.

多層配線板用片面回路基板30は、絶縁性基材31と、絶縁性基材31の一方の面に形成された導電性パターン32と、絶縁性基材31の他方の面に貼り合わせられた接着層33と、絶縁性基材31と接着層33とを貫通して形成されたインナビアホールによる層間導通部34とを有する。   Multi-layer wiring board single-sided circuit board 30 was bonded to insulating base 31, conductive pattern 32 formed on one side of insulating base 31, and the other side of insulating base 31. The adhesive layer 33 includes an interlayer conductive portion 34 formed by an inner via hole formed through the insulating base 31 and the adhesive layer 33.

多層配線板用片面回路基板30は、フェノール樹脂系やエポキシ樹脂系によるリジットプリント配線板、あるいはポリエステル樹脂系やポリイミド樹脂系によるフレキシブル配線板の何れでも構成することができる。多層配線板用片面回路基板30の絶縁性基材31自身が層間接着性を有するならば、接着層33を省略できる。   The single-sided circuit board 30 for the multilayer wiring board can be constituted by either a rigid printed wiring board made of phenol resin or epoxy resin, or a flexible wiring board made of polyester resin or polyimide resin. If the insulating base 31 itself of the single-sided circuit board 30 for a multilayer wiring board has interlayer adhesion, the adhesive layer 33 can be omitted.

部分的多層配線基板20A、20B、20C、20Dの多層配線板用片面回路基板30のうち、最外層の多層配線板用片面回路基板30の絶縁性基材31の表面は、ソルダーレジスト35によって被覆されている。   The surface of the insulating base 31 of the multilayer wiring board single-sided circuit board 30 among the multilayer wiring board single-sided circuit boards 30 of the partial multilayer wiring boards 20A, 20B, 20C, and 20D is covered with a solder resist 35. Has been.

部分的多層配線基板20A、20B、20C、20Dの各々の最外層の多層配線板用片面回路基板30に、バンプ51によって電子部品50が実装されている。これにより、両面多層・両面実装の回路基板が得られる。   The electronic component 50 is mounted by bumps 51 on the multilayer wiring board single-sided circuit board 30 of the outermost layer of each of the partial multilayer wiring boards 20A, 20B, 20C, and 20D. Thereby, a double-sided multilayer / double-sided mounting circuit board is obtained.

マザーボード基板10は、絶縁性基材11の一方の面に導電性パターン12を有する主片面回路基板である。マザーボード基板10は、絶縁性基材11の少なくとも1箇所(この実施形態では2箇所)を部分的に除去され、絶縁性基材11の除去部分19において導電性パターン12の裏面が露出している。そして、絶縁性基材11の他方の面の側(裏面側)から、部分的多層配線基板20C、20Dの多層配線板用片面回路基板30が導電性パターン12の裏面露出部12Bに導通接続された形態で積層され、部分的多層配線基板20C、20Dを構成している。   The motherboard 10 is a main single-sided circuit board having a conductive pattern 12 on one surface of the insulating base material 11. At least one place (two places in this embodiment) of the insulating base material 11 is partially removed from the mother board 10, and the back surface of the conductive pattern 12 is exposed at the removed portion 19 of the insulating base material 11. . Then, from the other surface side (back surface side) of the insulating base material 11, the multilayer wiring board single-sided circuit board 30 of the partial multilayer wiring boards 20 </ b> C and 20 </ b> D is conductively connected to the back surface exposed portion 12 </ b> B of the conductive pattern 12. Thus, partial multilayer wiring boards 20C and 20D are formed.

なお、部分的多層配線基板20A、20Bの多層配線板用片面回路基板30は、絶縁性基材11の一方の面(表面)に、導電性パターン12の表面露出部12Aに導通接続された形態で積層され、部分的多層配線基板20A、20Bを構成している。   The single-sided circuit board 30 for the multilayer wiring board of the partial multilayer wiring boards 20A and 20B is electrically connected to the surface exposed portion 12A of the conductive pattern 12 on one surface (front surface) of the insulating base material 11. To form partial multilayer wiring boards 20A and 20B.

マザーボード基板10も、フェノール樹脂系やエポキシ樹脂系によるリジットプリント配線板、あるいはポリエステル樹脂系やポリイミド樹脂系によるフレキシブル配線板の何れでも構成することができる。   The motherboard 10 can also be formed of either a rigid printed wiring board made of phenol resin or epoxy resin, or a flexible wiring board made of polyester resin or polyimide resin.

マザーボード基板10の表面はカバーレイヤ18によって被覆されている。また、カバーレイヤ18と部分的多層配線基板20A、20Bとの隙間部にはソルダーレジスト17が塗布充填されている。   The surface of the motherboard 10 is covered with a cover layer 18. In addition, a solder resist 17 is applied and filled in the gaps between the cover layer 18 and the partial multilayer wiring boards 20A and 20B.

つぎに、この発明による回路基板の製造方法の一つの実施形態を図3〜図6を参照して説明する。   Next, an embodiment of a circuit board manufacturing method according to the present invention will be described with reference to FIGS.

図3(a)〜(e)は、マザーボード基板10の製造工程を示している。図3(a)に示されているように、出発材として、汎用の片面銅張ポリイミド基材(片面導電体張積層板)60を用意する。片面銅張ポリイミド基材60は、ポリイミドフィルムによる絶縁性基材11の一方の面にのみ導電層としての銅箔16を有する片面銅張積層板(CCL)である。   3A to 3E show a manufacturing process of the motherboard 10. As shown in FIG. 3A, a general-purpose single-sided copper-clad polyimide substrate (single-sided conductor-clad laminate) 60 is prepared as a starting material. The single-sided copper-clad polyimide substrate 60 is a single-sided copper-clad laminate (CCL) having a copper foil 16 as a conductive layer only on one surface of the insulating substrate 11 made of a polyimide film.

ここでは、基板の耐熱性、誘電特性を考慮し、絶縁基材としてポリイミドを選んだもので、もちろん、ガラスクロス、ガラスマット、合成繊維などの基材と熱硬化性樹脂からなる鋼張フェノール基板、銅張紙エボキシ基板、鋼張紙ポリエステル基板、銅張ガラスエポキシ基板、銅張カラスポリイミド基板などを使用してもよい。また、基材を組み合わせない形として、銅張ポリエステル基板、銅張ポリエーテルイミド基板、銅張液晶ポリマー基板などを使用してもよい。   Here, considering the heat resistance and dielectric characteristics of the substrate, polyimide is selected as the insulating base material. Of course, a steel-clad phenol substrate consisting of a base material such as glass cloth, glass mat, synthetic fiber and thermosetting resin A copper-clad paper eboxy substrate, a steel-clad paper polyester substrate, a copper-clad glass epoxy substrate, a copper-clad crow polyimide substrate, or the like may be used. Moreover, you may use a copper clad polyester board | substrate, a copper clad polyetherimide board | substrate, a copper clad liquid crystal polymer board | substrate, etc. as a form which does not combine a base material.

まず、導電性パターン形成工程として、片面銅張ポリイミド基材60の銅箔16にエッチングレジストをラミネートし、配線パターンを露光、現像する。その後、塩化第2銅浴によって露出している銅をエッチングし、導電性パターン12を形成する。次いで、エッチングレジストを除去し、図3(b)に示されているような片面回路基板61とする。   First, as a conductive pattern forming step, an etching resist is laminated on the copper foil 16 of the single-sided copper-clad polyimide substrate 60, and the wiring pattern is exposed and developed. Thereafter, the exposed copper is etched by a cupric chloride bath to form the conductive pattern 12. Next, the etching resist is removed to obtain a single-sided circuit board 61 as shown in FIG.

図3(c)に示されているように、片面回路基板61の表面(上面)には導電性パターン12の保護を目的として、多層配線板用片面回路基板30を積層する部分(表面側多層化部分)14を予め開口させたカバーレイヤ18を設ける。カバー層としては、ソルダーレジスト等を使用してもよい。   As shown in FIG. 3C, a portion (surface-side multilayer) on which the multilayer circuit board single-sided circuit board 30 is laminated on the surface (upper surface) of the single-sided circuit board 61 for the purpose of protecting the conductive pattern 12. The cover layer 18 having the opening 14 formed in advance is provided. A solder resist or the like may be used as the cover layer.

つぎに、絶縁性基材除去工程として、図3(d)に示されているように、片面回路基板61の両面にエッチングレジスト62をラミネートし、銅箔面側(表面側)を全面露光、ポリイミド面側(裏面側)に開口パターンを露光、現像する。   Next, as shown in FIG. 3D, as the insulating base material removing step, an etching resist 62 is laminated on both surfaces of the single-sided circuit board 61, and the copper foil surface side (surface side) is exposed on the entire surface. An opening pattern is exposed and developed on the polyimide surface side (back surface side).

その後、ポリイミドによる絶縁性基材11を酸素プラズマあるいは強アルカリ水溶液などを用いてエッチングし、エッチング完了後にエッチングレジスト62を除去する。これにより、図3(e)に示されているように、片面回路基板61の絶縁性基材11が部分的に所定面積除去され、絶縁性基材11の除去部分(裏面側多層化部分)19に導電性パターン12の裏面12Bが露出したマザーボード基板10が完成する。   Thereafter, the insulating base material 11 made of polyimide is etched using oxygen plasma or a strong alkaline aqueous solution, and the etching resist 62 is removed after the etching is completed. As a result, as shown in FIG. 3E, the insulating base material 11 of the single-sided circuit board 61 is partially removed by a predetermined area, and the removed portion of the insulating base material 11 (rear side multilayered portion). 19 completes the motherboard 10 with the back surface 12B of the conductive pattern 12 exposed.

なお、絶縁性基材11に除去部分19を設ける絶縁性基材除去工程は、絶縁性基材11の裏面側からレーザビームするレーザ加工によって行うこともできる。   Note that the insulating base material removing step of providing the removal portion 19 on the insulating base material 11 can also be performed by laser processing using a laser beam from the back surface side of the insulating base material 11.

図4は、マザーボード基板10の模式的な平面図であり、図3(e)は、図4の線e−eに沿った断面図である。   4 is a schematic plan view of the motherboard 10 and FIG. 3E is a cross-sectional view taken along line ee of FIG.

図5(a)〜(f)は、多層配線板用片面回路基板30の製造工程を示している。図5(a)に示されているように、出発材として、汎用の片面銅張ポリイミド基材(片面導電体張積層板)70を用意する。   5A to 5F show the manufacturing process of the single-sided circuit board 30 for a multilayer wiring board. As shown in FIG. 5A, a general-purpose single-sided copper-clad polyimide substrate (single-sided conductor-clad laminate) 70 is prepared as a starting material.

片面銅張ポリイミド基材70は、マザーボード基板10用の片面銅張ポリイミド基材60と同様のものであり、ポリイミドフィルムによる絶縁性基材31の一方の面にのみ導電層としての銅箔36を有する片面銅張積層板(CCL)である。   The single-sided copper-clad polyimide base material 70 is the same as the single-sided copper-clad polyimide base material 60 for the motherboard 10, and the copper foil 36 as a conductive layer is provided only on one surface of the insulating base material 31 made of a polyimide film. It has a single-sided copper-clad laminate (CCL).

なお、マザーボード基板10の絶縁性基材11と多層配線板用片面回路基板30の縁性基材31は、熱的、機械的観点から、同じ材料によって構成されていることが望ましい。   Note that the insulating base material 11 of the motherboard 10 and the edge base material 31 of the multilayer wiring board single-sided circuit board 30 are preferably made of the same material from a thermal and mechanical viewpoint.

まず、図5(b)に示されているように、片面銅張ポリイミド基材70の銅箔36を、マザーボード基板作成と同様にエッチングし、導電性パターン32を形成する。   First, as shown in FIG. 5B, the copper foil 36 of the single-sided copper-clad polyimide base material 70 is etched in the same manner as the motherboard substrate formation to form a conductive pattern 32.

ついで、図5(c)に示されているように、絶縁性基材31の導電性パターン32とは反対側の面に熱可塑性ポリイミドを熱プレス機によって貼り合わせ、接着層33を形成する。接着層33としては、他に、フェノール樹脂、フェノキシ樹脂、ポリイミド樹脂、キシレン樹脂もしくはこれらの2種類以上の混合樹脂、ポリエーテルイミド樹脂、液晶ポリマー、ポリアミド樹脂なども使用することができる。   Next, as shown in FIG. 5C, thermoplastic polyimide is bonded to the surface of the insulating base 31 opposite to the conductive pattern 32 by a hot press to form an adhesive layer 33. As the adhesive layer 33, a phenol resin, a phenoxy resin, a polyimide resin, a xylene resin, or a mixed resin of two or more of these, a polyetherimide resin, a liquid crystal polymer, a polyamide resin, or the like can be used.

次に、図5(d)に示されているように、層間接続したい任意の位置に、接着層33側からレーザを照射し、絶縁性基材31と接着層33を貫通して銅箔(導電性パターン32)に接する穴(バイアホール)37を形成する。   Next, as shown in FIG. 5D, a laser is irradiated from the adhesive layer 33 side to any position where the interlayer connection is desired, and the copper foil (through the insulating base material 31 and the adhesive layer 33 is penetrated). A hole (via hole) 37 in contact with the conductive pattern 32) is formed.

次に、図5(e)に示されているように、穴37に熱硬化性の銀ペーストを印刷法等によって穴埋め充填し、層間導通部34を完成させる。穴37に穴埋め充填する導電性ペーストは、金、銅、ニッケル、炭素粉末、もしくはこれらの合金粉末、混合粉末とフェノール樹脂、ポリエステル樹脂、エポキシ樹脂、ポリイミド樹脂などのバインダ成分とを混合して調整された導電性組成物でもよい。   Next, as shown in FIG. 5E, the hole 37 is filled with a thermosetting silver paste by a printing method or the like to complete the interlayer conductive portion 34. The conductive paste that fills and fills the hole 37 is prepared by mixing gold, copper, nickel, carbon powder, or an alloy powder or mixed powder thereof with a binder component such as phenol resin, polyester resin, epoxy resin, or polyimide resin. The conductive composition thus prepared may be used.

尚、導電性ペーストの印刷・充填には、メタルマスクを用いた印刷法や、マスキングフィルムを用いた印刷法やディスペンサによる充填法が適用できる。   For printing and filling the conductive paste, a printing method using a metal mask, a printing method using a masking film, and a filling method using a dispenser can be applied.

次に、銀ペーストを印刷した積層基材71をオーブンにて加熱し、銀ペーストを乾燥させる。   Next, the laminated base material 71 on which the silver paste is printed is heated in an oven to dry the silver paste.

次に、積層基材71を、点線Cで示されている如く、マザーボード基板10の外形より小さい外形に外形加工することを目的として金型でプレスすることで、図5(f)に示されているように、所望の大きさの多層配線板用片面回路基板30を得る。この外形加工は、多層配線板用片面回路基板30がカバーレイヤ18の表面側多層化部分(開口部)14や絶縁性基材(開口部)11の除去部分19に入り込めるよう、これらの開口にぴったり合った寸法か、これら開口より少し小さい寸法設定で行われる。   Next, as shown in dotted line C, the laminated base material 71 is pressed with a mold for the purpose of external processing to an external shape smaller than the external shape of the motherboard 10, as shown in FIG. As shown, a single-sided circuit board 30 for a multilayer wiring board having a desired size is obtained. This outer shape processing is performed in these openings so that the single-sided circuit board 30 for the multilayer wiring board can enter the surface-side multilayered portion (opening) 14 of the cover layer 18 and the removal portion 19 of the insulating base material (opening) 11. This is done with the exact size or slightly smaller than these openings.

図6(a)〜(c)は、多層配線板用片面回路基板30の積層工程を示している。こうして得られた多層配線板用片面回路基板30を複数枚用意し、図6(a)に示されているように、マザーボード基板10の導電性パターン12側(表面側)の表面側多層化部分14と、絶縁性基材11の裏面側の除去部分19の各々に、各々所定枚数の多層配線板用片面回路基板30を位置合わせした後に、重ね合わせ、真空プレス機により加熱加圧し、図6(b)に示されているような両面積層の回路基板80を得る。   FIGS. 6A to 6C show the stacking process of the single-sided circuit board 30 for the multilayer wiring board. A plurality of single-sided circuit boards 30 for the multilayer wiring board thus obtained are prepared, and as shown in FIG. 6A, the surface side multilayered portion on the conductive pattern 12 side (surface side) of the motherboard 10 14 and each of the removed portions 19 on the back surface side of the insulating base material 11 are aligned with a predetermined number of single-sided circuit boards 30 for multilayer wiring boards, and then superposed and heated and pressurized by a vacuum press machine. A double-sided circuit board 80 as shown in FIG.

位置合わせには、ピンアライメント方式をとっても構わないが、ガイド穴のスペースが必要となるため、好ましくない。したがって、画像認識による位置合わせを実施した。   For alignment, a pin alignment method may be used, but it is not preferable because a space for the guide hole is required. Therefore, alignment by image recognition was performed.

次に、図6(c)に示されているように、マザーボード基板10のカバーレイヤ18と多層化部分の隙間および多層化部分の表面の一部を被覆するように印刷法によってソルダーレジスト17、35を塗布し、硬化させた。   Next, as shown in FIG. 6C, a solder resist 17 is formed by a printing method so as to cover a gap between the cover layer 18 and the multilayered portion of the motherboard 10 and a part of the surface of the multilayered portion. 35 was applied and cured.

最後に、電子部品を実装するために露出した導電性パターン32に金など、導電層より貴なる貴金属38により被覆し、両面実装可能な回路基板を完成させた。   Finally, the exposed conductive pattern 32 for mounting the electronic component was covered with a noble metal 38 made of noble conductive material such as gold to complete a circuit board that can be mounted on both sides.

要するに、上述した回路基板は、以下の特徴、効果を有する。   In short, the circuit board described above has the following characteristics and effects.

(1)片面配線板をマザーボード基板として使用した場合、両面の多層化や両面実装ができないという問題も解決して片面配線板をマザーボード基板10、すなわち、主片面回路基板として使用するから、両面回路基板を用いた場合と異なり、導電性パターンの形成において片面の導電層はほとんど除去するようなことが生じず、材料、資源の無駄が削減できる。また、スルーホール形成など、複雑な製造工程を要すことがない。 (1) When a single-sided wiring board is used as a mother board, the problem that double-sided multilayering and double-sided mounting cannot be achieved is solved, and the single-sided wiring board is used as the mother board 10, ie, the main single-sided circuit board. Unlike the case of using a substrate, the conductive layer on one side is hardly removed in forming the conductive pattern, and waste of materials and resources can be reduced. Further, complicated manufacturing processes such as through-hole formation are not required.

(2)片面配線板をマザーボード基板10として使用するため、マザーボード基板10がフレキシブル基板の場合、多層化しない部分の屈曲性が向上し、屈曲性の優れた高密度両面部分多層配線板を得ることができる。 (2) Since the single-sided wiring board is used as the mother board 10, when the mother board 10 is a flexible board, the flexibility of the non-multilayered portion is improved, and a high-density double-sided partial wiring board with excellent flexibility is obtained. Can do.

(3)部分多層配線板、すなわち、多層配線板用片面回路基板30は、部分多層配線部分の大きさに外形加工されたものを用いるから、部分多層配線部分の基板も、マザーボード基板10と同じ大きさのものを用いてマザーボード基板10の外形加工時にマザーボード基板10の外形と同じ外形に打ち抜く場合に比して多層配線板用片面回路基板30の材料量が少なくてすみ、材料の無駄を削減できる。 (3) Since the partial multilayer wiring board, that is, the single-sided circuit board 30 for multilayer wiring board, which is externally processed to the size of the partial multilayer wiring part is used, the substrate of the partial multilayer wiring part is the same as the motherboard 10. The amount of material of the single-sided circuit board 30 for the multilayer wiring board can be reduced as compared with the case of punching into the same outer shape as the outer shape of the motherboard substrate 10 when processing the outer shape of the motherboard substrate 10 with a large size, and reducing waste of materials. it can.

この発明による回路基板は、上述したような両面積層のものに限られることはなく、図7に示されているように、マザーボード基板10の導電性パターン12や、絶縁性基材11の除去部分19に、電子部品50がフリップチップ式に直接実装されていてもよい。絶縁性基材11の除去部分19に対する電子部品50の実装は、導電性パターン12の裏面露出部12Bに導通接続された形態で行われる。   The circuit board according to the present invention is not limited to the double-sided laminate as described above. As shown in FIG. 7, the conductive pattern 12 of the motherboard 10 and the removed portion of the insulating base 11 are removed. 19, the electronic component 50 may be directly mounted in a flip-chip manner. The electronic component 50 is mounted on the removed portion 19 of the insulating base material 11 in a form in which the electronic component 50 is conductively connected to the back surface exposed portion 12B of the conductive pattern 12.

この発明による回路基板の一つの実施形態を示す断面図である。It is sectional drawing which shows one Embodiment of the circuit board by this invention. この発明による回路基板の模式的な平面図である。1 is a schematic plan view of a circuit board according to the present invention. (a)〜(e)はこの発明による回路基板で用いるマザーボード基板の製造工程の一つの実施形態を示す工程図である。(A)-(e) is process drawing which shows one Embodiment of the manufacturing process of the motherboard used with the circuit board by this invention. マザーボード基板の模式的な平面図である。It is a typical top view of a motherboard. (a)〜(f)はこの発明による回路基板で用いる多層配線板用片面回路基板の製造工程の一つの実施形態を示す工程図である。(A)-(f) is process drawing which shows one Embodiment of the manufacturing process of the single-sided circuit board for multilayer wiring boards used with the circuit board by this invention. (a)〜(c)は、多層配線板用片面回路基板の積層工程の一つの実施形態を示す工程図である。(A)-(c) is process drawing which shows one Embodiment of the lamination | stacking process of the single-sided circuit board for multilayer wiring boards. この発明による回路基板の他の実施形態を示す断面図である。It is sectional drawing which shows other embodiment of the circuit board by this invention.

符号の説明Explanation of symbols

10 マザーボード基板
11 絶縁性基材
12 導電性パターン
14 表面側多層化部分
16 銅箔
17 ソルダーレジスト
18 カバーレイヤ
19 除去部分
20A、20B、20C、20D 部分的多層配線基板
30 多層配線板用片面回路基板
31 絶縁性基材
32 導電性パターン
33 接着層
34 層間導通部
35 ソルダーレジスト
36 銅箔
50 電子部品
60、70 片面銅張ポリイミド基材
DESCRIPTION OF SYMBOLS 10 Mother board 11 Insulating base material 12 Conductive pattern 14 Surface side multilayer part 16 Copper foil 17 Solder resist 18 Cover layer 19 Removal part 20A, 20B, 20C, 20D Partial multilayer wiring board 30 Single-sided circuit board for multilayer wiring boards 31 Insulating substrate 32 Conductive pattern 33 Adhesive layer 34 Interlayer conduction part 35 Solder resist 36 Copper foil 50 Electronic component 60, 70 Single-sided copper-clad polyimide substrate

Claims (7)

絶縁性基材の一方の面に導電性パターンを有する主片面回路基板の前記絶縁性基材の少なくとも1箇所が部分的に除去され、前記絶縁性基材の除去部分において前記導電性パターンの裏面が露出し、
前記主片面回路基板の前記絶縁性基材の他方の面の側から、電子部品が前記導電性パターンの裏面露出部に導通接続された形態で実装、あるいは/および、層間導通部と絶縁性基材の片面に導電性パターンを有する多層配線板用片面回路基板が前記導電性パターンの裏面露出部に導通接続された形態で積層されている回路基板。
At least one portion of the insulating base material of the main single-sided circuit board having a conductive pattern on one surface of the insulating base material is partially removed, and the back surface of the conductive pattern in the removed portion of the insulating base material Is exposed,
Mounting the electronic component from the other surface side of the insulating base of the main single-sided circuit board in a conductively connected form to the back surface exposed portion of the conductive pattern, and / or an interlayer conductive portion and an insulating base A circuit board in which a single-sided circuit board for a multilayer wiring board having a conductive pattern on one side of a material is laminated in a conductive connection with a back surface exposed portion of the conductive pattern.
前記主片面回路基板の前記一方の面に、電子部品が当該主片面回路基板の前記導電性パターンに導通接続された形態で実装、あるいは/および、層間導通部と絶縁性基材の片面に導電性パターンを有する多層配線板用片面回路基板が当該主片面回路基板の前記導電性パターンに導通接続された形態で積層されている請求項1記載の回路基板。   The electronic component is mounted on the one surface of the main single-sided circuit board in a form of being electrically connected to the conductive pattern of the main single-sided circuit board, or / and electrically conductive on one side of the interlayer conductive part and the insulating base. The circuit board according to claim 1, wherein the single-sided circuit board for a multilayer wiring board having a conductive pattern is laminated in a form of being electrically connected to the conductive pattern of the main single-sided circuit board. 前記主片面回路基板がフレキシブル配線板である請求項1または2記載の回路基板。   The circuit board according to claim 1, wherein the main single-sided circuit board is a flexible wiring board. 前記主片面回路基板がマザーボード基板をなし、前記多層配線板用片面回路基板は予め前記マザーボード基板の外形より小さい外形に加工されて前記マザーボード基板に島状に配置されている請求項1〜3の何れか1項記載の回路基板。   The main single-sided circuit board constitutes a mother board, and the single-sided circuit board for multilayer wiring board is previously processed into an outer shape smaller than the outer shape of the mother board and arranged in an island shape on the mother board. The circuit board according to any one of claims. 絶縁性基材の一方の面にのみ導電層を有する片面導電体張積層板を主片面回路基板の出発材とし、前記導電層によって導電性パターンを形成する導電性パターン形成工程と、
主片面回路基板の前記絶縁性基材の少なくとも1箇所を部分的に除去し、当該絶縁性基材の除去部分に前記導電性パターンの裏面を露出させる絶縁性基材除去工程と、
主片面回路基板の前記絶縁性基材の他方の面の側から、電子部品を前記導電性パターンの裏面露出部に導通接続された形態で実装する裏面側実装工程、あるいは/および、層間導通部と絶縁性基材の片面に導電性パターンを有する多層配線板用片面回路基板を前記導電性パターンの裏面露出部に導通接続された形態で積層する裏面側積層工程と、
主片面回路基板の前記一方の面に、電子部品を前記導電性パターンの裏面露出部に導通接続された形態で実装する表面側実装工程、あるいは/および、層間導通部と絶縁性基材の片面に導電性パターンを有する多層配線板用片面回路基板を前記導電性パターンの裏面露出部に導通接続された形態で積層する表面側積層工程と、
を有する回路基板の製造方法。
A conductive pattern forming step in which a single-sided conductor-clad laminate having a conductive layer only on one side of the insulating base material is used as a starting material of the main single-sided circuit board, and a conductive pattern is formed by the conductive layer;
An insulative base material removing step of partially removing at least one portion of the insulative base material of the main single-sided circuit board and exposing a back surface of the conductive pattern to a removed portion of the insulative base material;
Backside mounting process for mounting electronic components in a form connected to the backside exposed part of the conductive pattern from the other side of the insulating base of the main single-sided circuit board, and / or interlayer conductive part And a back side laminating step of laminating a single-sided circuit board for a multilayer wiring board having a conductive pattern on one side of an insulating base material in a form conductively connected to the back side exposed part of the conductive pattern;
A front side mounting process for mounting an electronic component on the one side of the main single-sided circuit board in a conductively connected form to the backside exposed part of the conductive pattern, or / and one side of the interlayer conductive part and the insulating base A front side laminating step of laminating a single-sided circuit board for a multilayer wiring board having a conductive pattern on the backside exposed portion of the conductive pattern in a conductive connection form;
A method of manufacturing a circuit board having
前記絶縁性基材除去工程は、エッチング加工あるいはレーザ加工により行う請求項5記載の回路基板の製造方法。 The circuit board manufacturing method according to claim 5, wherein the insulating base material removing step is performed by etching processing or laser processing. 前記裏面側積層工程と前記表面側積層工程における複数枚の多層配線板用片面回路基板の積層を一括積層により1工程で行う請求項5または6記載の回路基板の製造方法。

The method for manufacturing a circuit board according to claim 5 or 6, wherein the plurality of single-sided circuit boards for a multilayer wiring board in the back side laminating step and the front side laminating step are laminated in one step by batch lamination.

JP2003309254A 2003-01-20 2003-09-01 Circuit board and its manufacturing method Pending JP2005079402A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2003309254A JP2005079402A (en) 2003-09-01 2003-09-01 Circuit board and its manufacturing method
US10/542,649 US20060180344A1 (en) 2003-01-20 2003-12-19 Multilayer printed wiring board and process for producing the same
PCT/JP2003/016377 WO2004066697A1 (en) 2003-01-20 2003-12-19 Multilayer printed wiring board and process for producing the same
CN200380109013.2A CN1739323B (en) 2003-01-20 2003-12-19 Multilayer wiring board and its manufacturing method
FI20050767A FI122414B (en) 2003-01-20 2005-07-19 Multilayer pattern cards and process for making them
US12/463,708 US7886438B2 (en) 2003-01-20 2009-05-11 Process for producing multilayer printed wiring board

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Cited By (14)

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JP2006286967A (en) * 2005-03-31 2006-10-19 Fujitsu Ltd Multilayer wiring board and its manufacturing method
JP2006310541A (en) * 2005-04-28 2006-11-09 Ngk Spark Plug Co Ltd Multilayer wiring board and its production process, multilayer wiring board structure and its production process
WO2008139612A1 (en) * 2007-05-14 2008-11-20 Ibiden Co., Ltd. Wiring board and method of manufacturing the same
WO2008139613A1 (en) * 2007-05-14 2008-11-20 Ibiden Co., Ltd. Wiring board and method of manufacturing the same
WO2009011023A1 (en) * 2007-07-13 2009-01-22 Ibiden Co., Ltd. Wiring board and manufacturing method thereof
WO2009011024A1 (en) * 2007-07-13 2009-01-22 Ibiden Co., Ltd. Wiring board and manufacturing method thereof
JP2009135391A (en) * 2007-11-02 2009-06-18 Denso Corp Electronic device and method of manufacturing the same
JP2010539705A (en) * 2007-09-13 2010-12-16 スリーエム イノベイティブ プロパティズ カンパニー Partially rigid flexible circuits and methods for making them
US8035983B2 (en) 2007-07-17 2011-10-11 Ibiden Co., Ltd. Wiring board and method of manufacturing wiring board
US8178789B2 (en) 2007-07-17 2012-05-15 Ibiden Co., Ltd. Wiring board and method of manufacturing wiring board
US8648263B2 (en) 2007-05-17 2014-02-11 Ibiden Co., Ltd. Wiring board and method of manufacturing wiring board
US8669480B2 (en) 2007-05-17 2014-03-11 Ibiden Co., Ltd. Wiring board and method of manufacturing wiring board
JP2015213169A (en) * 2014-04-30 2015-11-26 サムソン エレクトロ−メカニックス カンパニーリミテッド. Rigid flexible printed circuit board and method of manufacturing rigid flexible printed circuit board
CN111787690A (en) * 2019-04-03 2020-10-16 鸿富锦精密工业(武汉)有限公司 Circuit board

Cited By (18)

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JP4688545B2 (en) * 2005-03-31 2011-05-25 富士通セミコンダクター株式会社 Multilayer wiring board
JP2006286967A (en) * 2005-03-31 2006-10-19 Fujitsu Ltd Multilayer wiring board and its manufacturing method
JP2006310541A (en) * 2005-04-28 2006-11-09 Ngk Spark Plug Co Ltd Multilayer wiring board and its production process, multilayer wiring board structure and its production process
JP4718889B2 (en) * 2005-04-28 2011-07-06 日本特殊陶業株式会社 Multilayer wiring board and manufacturing method thereof, multilayer wiring board structure and manufacturing method thereof
WO2008139612A1 (en) * 2007-05-14 2008-11-20 Ibiden Co., Ltd. Wiring board and method of manufacturing the same
WO2008139613A1 (en) * 2007-05-14 2008-11-20 Ibiden Co., Ltd. Wiring board and method of manufacturing the same
US8669480B2 (en) 2007-05-17 2014-03-11 Ibiden Co., Ltd. Wiring board and method of manufacturing wiring board
US8648263B2 (en) 2007-05-17 2014-02-11 Ibiden Co., Ltd. Wiring board and method of manufacturing wiring board
WO2009011023A1 (en) * 2007-07-13 2009-01-22 Ibiden Co., Ltd. Wiring board and manufacturing method thereof
WO2009011024A1 (en) * 2007-07-13 2009-01-22 Ibiden Co., Ltd. Wiring board and manufacturing method thereof
US8035983B2 (en) 2007-07-17 2011-10-11 Ibiden Co., Ltd. Wiring board and method of manufacturing wiring board
US8178789B2 (en) 2007-07-17 2012-05-15 Ibiden Co., Ltd. Wiring board and method of manufacturing wiring board
US8359738B2 (en) 2007-07-17 2013-01-29 Ibiden Co., Ltd. Method of manufacturing wiring board
JP2010539705A (en) * 2007-09-13 2010-12-16 スリーエム イノベイティブ プロパティズ カンパニー Partially rigid flexible circuits and methods for making them
JP2009135391A (en) * 2007-11-02 2009-06-18 Denso Corp Electronic device and method of manufacturing the same
JP2015213169A (en) * 2014-04-30 2015-11-26 サムソン エレクトロ−メカニックス カンパニーリミテッド. Rigid flexible printed circuit board and method of manufacturing rigid flexible printed circuit board
CN111787690A (en) * 2019-04-03 2020-10-16 鸿富锦精密工业(武汉)有限公司 Circuit board
CN111787690B (en) * 2019-04-03 2023-10-27 鸿富锦精密工业(武汉)有限公司 circuit board

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