JP2007535814A5 - - Google Patents

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Publication number
JP2007535814A5
JP2007535814A5 JP2007510751A JP2007510751A JP2007535814A5 JP 2007535814 A5 JP2007535814 A5 JP 2007535814A5 JP 2007510751 A JP2007510751 A JP 2007510751A JP 2007510751 A JP2007510751 A JP 2007510751A JP 2007535814 A5 JP2007535814 A5 JP 2007535814A5
Authority
JP
Japan
Prior art keywords
layer
silicon
semiconductor substrate
semiconductor
germanium
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2007510751A
Other languages
English (en)
Japanese (ja)
Other versions
JP2007535814A (ja
Filing date
Publication date
Priority claimed from US10/836,172 external-priority patent/US7163903B2/en
Application filed filed Critical
Publication of JP2007535814A publication Critical patent/JP2007535814A/ja
Publication of JP2007535814A5 publication Critical patent/JP2007535814A5/ja
Pending legal-status Critical Current

Links

JP2007510751A 2004-04-30 2005-04-05 シリコンゲルマニウムを用いる半導体構造の製造方法 Pending JP2007535814A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/836,172 US7163903B2 (en) 2004-04-30 2004-04-30 Method for making a semiconductor structure using silicon germanium
PCT/US2005/011552 WO2005112094A2 (en) 2004-04-30 2005-04-05 Method for making a semiconductor structure using silicon germanium

Publications (2)

Publication Number Publication Date
JP2007535814A JP2007535814A (ja) 2007-12-06
JP2007535814A5 true JP2007535814A5 (enExample) 2008-05-22

Family

ID=35187681

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007510751A Pending JP2007535814A (ja) 2004-04-30 2005-04-05 シリコンゲルマニウムを用いる半導体構造の製造方法

Country Status (7)

Country Link
US (2) US7163903B2 (enExample)
EP (1) EP1751791A4 (enExample)
JP (1) JP2007535814A (enExample)
KR (1) KR20070011408A (enExample)
CN (1) CN100533679C (enExample)
TW (1) TW200605159A (enExample)
WO (1) WO2005112094A2 (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7163903B2 (en) * 2004-04-30 2007-01-16 Freescale Semiconductor, Inc. Method for making a semiconductor structure using silicon germanium
US7332443B2 (en) * 2005-03-18 2008-02-19 Infineon Technologies Ag Method for fabricating a semiconductor device
US7439165B2 (en) * 2005-04-06 2008-10-21 Agency For Sceince, Technology And Reasearch Method of fabricating tensile strained layers and compressive strain layers for a CMOS device
US7420202B2 (en) 2005-11-08 2008-09-02 Freescale Semiconductor, Inc. Electronic device including a transistor structure having an active region adjacent to a stressor layer and a process for forming the electronic device
US7265004B2 (en) * 2005-11-14 2007-09-04 Freescale Semiconductor, Inc. Electronic devices including a semiconductor layer and a process for forming the same
US7560318B2 (en) * 2006-03-13 2009-07-14 Freescale Semiconductor, Inc. Process for forming an electronic device including semiconductor layers having different stresses
US7882382B2 (en) * 2006-06-14 2011-02-01 International Business Machines Corporation System and method for performing computer system maintenance and service
US7629220B2 (en) 2006-06-30 2009-12-08 Freescale Semiconductor, Inc. Method for forming a semiconductor device and structure thereof
US8569858B2 (en) 2006-12-20 2013-10-29 Freescale Semiconductor, Inc. Semiconductor device including an active region and two layers having different stress characteristics
US7843011B2 (en) * 2007-01-31 2010-11-30 Freescale Semiconductor, Inc. Electronic device including insulating layers having different strains
FR2925979A1 (fr) * 2007-12-27 2009-07-03 Commissariat Energie Atomique PROCEDE DE FABRICATION D'UN SUBSTRAT SEMICONDUCTEUR SUR ISOLANT COMPRENANT UNE ETAPE D'ENRICHISSEMENT EN Ge LOCALISE
US8211786B2 (en) 2008-02-28 2012-07-03 International Business Machines Corporation CMOS structure including non-planar hybrid orientation substrate with planar gate electrodes and method for fabrication
US20090289280A1 (en) * 2008-05-22 2009-11-26 Da Zhang Method for Making Transistors and the Device Thereof
US8003454B2 (en) * 2008-05-22 2011-08-23 Freescale Semiconductor, Inc. CMOS process with optimized PMOS and NMOS transistor devices
JP2010182841A (ja) * 2009-02-05 2010-08-19 Sony Corp 半導体薄膜の形成方法および半導体薄膜の検査装置
US8828851B2 (en) * 2012-02-01 2014-09-09 Stmicroeletronics, Inc. Method to enable the formation of silicon germanium channel of FDSOI devices for PFET threshold voltage engineering
CN103839891A (zh) * 2012-11-26 2014-06-04 中国科学院微电子研究所 一种半导体结构及其制造方法
FR3088481B1 (fr) * 2018-11-14 2024-06-07 Commissariat Energie Atomique Procede de fabrication d’un transistor a effet de champ a jonction alignee avec des espaceurs
CN115763222A (zh) * 2022-11-10 2023-03-07 华虹半导体(无锡)有限公司 解决选择性外基区断层的方法

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Publication number Priority date Publication date Assignee Title
US5312766A (en) * 1991-03-06 1994-05-17 National Semiconductor Corporation Method of providing lower contact resistance in MOS transistors
US20010003381A1 (en) * 1998-05-20 2001-06-14 Marius Orlowski Method to locate particles of a predetermined species within a solid and resulting structures
US6369438B1 (en) 1998-12-24 2002-04-09 Kabushiki Kaisha Toshiba Semiconductor device and method for manufacturing the same
JP3884203B2 (ja) 1998-12-24 2007-02-21 株式会社東芝 半導体装置の製造方法
JP3607194B2 (ja) * 1999-11-26 2005-01-05 株式会社東芝 半導体装置、半導体装置の製造方法、及び半導体基板
JP2002305293A (ja) * 2001-04-06 2002-10-18 Canon Inc 半導体部材の製造方法及び半導体装置の製造方法
JP3647777B2 (ja) 2001-07-06 2005-05-18 株式会社東芝 電界効果トランジスタの製造方法及び集積回路素子
JP2003031495A (ja) * 2001-07-12 2003-01-31 Hitachi Ltd 半導体装置用基板の製造方法および半導体装置の製造方法
US20030096490A1 (en) * 2001-11-16 2003-05-22 John Borland Method of forming ultra shallow junctions
US6805962B2 (en) * 2002-01-23 2004-10-19 International Business Machines Corporation Method of creating high-quality relaxed SiGe-on-insulator for strained Si CMOS applications
JP3873012B2 (ja) * 2002-07-29 2007-01-24 株式会社東芝 半導体装置の製造方法
US6759712B2 (en) * 2002-09-12 2004-07-06 Micron Technology, Inc. Semiconductor-on-insulator thin film transistor constructions
US6998683B2 (en) * 2002-10-03 2006-02-14 Micron Technology, Inc. TFT-based common gate CMOS inverters, and computer systems utilizing novel CMOS inverters
US6764883B1 (en) * 2003-01-07 2004-07-20 International Business Machines Corp. Amorphous and polycrystalline silicon nanolaminate
US7042052B2 (en) * 2003-02-10 2006-05-09 Micron Technology, Inc. Transistor constructions and electronic devices
US7163903B2 (en) * 2004-04-30 2007-01-16 Freescale Semiconductor, Inc. Method for making a semiconductor structure using silicon germanium
US7312128B2 (en) 2004-12-01 2007-12-25 Applied Materials, Inc. Selective epitaxy process with alternating gas supply

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