JP2007528610A - ラインエッジラフネス制御 - Google Patents

ラインエッジラフネス制御 Download PDF

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Publication number
JP2007528610A
JP2007528610A JP2007502898A JP2007502898A JP2007528610A JP 2007528610 A JP2007528610 A JP 2007528610A JP 2007502898 A JP2007502898 A JP 2007502898A JP 2007502898 A JP2007502898 A JP 2007502898A JP 2007528610 A JP2007528610 A JP 2007528610A
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JP
Japan
Prior art keywords
arc
layer
etching
arc opening
opening
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Pending
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JP2007502898A
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English (en)
Japanese (ja)
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JP2007528610A5 (enExample
Inventor
チョウイ・ヤンジン
チュー・ヘレン・エイチ．
リー・サンヘオン
カン・ショーン・エス．
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Lam Research Corp
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Lam Research Corp
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Publication of JP2007528610A publication Critical patent/JP2007528610A/ja
Publication of JP2007528610A5 publication Critical patent/JP2007528610A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H01L21/0276—Photolithographic processes using an anti-reflective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Inorganic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
JP2007502898A 2004-03-10 2005-03-02 ラインエッジラフネス制御 Pending JP2007528610A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/798,456 US20040171260A1 (en) 2002-06-14 2004-03-10 Line edge roughness control
PCT/US2005/007386 WO2005088693A1 (en) 2004-03-10 2005-03-02 Line edge roughness control

Publications (2)

Publication Number Publication Date
JP2007528610A true JP2007528610A (ja) 2007-10-11
JP2007528610A5 JP2007528610A5 (enExample) 2008-10-02

Family

ID=34961922

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007502898A Pending JP2007528610A (ja) 2004-03-10 2005-03-02 ラインエッジラフネス制御

Country Status (6)

Country Link
US (1) US20040171260A1 (enExample)
JP (1) JP2007528610A (enExample)
KR (1) KR20070011306A (enExample)
CN (1) CN101027759A (enExample)
TW (1) TW200537580A (enExample)
WO (1) WO2005088693A1 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040171260A1 (en) * 2002-06-14 2004-09-02 Lam Research Corporation Line edge roughness control
US7547635B2 (en) * 2002-06-14 2009-06-16 Lam Research Corporation Process for etching dielectric films with improved resist and/or etch profile characteristics
US20090311871A1 (en) * 2008-06-13 2009-12-17 Lam Research Corporation Organic arc etch selective for immersion photoresist
TWI689004B (zh) 2012-11-26 2020-03-21 美商應用材料股份有限公司 用於高深寬比半導體元件結構具有污染物去除之無黏附乾燥處理
GB201315424D0 (en) * 2013-08-29 2013-10-16 Occles Ltd An eye cover device
WO2016010776A1 (en) * 2014-07-13 2016-01-21 Kla-Tencor Corporation Metrology using overlay and yield critical patterns
US9899219B2 (en) * 2016-02-19 2018-02-20 Tokyo Electron Limited Trimming inorganic resists with selected etchant gas mixture and modulation of operating variables
WO2017151383A1 (en) * 2016-02-29 2017-09-08 Tokyo Electron Limited Selective siarc removal

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003133287A (ja) * 2001-10-30 2003-05-09 Matsushita Electric Ind Co Ltd ドライエッチング方法
WO2004003988A1 (ja) * 2002-06-27 2004-01-08 Tokyo Electron Limited プラズマ処理方法

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DE3122641A1 (de) * 1981-06-06 1982-12-23 Herberts Gmbh, 5600 Wuppertal Kathodisch abscheidbares waessriges elektrotauchlack-ueberzugsmittel
JPS63104425A (ja) * 1986-10-09 1988-05-09 インタ−ナショナル・ビジネス・マシ−ンズ・コ−ポレ−ション バイアの形成方法
US4857140A (en) * 1987-07-16 1989-08-15 Texas Instruments Incorporated Method for etching silicon nitride
EP0406434B1 (en) * 1988-11-18 1996-07-17 Kabushiki Kaisha Shibaura Seisakusho Dry-etching method
US5556501A (en) * 1989-10-03 1996-09-17 Applied Materials, Inc. Silicon scavenger in an inductively coupled RF plasma reactor
US5300460A (en) * 1989-10-03 1994-04-05 Applied Materials, Inc. UHF/VHF plasma for use in forming integrated circuit structures on semiconductor wafers
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Publication number Priority date Publication date Assignee Title
JP2003133287A (ja) * 2001-10-30 2003-05-09 Matsushita Electric Ind Co Ltd ドライエッチング方法
WO2004003988A1 (ja) * 2002-06-27 2004-01-08 Tokyo Electron Limited プラズマ処理方法

Also Published As

Publication number Publication date
US20040171260A1 (en) 2004-09-02
KR20070011306A (ko) 2007-01-24
CN101027759A (zh) 2007-08-29
WO2005088693A1 (en) 2005-09-22
TW200537580A (en) 2005-11-16

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