JP2007332012A - Fabrication process of semiconductor wafer - Google Patents

Fabrication process of semiconductor wafer Download PDF

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JP2007332012A
JP2007332012A JP2006169214A JP2006169214A JP2007332012A JP 2007332012 A JP2007332012 A JP 2007332012A JP 2006169214 A JP2006169214 A JP 2006169214A JP 2006169214 A JP2006169214 A JP 2006169214A JP 2007332012 A JP2007332012 A JP 2007332012A
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nitride semiconductor
substrate
semiconductor film
manufacturing
nitride
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Takeshi Tanaka
丈士 田中
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Hitachi Cable Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a fabrication process of a semiconductor wafer, in which a nitride semiconductor film is formed on a substrate of a desired material other than a substrate for the epitaxial growth of a nitride semiconductor film. <P>SOLUTION: A first nitride semiconductor film 2 is formed on a first substrate 1 and a second nitride semiconductor film 3 having a higher melting point than that of the first film 2 is formed on the first nitride semiconductor film 2. Subsequently, a carrier substrate 4 is adhered to the surface of the second nitride film 3. Then, the substrate 1 attached together, the first nitride semiconductor film 2, the second nitride semiconductor film 3 and a wafer containing the carrier substrate 4 are heat treated at a temperature higher than the melting point of the first nitride semiconductor film 2 and lower than that of the second nitride semiconductor film 3, to melt the first nitride semiconductor film 2 and remove the first substrate 1. Further, the second substrate 6 is attached to the surface of the second nitride semiconductor film 3 which is attached on the carrier substrate 4, and the carrier substrate 4 is removed. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、半導体ウェハの製造方法に関し、より詳細には、所望の基板上に窒化物半導体膜が形成された半導体ウェハを製造できる半導体ウェハの製造方法に関する。   The present invention relates to a semiconductor wafer manufacturing method, and more particularly to a semiconductor wafer manufacturing method capable of manufacturing a semiconductor wafer in which a nitride semiconductor film is formed on a desired substrate.

インジウム、ガリウム、アルミニウム、窒素からなる窒化物半導体は、そのIII族元素の組成比を制御することにより、紫外から可視光の大部分の領域をカバーする革新的な高効率発光デバイスの材料として開発が進められ、実用化されている。また、窒化物半導体は、高い飽和電子速度と高い絶縁破壊耐圧を有する為、将来的には高周波領域で桁違いの高効率・高出力を実現する電子デバイス用材料としての応用も期待されている。   Nitride semiconductors composed of indium, gallium, aluminum, and nitrogen are developed as innovative high-efficiency light-emitting device materials that cover the most area from ultraviolet to visible light by controlling the composition ratio of group III elements. Has been put into practical use. In addition, nitride semiconductors have high saturation electron velocity and high breakdown voltage, so in the future, they are expected to be applied as materials for electronic devices that achieve orders of magnitude higher efficiency and higher output in the high frequency range. .

窒化物半導体の薄膜を形成する際、最大の問題となるのは基板の選択である。 従来、単結晶の窒化物半導体基板そのものを製造することは極めて困難であり、これを入手することが殆ど不可能だった。このため青色LEDなどの窒化物半導体デバイスは、サファイア基板の上に形成されるのが常であった。これは、サファイア基板の高品質単結晶が工業的に容易に作製可能であり、また結晶の格子定数が窒化物半導体に近く、なおかつ結晶系が窒化物半導体に近く、それゆえに窒化物半導体をエピタキシャル成長する下地として好適であるためである。   When forming a nitride semiconductor thin film, the biggest problem is the selection of the substrate. Conventionally, it has been extremely difficult to manufacture a single crystal nitride semiconductor substrate itself, and it has been almost impossible to obtain it. For this reason, nitride semiconductor devices such as blue LEDs have usually been formed on sapphire substrates. This is because high-quality single crystals of a sapphire substrate can be easily produced industrially, the crystal lattice constant is close to that of a nitride semiconductor, and the crystal system is close to that of a nitride semiconductor. Therefore, the nitride semiconductor is epitaxially grown. This is because it is suitable as a base to be used.

しかし、サファイア基板には、次に述べるような欠点が存在する。
第一の欠点は、サファイアが絶縁体であることである。サファイアは絶縁体である為、サファイア基板上に形成した窒化物半導体で、LEDやバイポーラトランジスタを作製するには、電極を全て表面側に配置しなければならないという制限が付く。すると、ウェハの表面積のかなりの部分が電極で覆われることになるため、例えばLEDでは発光面積が実質的に減ってしまい、効率が悪くなる。また、複数回のエッチング処理が必要になることから、デバイス製造工程も複雑になり、製造コストが高くなる。
However, the sapphire substrate has the following drawbacks.
The first drawback is that sapphire is an insulator. Since sapphire is an insulator, it is a nitride semiconductor formed on a sapphire substrate, and there is a restriction that all electrodes must be arranged on the surface side in order to produce an LED or a bipolar transistor. Then, since a considerable portion of the surface area of the wafer is covered with the electrodes, for example, in the LED, the light emitting area is substantially reduced, and the efficiency is deteriorated. In addition, since a plurality of etching processes are required, the device manufacturing process becomes complicated and the manufacturing cost increases.

サファイア基板の第二の欠点は、熱伝導率が悪いことである。サファイアの熱伝導率は約0.4W/cm・Kであり、これは、例えばシリコンの1.5W/cm・Kと比べても1/4以下となっていて、他の半導体材料の基板と比較しても著しく低い値である。窒化物半導体でトランジスターを作製し高出力動作をさせた場合には、活性層が激しく発熱するが、このような場合に基板の熱伝導率が悪いと放熱が充分に行われず、トランジスターそのものの性能が経時的に劣化するという問題が生じる。   A second drawback of the sapphire substrate is poor thermal conductivity. The thermal conductivity of sapphire is about 0.4 W / cm · K, which is, for example, less than ¼ compared with 1.5 W / cm · K of silicon. Even if it compares, it is a remarkably low value. When a transistor is made of a nitride semiconductor and operated at a high output, the active layer generates heat violently. However, in such a case, if the thermal conductivity of the substrate is poor, heat dissipation is not performed sufficiently, and the performance of the transistor itself. This causes a problem of deterioration with time.

上記した欠点を克服するために、サファイヤ基板に替えて、単結晶炭化ケイ素、或いはHVPE法などで製造された単結晶GaNを、窒化物半導体薄膜を形成するための基板として用いる方法が知られている。   In order to overcome the above-mentioned drawbacks, a method of using single crystal silicon carbide or single crystal GaN manufactured by the HVPE method as a substrate for forming a nitride semiconductor thin film instead of a sapphire substrate is known. Yes.

また、成長用基板上に、応力吸収する衝撃緩和層として、窒化物半導体からなる第1の層に亀裂を形成し、この亀裂を有する第1の層上に窒化物半導体の第2の層を成長させ、第2の層の上方に別の基板を貼り合わせた後、研磨、エッチング、又はレーザ照射によって成長用基板を剥離する際の衝撃を上記亀裂を有する第1の層で緩和する方法が提案されている(例えば、特許文献1参照)。
特開2004−119807号公報
Further, a crack is formed in the first layer made of a nitride semiconductor as an impact relaxation layer for absorbing stress on the growth substrate, and a second layer of the nitride semiconductor is formed on the first layer having the crack. There is a method in which after growing and attaching another substrate over the second layer, the impact when peeling the growth substrate by polishing, etching, or laser irradiation is mitigated by the first layer having cracks. It has been proposed (see, for example, Patent Document 1).
JP 2004-119807 A

しかしながら、上述した単結晶炭化ケイ素や単結晶GaNを、窒化物半導体薄膜を形成するための基板として用いる方法では、これら単結晶基板はサファイア基板と比較してコストが数倍から数十倍も高く、用途は高付加価値の製品の製造に限られている。   However, in the method using the above-mentioned single crystal silicon carbide or single crystal GaN as a substrate for forming a nitride semiconductor thin film, the cost of these single crystal substrates is several to several tens of times higher than that of a sapphire substrate. The use is limited to the production of high value-added products.

また、上記亀裂を有する第1の層を用いた成長用基板剥離の方法では、亀裂を有する第1の層上に、窒化物半導体の第2の層を結晶性よく成長させるのは困難であるなどの問題がある。   Further, in the growth substrate peeling method using the first layer having cracks, it is difficult to grow the second layer of nitride semiconductor with good crystallinity on the first layer having cracks. There are problems such as.

本発明は、上記課題を解決し、窒化物半導体膜を、窒化物半導体膜のエピタキシャル成長用の基板とは異なる、所望の材質の基板に形成することができる半導体ウェハの製造方法を提供する。   The present invention solves the above problems and provides a method for manufacturing a semiconductor wafer, in which a nitride semiconductor film can be formed on a substrate of a desired material different from a substrate for epitaxial growth of a nitride semiconductor film.

本発明は、上記課題を解決するために、次のように構成されている。
本発明に係る半導体ウェハの製造方法の第1の態様は、第一の基板に第一の窒化物半導体膜を形成する工程と、前記第一の窒化物半導体膜の上に前記第一の窒化物半導体膜よりも融点の高い第二の窒化物半導体膜を形成する工程と、前記第二の窒化物半導体膜の表面にキャリアー基板を貼り合わせる工程と、張り合わせられた前記第一の基板、前記第一の窒化物半導体膜、前記第二の窒化物半導体膜及び前記キャリアー基板を含むウェハを、前記第一の窒化物半導体膜の融点より高く、かつ前記第二の窒化物半導体膜の融点より低い温度で加熱処理して前記第一の窒化物半導体膜を融解する工程と、前記第一の基板を除去する工程と、前記キャリアー基板上に張り合わされた前記第二の窒化物半導体膜の表面に第二の基板を張り合わせる工程と、前記キャリアー基板を除去する工程とを有することを特徴とする半導体ウェハの製造方法である。
In order to solve the above problems, the present invention is configured as follows.
A first aspect of a method for producing a semiconductor wafer according to the present invention includes a step of forming a first nitride semiconductor film on a first substrate, and the first nitride on the first nitride semiconductor film. A step of forming a second nitride semiconductor film having a higher melting point than the oxide semiconductor film, a step of bonding a carrier substrate to the surface of the second nitride semiconductor film, the bonded first substrate, and The wafer including the first nitride semiconductor film, the second nitride semiconductor film, and the carrier substrate is higher than the melting point of the first nitride semiconductor film and higher than the melting point of the second nitride semiconductor film. A step of melting the first nitride semiconductor film by heat treatment at a low temperature; a step of removing the first substrate; and a surface of the second nitride semiconductor film bonded to the carrier substrate The process of bonding the second substrate to A method of manufacturing a semiconductor wafer, characterized by a step of removing the carrier substrate.

第2の態様は、第1の態様において、前記第一の基板は、サファイア、シリコン又は酸化亜鉛からなることを特徴とする半導体ウェハの製造方法である。   A second aspect is a method for manufacturing a semiconductor wafer according to the first aspect, wherein the first substrate is made of sapphire, silicon, or zinc oxide.

第3の態様は、第1または第2の態様において、前記第一の窒化物半導体膜は、GaIn(1−x)N (0≦x≦1)からなることを特徴とする半導体ウェハの製造方法である。 A third aspect is the semiconductor wafer according to the first or second aspect, wherein the first nitride semiconductor film is made of Ga x In (1-x) N (0 ≦ x ≦ 1). It is a manufacturing method.

第4の態様は、第1〜第3のいずれかの態様において、前記第二の窒化物半導体膜は、AlGaIn(1−y−z)N (0≦y≦1、0≦z≦1、0≦y+z≦1)からなることを特徴とする半導体ウェハの製造方法である。 According to a fourth aspect, in any one of the first to third aspects, the second nitride semiconductor film is made of Al y Ga z In (1-yz) N (0 ≦ y ≦ 1, 0 ≦ z ≦ 1, 0 ≦ y + z ≦ 1). A method of manufacturing a semiconductor wafer, comprising:

第5の態様は、第1〜第4のいずれかの態様において、前記第二の基板は、多結晶炭化ケイ素、シリコン、酸化亜鉛、インジウム錫酸化物又はニッケルからなることを特徴とする半導体ウェハの製造方法である。   A fifth aspect is the semiconductor wafer according to any one of the first to fourth aspects, wherein the second substrate is made of polycrystalline silicon carbide, silicon, zinc oxide, indium tin oxide, or nickel. It is a manufacturing method.

第6の態様は、第1〜第5のいずれかの態様において、前記第一の窒化物半導体膜を融解する加熱温度が、800℃〜1500℃の範囲であることを特徴とする半導体ウェハの製造方法である。   A sixth aspect is the semiconductor wafer according to any one of the first to fifth aspects, wherein the heating temperature for melting the first nitride semiconductor film is in the range of 800 ° C. to 1500 ° C. It is a manufacturing method.

第7の態様は、第1〜第6のいずれかの態様において、前記キャリアー基板が除去されて露出した前記第二の窒化物半導体膜の表面が、III族面であることを特徴とする半導体ウェハの製造方法である。   According to a seventh aspect, in any one of the first to sixth aspects, the surface of the second nitride semiconductor film exposed by removing the carrier substrate is a group III surface. A wafer manufacturing method.

本発明によれば、第一、第二の窒化物半導体膜の成長用基板である第一の基板とは異なる、第二の基板上に第二の窒化物半導体膜を形成できる。従って、導電性、熱伝導率、コストなどで優れる所望の材料を選択し、これを第二の基板として用いることができる。   According to the present invention, the second nitride semiconductor film can be formed on the second substrate, which is different from the first substrate which is the growth substrate for the first and second nitride semiconductor films. Therefore, a desired material that is excellent in conductivity, thermal conductivity, cost, and the like can be selected and used as the second substrate.

以下に、本発明に係る半導体ウェハの製造方法の一実施形態を説明する。
この実施形態の半導体ウェハの製造方法では、まず、第一の基板上に、有機金属気相成長(MOVPE)装置などを用いて、第一の窒化物半導体膜と、この第一の窒化物半導体膜よりも融点の高い第二の窒化物半導体膜とを順次形成する。第一の基板は、窒化物半導体膜の成長に適したサファイア、シリコン又は酸化亜鉛などを用いるのが好ましい。また、第一の窒化物半導体膜には、GaIn(1−x)N (0≦x≦1)が、第二の窒化物半導体膜には、AlGaIn(1−y−z)N (0≦y≦1、0≦z≦1、0≦y+z≦1)が好ましい。なお、第一の窒化物半導体膜及び第一の基板は、後工程での第一の窒化物半導体膜の融解によって除去されるので、第一の基板とGaIn(1−x)N などの第一の窒化物半導体膜との間に、低温成長AlN膜や低温成長GaN膜などを形成するようにしても良い。
Hereinafter, an embodiment of a semiconductor wafer manufacturing method according to the present invention will be described.
In the method of manufacturing a semiconductor wafer according to this embodiment, first, a first nitride semiconductor film and a first nitride semiconductor are formed on a first substrate by using a metal organic chemical vapor deposition (MOVPE) apparatus or the like. A second nitride semiconductor film having a higher melting point than the film is sequentially formed. The first substrate is preferably made of sapphire, silicon, zinc oxide, or the like suitable for growing a nitride semiconductor film. In addition, Ga x In (1-x) N (0 ≦ x ≦ 1) is used for the first nitride semiconductor film, and Al y Ga z In (1-y— is used for the second nitride semiconductor film. z) N (0 ≦ y ≦ 1,0 ≦ z ≦ 1,0 ≦ y + z ≦ 1) is preferred. Note that since the first nitride semiconductor film and the first substrate are removed by melting the first nitride semiconductor film in a later step, the first substrate and Ga x In (1-x) N, etc. A low temperature growth AlN film, a low temperature growth GaN film, or the like may be formed between the first nitride semiconductor film and the first nitride semiconductor film.

次に、第二の窒化物半導体膜の表面にキャリアー基板を貼り合わせ、張り合わせられた第一の基板、第一の窒化物半導体膜、第二の窒化物半導体膜及びキャリアー基板を含むウェハを、第一の窒化物半導体膜の融点より高く、かつ第二の窒化物半導体膜の融点より低い温度で加熱処理して第一の窒化物半導体膜を融解させ、第一の窒化物半導体膜及び第一の基板を上記ウェハから除去する。
第一の窒化物半導体膜を融解する加熱温度は、加熱処理雰囲気(常圧又は減圧、流すガス種など)、第一の窒化物半導体膜の材料(GaIn(1−x)N のGa組成xなど)、第二の窒化物半導体膜の材料(AlGaIn(1−y−z)N のAl組成yなど)によって変化するが、例えば、第一の窒化物半導体膜がGaN、第二の窒化物半導体膜がAlNであって、減圧水素雰囲気で加熱処理する場合、GaNは800〜900℃から分解を始め、一方、AlNは1400℃でも分解せず、おそらく1500℃以下の処理温度でも十分に薄膜形態を保てる。従って、第一の窒化物半導体膜を融解処理する温度範囲は、800℃〜1500℃の範囲が好ましい。
Next, a carrier substrate is bonded to the surface of the second nitride semiconductor film, and a wafer including the first substrate, the first nitride semiconductor film, the second nitride semiconductor film, and the carrier substrate bonded together, Heat treatment is performed at a temperature higher than the melting point of the first nitride semiconductor film and lower than the melting point of the second nitride semiconductor film to melt the first nitride semiconductor film, and the first nitride semiconductor film and the first nitride semiconductor film One substrate is removed from the wafer.
The heating temperature for melting the first nitride semiconductor film includes a heat treatment atmosphere (normal pressure or reduced pressure, flowing gas type, etc.), a material of the first nitride semiconductor film (Ga x In (1-x) N Ga ) For example, the composition of the second nitride semiconductor film varies depending on the material of the second nitride semiconductor film (such as Al composition y of Al y Ga z In (1-yz) N). When the second nitride semiconductor film is AlN and heat treatment is performed in a reduced-pressure hydrogen atmosphere, GaN begins to decompose from 800 to 900 ° C., while AlN does not decompose even at 1400 ° C., probably less than 1500 ° C. A thin film form can be maintained sufficiently even at the processing temperature. Therefore, the temperature range for melting the first nitride semiconductor film is preferably in the range of 800 ° C to 1500 ° C.

次に、キャリアー基板上に張り合わされた第二の窒化物半導体膜の表面に第二の基板を張り合わせた後、キャリアー基板を除去する。これにより、第二の基板上に第二の窒化物半導体膜が形成された半導体ウェハが得られる。第二の基板には、導電性や熱伝導率などに優れる低コストの材料、例えば、多結晶炭化ケイ素、シリコン、酸化亜鉛、インジウム錫酸化物又はニッケルなどの基板が好ましい。得られた半導体ウェハを用いて各種デバイス(光デバイス、電子デバイス)を作製するために、第二の窒化物半導体膜上に窒化物半導体多層膜のデバイス活性層を成長させる。   Next, after the second substrate is bonded to the surface of the second nitride semiconductor film bonded to the carrier substrate, the carrier substrate is removed. Thereby, a semiconductor wafer in which the second nitride semiconductor film is formed on the second substrate is obtained. The second substrate is preferably a low-cost material excellent in conductivity, thermal conductivity, etc., such as polycrystalline silicon carbide, silicon, zinc oxide, indium tin oxide, or nickel. In order to produce various devices (optical device, electronic device) using the obtained semiconductor wafer, a device active layer of a nitride semiconductor multilayer film is grown on the second nitride semiconductor film.

上記の製造方法により、窒化物半導体膜(第二の窒化物半導体膜)を、所望の材質からなる基板(第二の基板)上に形成することができる。この結果、窒化物半導体多層膜のデバイス活性層がもつ特徴と、第二の基板の材質がもつ有利な物性(導電性や高い熱伝導率など)を、各種デバイスの動作目的に適合するように自由に組み合わせることが可能となる。   By the above manufacturing method, the nitride semiconductor film (second nitride semiconductor film) can be formed on the substrate (second substrate) made of a desired material. As a result, the characteristics of the device active layer of the nitride semiconductor multilayer film and the advantageous physical properties (conductivity, high thermal conductivity, etc.) of the material of the second substrate are adapted to the operation purpose of various devices. It becomes possible to combine freely.

窒化物半導体を通常のエピタキシャル成長法で直接基板上に形成する場合には、前述したように、基板が高品質の単結晶であること、基板と窒化物半導体の格子定数が近いこと、基板と窒化物半導体の結晶系が同一であるか近似していること、などが必要条件であった。このため熱伝導率の悪いサファイア基板などを使う必要があった。
しかし、本実施形態の製造方法によれば、窒化物半導体膜(第二の窒化物半導体膜)が貼り付けられる第二の基板は、直接的にエピタキシャル成長に用いられる訳ではない。この為、第二の基板は上記の必要条件を満たす必要が全く無い。それゆえ、本実施形態によれば、導電性に優れる、熱伝導率に優れる、或いは安価に入手可能であるなど有利な条件を有する材料を選択し、これを第二の基板として用いることができ、性能の良い安価なデバイスが作製可能となる。
When a nitride semiconductor is formed directly on a substrate by a normal epitaxial growth method, as described above, the substrate is a high-quality single crystal, the lattice constant of the substrate and the nitride semiconductor is close, the substrate and the nitride A necessary condition is that the crystal systems of the physical semiconductors are the same or approximate. For this reason, it was necessary to use a sapphire substrate having poor thermal conductivity.
However, according to the manufacturing method of the present embodiment, the second substrate on which the nitride semiconductor film (second nitride semiconductor film) is attached is not directly used for epitaxial growth. For this reason, the second substrate does not have to satisfy the above-mentioned requirements at all. Therefore, according to this embodiment, it is possible to select a material having advantageous conditions such as excellent conductivity, excellent thermal conductivity, or being available at a low cost, and use this as the second substrate. Thus, an inexpensive device with good performance can be manufactured.

以下に、本発明に係る半導体ウェハの製造方法の一実施例を図面を用いて説明する。図1は本実施例の各製造工程を示す断面図である。   An embodiment of a semiconductor wafer manufacturing method according to the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view showing each manufacturing process of the present embodiment.

まず、図1(a)に示すように、第一の基板であるサファイア基板1上に、通常のMOVPE法(有機金属気相成長法)によって、第一の窒化物半導体膜である窒化ガリウム層2、及び第二の窒化物半導体膜である窒化アルミニウム層3を成長させる。窒化ガリウム層2の厚さは、その表面側をある程度、平坦化・低転移化できる程度に厚い方が望ましく、例えば0.3μm〜5.0μm程度の範囲であれば適切である。また、窒化アルミニウム層3については、クラックを生じない厚さであることが望ましく、例えば0.05μm〜2.0μm程度の範囲が適切である。   First, as shown in FIG. 1A, a gallium nitride layer as a first nitride semiconductor film is formed on a sapphire substrate 1 as a first substrate by a normal MOVPE method (metal organic vapor phase epitaxy). 2 and an aluminum nitride layer 3 which is a second nitride semiconductor film are grown. The thickness of the gallium nitride layer 2 is desirably so thick that the surface side can be flattened and lowered to some extent. For example, the thickness is in the range of about 0.3 μm to 5.0 μm. The aluminum nitride layer 3 desirably has a thickness that does not cause cracks. For example, a range of about 0.05 μm to 2.0 μm is appropriate.

次に、平坦度が高くなるように加工したキャリアー基板としての石英基板4を用意し、図1(b)に示すように、石英基板4を上記サファイア基板1上の窒化アルミニウム層3に重ね合わせる。
ここで、重ね合わせられたウェハを、治具(図示せず)を用いて上下から強く挟み付けて保持し、この挟み付けられた状態のウェハをアニール炉(図示せず)に導入する。そして、アニール炉を水素雰囲気にし、アニール温度を1100℃として上記ウェハを30分間加熱処理する。
Next, a quartz substrate 4 is prepared as a carrier substrate processed so as to have high flatness, and the quartz substrate 4 is overlaid on the aluminum nitride layer 3 on the sapphire substrate 1 as shown in FIG. .
Here, the stacked wafers are firmly held from above and below using a jig (not shown), and the held wafers are introduced into an annealing furnace (not shown). Then, the annealing furnace is placed in a hydrogen atmosphere, the annealing temperature is set to 1100 ° C., and the wafer is heat-treated for 30 minutes.

すると、この加熱過程で二つの現象が生じ、ウェハは図1(c)に示すような状態になる。すなわち、まず、昇温過程において、圧着と加熱の両方の作用により、石英と窒化アルミニウムが焼結にて強く結合する。すなわち、窒化アルミニウム層3が石英基板4に張り合わせられる。
次いで、処理温度が1000℃前後になった段階で、窒化ガリウム層2の窒化ガリウムが融解し分解を開始する。窒化ガリウムが分解すると、窒素成分は気体となって散逸し、ガリウム5のみが単体の液体となってドロップレット(小滴)形状で残留する。ガリウム5の融点は約30℃であるため、熱処理後にアニール炉を降温させても、ガリウム5は殆ど液体のまま残留する。
Then, two phenomena occur in this heating process, and the wafer is in a state as shown in FIG. That is, first, in the temperature rising process, quartz and aluminum nitride are strongly bonded by sintering by the action of both pressure bonding and heating. That is, the aluminum nitride layer 3 is bonded to the quartz substrate 4.
Next, when the processing temperature reaches around 1000 ° C., the gallium nitride in the gallium nitride layer 2 melts and starts to decompose. When gallium nitride is decomposed, the nitrogen component is dissipated as a gas, and only gallium 5 becomes a single liquid and remains in a droplet shape. Since the melting point of gallium 5 is about 30 ° C., the gallium 5 remains almost liquid even when the annealing furnace is cooled after the heat treatment.

上記加熱処理が終了してウェハがほぼ40℃まで冷えたところで、ウェハをアニール炉から取り出し、石英基板4に貼り付けられた窒化アルミニウム層3からサファイア基板1を引き剥がす。既に窒化ガリウム層2の窒化ガリウムは分解し、液体ガリウム5のドロップレットが残留しているだけの状態であるから、サファイア基板1は極めて容易に引き剥がすことができる。この様子を図1(d)に示す。   When the heat treatment is completed and the wafer is cooled to approximately 40 ° C., the wafer is taken out of the annealing furnace, and the sapphire substrate 1 is peeled off from the aluminum nitride layer 3 attached to the quartz substrate 4. Since the gallium nitride of the gallium nitride layer 2 has already been decomposed and only the liquid gallium 5 droplets remain, the sapphire substrate 1 can be peeled off very easily. This state is shown in FIG.

窒化アルミニウム層3の表面に付着していた液体ガリウム5のドロップレットを、スクラブ洗浄やアルコール洗浄で取り除き、窒化アルミニウム層3表面を清浄にする。清浄化した後の様子を図1(e)に示す。   The liquid gallium 5 droplets adhering to the surface of the aluminum nitride layer 3 are removed by scrub cleaning or alcohol cleaning to clean the surface of the aluminum nitride layer 3. The state after the cleaning is shown in FIG.

次に、第二の基板として、平坦度が高くなるように加工された多結晶炭化ケイ素基板6を用意し、図1(f)に示すように、石英基板4に貼り付けられた窒化アルミニウム層3を挟むようにして、多結晶炭化ケイ素基板6を重ね合わせる。そして、重ね合わせられたウェハを、治具で上下から強く押さえつけた状態にして、再度、ウェハをアニール炉に導入する。アニール炉内を水素雰囲気とし、アニール温度を1100℃としてウェハを30分間加熱処理する。すると、圧着と加熱の両方の作用により、多結晶炭化ケイ素基板6と窒化アルミニウム層3の窒化アルミニウムが焼結にて強く結合する。すなわち、窒化アルミニウム層3が多結晶炭化ケイ素基板6に張り合わせられる(図1(f))。   Next, a polycrystalline silicon carbide substrate 6 processed to have high flatness is prepared as a second substrate, and an aluminum nitride layer attached to the quartz substrate 4 as shown in FIG. 1 (f). 3, the polycrystalline silicon carbide substrate 6 is superimposed. Then, the superposed wafer is pressed down from above and below with a jig, and the wafer is again introduced into the annealing furnace. The annealing furnace is set to a hydrogen atmosphere, the annealing temperature is set to 1100 ° C., and the wafer is heat-treated for 30 minutes. Then, the polycrystalline silicon carbide substrate 6 and the aluminum nitride of the aluminum nitride layer 3 are strongly bonded by sintering by the action of both pressure bonding and heating. That is, the aluminum nitride layer 3 is bonded to the polycrystalline silicon carbide substrate 6 (FIG. 1 (f)).

次に、それぞれが張り合わせられた石英基板4、窒化アルミニウム層3、および多結晶炭化ケイ素基板6のウェハを、フッ酸系の溶液中に導入する。すると、石英基板4のみが溶解し、多結晶炭化ケイ素基板6と、これに貼り付けられた窒化アルミニウム層3が残留する(図1(g))。この状態の窒化アルミニウム層3は、MOVPE法による成長後のものと同様に、III族面が表面に出ている。   Next, the quartz substrate 4, the aluminum nitride layer 3, and the polycrystalline silicon carbide substrate 6 wafer that are bonded to each other are introduced into a hydrofluoric acid-based solution. Then, only the quartz substrate 4 is dissolved, and the polycrystalline silicon carbide substrate 6 and the aluminum nitride layer 3 attached thereto remain (FIG. 1 (g)). The aluminum nitride layer 3 in this state has a group III surface on the surface, similar to that after growth by the MOVPE method.

III族面は熱的化学的に安定した面であるため、多結晶炭化ケイ素基板6に貼り付けられた窒化アルミニウム層3の上には、高品質の窒化物半導体多層膜からなるデバイス活性層7をMOVPE法により形成することが可能である。デバイス活性層7を形成した後の様子を図1(h)に示す。   Since the group III surface is a thermally and chemically stable surface, a device active layer 7 made of a high-quality nitride semiconductor multilayer film is formed on the aluminum nitride layer 3 attached to the polycrystalline silicon carbide substrate 6. Can be formed by the MOVPE method. A state after the device active layer 7 is formed is shown in FIG.

このデバイス活性層7を加工して電界効果トランジスターが作製される。デバイス活性層7上に、ソース電極8、ゲート電極9およびドレイン電極10が形成された電界効果トランジスターの一例を図2に示す。この電界効果トランジスターでは、サファイア基板とは異なり熱伝導率の良好な多結晶炭化ケイ素基板(この場合は高抵抗であることが望ましい)6上に形成されている。このため、高出力動作時であっても多結晶炭化ケイ素基板6を通じて十分な放熱が可能となる。   The device active layer 7 is processed to produce a field effect transistor. An example of a field effect transistor in which the source electrode 8, the gate electrode 9, and the drain electrode 10 are formed on the device active layer 7 is shown in FIG. In this field effect transistor, unlike a sapphire substrate, it is formed on a polycrystalline silicon carbide substrate (in this case, preferably a high resistance) having a good thermal conductivity. For this reason, sufficient heat dissipation can be achieved through the polycrystalline silicon carbide substrate 6 even during high-power operation.

また同様に、図1の半導体ウェハのデバイス活性層7を加工して作製されるLED(発光ダイオード)の一例を図3に示す。このLEDは、サファイア基板と異なり導電性のある多結晶炭化ケイ素基板6上に形成されている。このため、デバイス活性層7の上に電極(p型電極)12を設ける一方、多結晶炭化ケイ素基板6の裏面に電極(n型電極)11を設けることが可能であり、LEDチップ面積を小さくできると共に、プロセスを簡略化できるため、コストを低減できる。   Similarly, FIG. 3 shows an example of an LED (light emitting diode) manufactured by processing the device active layer 7 of the semiconductor wafer of FIG. Unlike the sapphire substrate, this LED is formed on a conductive polycrystalline silicon carbide substrate 6. For this reason, while providing the electrode (p-type electrode) 12 on the device active layer 7, it is possible to provide the electrode (n-type electrode) 11 on the back surface of the polycrystalline silicon carbide substrate 6, thereby reducing the LED chip area. In addition, the cost can be reduced because the process can be simplified.

本発明に係る半導体ウェハの製造方法の一実施例を示す工程図である。It is process drawing which shows one Example of the manufacturing method of the semiconductor wafer which concerns on this invention. 図1の半導体ウェハを利用して作製した電界効果トランジスターの構造を示す断面図である。It is sectional drawing which shows the structure of the field effect transistor produced using the semiconductor wafer of FIG. 図1の半導体ウェハを利用して作製したLEDの構造を示す断面図である。It is sectional drawing which shows the structure of LED produced using the semiconductor wafer of FIG.

符号の説明Explanation of symbols

1 サファイア基板(第一の基板)
2 窒化ガリウム層(第一の窒化物半導体膜)
3 窒化アルミニウム層(第二の窒化物半導体膜)
4 石英基板(キャリアー基板)
5 液体ガリウムのドロップレット
6 多結晶炭化ケイ素基板(第二の基板)
7 窒化物半導体多層膜からなるデバイス活性層
8 ソース電極
9 ゲート電極
10 ドレイン電極
11 n型電極
12 p型電極
1 Sapphire substrate (first substrate)
2 Gallium nitride layer (first nitride semiconductor film)
3 Aluminum nitride layer (second nitride semiconductor film)
4 Quartz substrate (carrier substrate)
5 Liquid gallium droplet 6 Polycrystalline silicon carbide substrate (second substrate)
7 Device active layer made of nitride semiconductor multilayer film 8 Source electrode 9 Gate electrode 10 Drain electrode 11 n-type electrode 12 p-type electrode

Claims (7)

第一の基板に第一の窒化物半導体膜を形成する工程と、
前記第一の窒化物半導体膜の上に前記第一の窒化物半導体膜よりも融点の高い第二の窒化物半導体膜を形成する工程と、
前記第二の窒化物半導体膜の表面にキャリアー基板を貼り合わせる工程と、
張り合わせられた前記第一の基板、前記第一の窒化物半導体膜、前記第二の窒化物半導体膜及び前記キャリアー基板を含むウェハを、前記第一の窒化物半導体膜の融点より高く、かつ前記第二の窒化物半導体膜の融点より低い温度で加熱処理して前記第一の窒化物半導体膜を融解する工程と、
前記第一の基板を除去する工程と、
前記キャリアー基板上に張り合わされた前記第二の窒化物半導体膜の表面に第二の基板を張り合わせる工程と、
前記キャリアー基板を除去する工程とを有することを特徴とする半導体ウェハの製造方法。
Forming a first nitride semiconductor film on a first substrate;
Forming a second nitride semiconductor film having a melting point higher than that of the first nitride semiconductor film on the first nitride semiconductor film;
Bonding a carrier substrate to the surface of the second nitride semiconductor film;
A wafer including the bonded first substrate, the first nitride semiconductor film, the second nitride semiconductor film, and the carrier substrate is higher than the melting point of the first nitride semiconductor film, and the Melting the first nitride semiconductor film by heat treatment at a temperature lower than the melting point of the second nitride semiconductor film;
Removing the first substrate;
Bonding a second substrate to the surface of the second nitride semiconductor film bonded onto the carrier substrate;
And a step of removing the carrier substrate.
請求項1に記載の半導体ウェハの製造方法において、前記第一の基板は、サファイア、シリコン又は酸化亜鉛からなることを特徴とする半導体ウェハの製造方法。   2. The method for manufacturing a semiconductor wafer according to claim 1, wherein the first substrate is made of sapphire, silicon, or zinc oxide. 請求項1又は2に記載の半導体ウェハの製造方法において、前記第一の窒化物半導体膜は、GaIn(1−x)N (0≦x≦1)からなることを特徴とする半導体ウェハの製造方法。 3. The semiconductor wafer manufacturing method according to claim 1, wherein the first nitride semiconductor film is made of Ga x In (1-x) N (0 ≦ x ≦ 1). 4. Manufacturing method. 請求項1〜3のいずれかに記載の半導体ウェハの製造方法において、前記第二の窒化物半導体膜は、AlGaIn(1−y−z)N (0≦y≦1、0≦z≦1、0≦y+z≦1)からなることを特徴とする半導体ウェハの製造方法。 4. The method of manufacturing a semiconductor wafer according to claim 1, wherein the second nitride semiconductor film is made of Al y Ga z In (1-yz) N (0 ≦ y ≦ 1, 0 ≦ z ≦ 1, 0 ≦ y + z ≦ 1). A method for producing a semiconductor wafer, comprising: 請求項1〜4のいずれかに記載の半導体ウェハの製造方法において、前記第二の基板は、多結晶炭化ケイ素、シリコン、酸化亜鉛、インジウム錫酸化物又はニッケルからなることを特徴とする半導体ウェハの製造方法。   5. The semiconductor wafer manufacturing method according to claim 1, wherein the second substrate is made of polycrystalline silicon carbide, silicon, zinc oxide, indium tin oxide, or nickel. Manufacturing method. 請求項1〜5のいずれかに記載の半導体ウェハの製造方法において、前記第一の窒化物半導体膜を融解する加熱温度が、800℃〜1500℃の範囲であることを特徴とする半導体ウェハの製造方法。   6. The method of manufacturing a semiconductor wafer according to claim 1, wherein a heating temperature for melting the first nitride semiconductor film is in a range of 800 [deg.] C. to 1500 [deg.] C. Production method. 請求項1〜6のいずれかに記載の半導体ウェハの製造方法において、前記キャリアー基板が除去されて露出した前記第二の窒化物半導体膜の表面が、III族面であることを特徴とする半導体ウェハの製造方法。   7. The semiconductor wafer manufacturing method according to claim 1, wherein the surface of the second nitride semiconductor film exposed by removing the carrier substrate is a group III surface. Wafer manufacturing method.
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