JP2004103833A - Method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the heat resistance of a GaN semiconductor element formed on a sapphire substrate. <P>SOLUTION: A GaAs substrate 15 is bonded onto a plurality of semiconductor layers (12 to 14) comprising GaN layers, which are formed on the sapphire substrate 11. The sapphire substrate 11 is thinned by a plane polishing method, and a Si substrate 16 is bonded to a rear face of the thinned sapphire substrate 11. The GaAs substrate 15 is removed and the semiconductor elements are formed on the semiconductor layers (12 to 14). <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a technique for reducing the thermal resistance of a GaN-based semiconductor device formed on a sapphire substrate.
[0002]
[Prior art]
As a GaN-based semiconductor as a wide gap material, a GaN-based semiconductor element formed on a SiC substrate having excellent thermal conductivity has been used to achieve high current density and high output. The GaN-based semiconductor element formed on the sapphire substrate was configured as shown in FIG. In FIG. 5, 31 is a sapphire substrate, 32 is a low-temperature GaN buffer layer, 33 is an undoped GaN layer, 34 is an Al _0.25 Ga _0.75 N layer, 35 is a source and drain electrode, and 36 is a gate electrode. Since the thermal conductivity of the sapphire substrate 31 is about one order of magnitude worse than that of SiC, high current density and high output have been achieved by making the sapphire substrate 31 thinner (Reference, Non-Patent Document 1).
[0003]
[Non-patent document 1]
Yuji Ando and 5 others, "110 W output AlGaN / GaN heterojunction FET on thinned sapphire substrate", IEICE Technical Report, IEICE, January 9, 2002, Vol. 101, no. 549, p. 7-12.
[0004]
[Problems to be solved by the invention]
However, the GaN-based semiconductor device formed on the SiC substrate has a diameter of about 2 inches of the SiC substrate itself, and has a problem in increasing the diameter. Therefore, it is difficult to reduce the cost by mass production.
[0005]
On the other hand, sapphire substrates have been commercialized up to a diameter of 8 inches, and cost reduction by mass production of GaN-based semiconductor elements formed on the sapphire substrate is easier than that of the SiC substrate. However, although the sapphire substrate has low thermal conductivity, the thermal resistance is reduced by reducing the thickness of the sapphire substrate.However, there is a problem in handling after polishing, and the sapphire substrate is made thin enough to sufficiently reduce the thermal resistance. Has not been realized.
[0006]
An object of the present invention is to solve such a conventional technology, reduce the thermal resistance of a GaN-based semiconductor element formed on a sapphire substrate, realize a high current density and a high output, and mass-produce the substrate with a large diameter. It is an object of the present invention to provide a method for manufacturing a semiconductor device, which can reduce the price by the effect.
[0007]
[Means for Solving the Problems]
The invention according to claim 1 includes (1) a step of forming a plurality of semiconductor layers including at least a GaN layer on a sapphire substrate, and joining a first semiconductor substrate on the plurality of semiconductor layers; A step of thinning the sapphire substrate by a plane polishing method; (3) a step of bonding a second semiconductor substrate on the sapphire substrate which has been plane-polished; and (4) a step of polishing the first semiconductor substrate by a plane polishing method. A method of manufacturing a semiconductor device, comprising the steps of: selectively removing the thin film by chemical etching after thinning; and (5) forming a semiconductor element on the plurality of semiconductor layers. .
[0008]
According to a second aspect of the present invention, there is provided (1) a step of forming a plurality of semiconductor layers including at least a GaN layer on a sapphire substrate, and joining a first semiconductor substrate on the plurality of semiconductor layers; Irradiating a laser beam from the sapphire substrate side to separate the sapphire substrate from the plurality of semiconductor layers; and (3) forming a second semiconductor on the plurality of semiconductor layers exposed to the atmosphere by the separation of the sapphire substrate. A step of bonding the substrates; (4) a step of thinning the first semiconductor substrate by a plane polishing method and then selectively removing the first semiconductor substrate by chemical etching; and (5) a step of forming a semiconductor on the plurality of semiconductor layers. And a step of forming an element.
[0009]
The invention according to claim 3 is the method for manufacturing a semiconductor device according to claim 1 or 2, wherein the first semiconductor substrate is a GaAs or InP substrate, and the second semiconductor substrate is a Si, diamond, or AlN substrate. And a method for manufacturing a semiconductor device.
[0010]
According to a fourth aspect of the present invention, in the method of manufacturing a semiconductor device according to the first or second aspect, the first and the third steps are performed by ion bombardment in a high vacuum. 2. A method of manufacturing a semiconductor device, comprising activating a semiconductor substrate and a semiconductor layer or a sapphire substrate surface and bringing the active surface into contact with a counterpart at room temperature or in a heated state to perform semiconductor bonding.
[0011]
BEST MODE FOR CARRYING OUT THE INVENTION
[Embodiment 1]
FIG. 1 is a cross-sectional view of a GaN-based semiconductor device on a sapphire substrate according to Embodiment 1, and FIG. 2 is an explanatory diagram of a method for manufacturing the semiconductor device. First, a low-temperature (LT) GaN buffer layer 12 is deposited on a sapphire substrate (0001) 11 having a thickness of 330 μm by, for example, MOCVD or the like, and then an undoped GaN layer 13 is deposited to a thickness of 2.5 μm. A semiconductor substrate on which a layer 14 (total 25 nm thick) in which Al _0.25 Ga _0.75 N (15 nm thick) of ¹⁸ cm ⁻³ is sandwiched between undoped Al _0.25 Ga _0.75 N (5 nm thick). Is prepared (FIG. 2A). Here, the surface roughness needs to be 1 nm or less.
[0012]
Next, the semiconductor surface of the layer 14 is irradiated with an Ar ion beam in a high vacuum to remove a natural oxide film formed on the surface and activate the surface (FIG. 2B). The GaAs substrate (001) 15 having a thickness of 350 μm whose surface is activated is heated to room temperature or 400 ° C. or lower to directly join (FIG. 2C). Although the GaAs substrate 15 is used in this example, an InP substrate may be used.
[0013]
Next, the back surface of the sapphire substrate 11 is mirror-polished to a thickness of 50 μm or less by a plane polishing method using diamond powder (FIG. 2D).
[0014]
Next, the back surface of the sapphire substrate 11 after polishing is activated by irradiating an Ar ion beam in a high vacuum, and the Si substrate 16 whose surface is similarly activated is heated to room temperature or 400 ° C. or lower to be joined. (FIG. 2 (e)). In this example, the Si substrate 16 is used, but a diamond substrate or an AlN substrate having good thermal conductivity may be used.
[0015]
Next, after the GaAs substrate 15 is polished to a thickness of 10 μm by a plane polishing method, only the GaAs substrate 15 is selectively etched and removed using a sulfuric acid-based etchant, and the undoped Al _0.25 Ga _0.75 N layer of the layer 14 is removed. Is exposed (FIG. 2 (f)).
[0016]
After that, a Ti / Al layer is formed to a thickness of 150 / 2000Å on the Al _0.25 Ga _0.75 N layer 14 by a lift-off method, and then RTA is performed at 600 ° C. for 30 seconds to form source and drain electrodes (FIG. 2 (g)).
[0017]
Next, after patterning the active region of the element with a photoresist, the element is separated by an ICP dry etching method using a Cl ₂ -based gas (FIG. 2 (h)).
[0018]
Thereafter, Ni / Au is formed in a thickness of 200/2000 by a lift-off method and is brought into Schottky contact with the undoped Al _0.25 Ga _0.75 N layer of the layer 14 to form the gate electrode 18 (FIG. 2 (i)). .
[0019]
Finally, dicing is performed to complete a GaN-based semiconductor device (HFET in this example) (FIG. 2 (j)).
[0020]
As described above, in the first embodiment, the sapphire substrate 11 is made thinner, and the Si substrate 16, the diamond substrate, the AlN substrate, or the like (second semiconductor substrate) having good thermal conductivity is bonded to the back surface thereof. The conductivity can be improved, and high current density and high output can be realized. The GaAs substrate 15 and the InP substrate (first semiconductor substrate) function as support substrates for bonding a Si substrate, a diamond substrate, and an AlN substrate (second semiconductor substrate) after the sapphire substrate 11 is thinned. . The GaAs substrate and the InP substrate (first semiconductor substrate) are selectively and easily etched away from a GaN-based semiconductor material, a sapphire substrate, a Si substrate, a diamond substrate, an AlN substrate, and the like. Further, a sapphire substrate used as a substrate for epitaxial growth of a GaN-based semiconductor layer can easily be increased in diameter, so that a low price can be realized by mass production effects.
[0021]
[Embodiment 2]
FIG. 3 is a cross-sectional view of a GaN-based semiconductor device according to the second embodiment, and FIG. 4 is an explanatory diagram of a method for manufacturing the semiconductor device. First, a low-temperature (LT) GaN buffer layer 22 is deposited on a sapphire substrate (0001) 21 having a thickness of 330 μm by, for example, MOCVD or the like, and then an undoped GaN layer 23 is deposited to a thickness of 2.5 μm. A semiconductor in which a layer 24 (25 nm in total) in which Al _0.25 Ga _0.75 N (15 nm in thickness) of 10 ¹⁸ cm ⁻³ is sandwiched between undoped Al _0.25 Ga _0.75 N (5 nm in thickness) is deposited. A substrate is prepared (FIG. 4A). Here, the surface roughness needs to be 1 nm or less.
[0022]
Next, the semiconductor surface of the layer 24 is irradiated with an Ar ion beam in a high vacuum to remove a natural oxide film formed on the surface and activate the surface (FIG. 4B), and a similar method is used. A 350 μm thick GaAs substrate (001) 25 having a surface activated is heated to room temperature or 400 ° C. or lower to directly join (FIG. 4C). As in the previous example, the GaAs substrate 25 is used here, but an InP substrate may be used.
[0023]
Next, a sapphire substrate 21 is peeled off by irradiating a sapphire substrate 21 with a YAG laser having a beam diameter of 7 mm and a wavelength of 355 nm (Jpn J. Appl. Phys. Vol. 38 L217 1999) (FIG. 2D).
[0024]
Next, the surface of the peeled GaN layer 23 is activated by hydrogen plasma treatment in a high vacuum, and the Si substrate 26 whose surface is similarly activated is heated to room temperature or 400 ° C. or lower to be joined (FIG. 2 (e)). As in the previous example, the Si substrate 26 was used here, but a diamond substrate or an AlN substrate having good thermal conductivity may be used.
[0025]
Next, after the GaAs substrate 25 is polished to 10 μm by a plane polishing method, only GaAs is selectively etched and removed using a sulfuric acid-based etchant to expose the undoped Al _0.25 Ga _0.75 N layer of the layer 24. (FIG. 4 (f)).
[0026]
After that, a semiconductor element (HFET) is completed by the same manufacturing method as in Embodiment 1 (FIGS. 4G to 4J).
[0027]
As described above, in the second embodiment, the sapphire substrate 21 is removed, and instead, a Si substrate 26 having a good thermal conductivity, a diamond substrate, an AlN substrate, or the like (a second semiconductor substrate) is bonded. The conductivity can be improved, and high current density and high output can be realized. The GaAs substrate 25 and the InP substrate (first semiconductor substrate) function as support substrates when bonding the Si substrate, the diamond substrate, and the AlN substrate (second semiconductor substrate) after the sapphire substrate 21 is removed by etching. The GaAs substrate and the InP substrate (first semiconductor substrate) are selectively and easily etched away from a GaN-based semiconductor material, a sapphire substrate, a Si substrate, a diamond substrate, an AlN substrate, and the like. Further, a sapphire substrate used as a substrate for epitaxial growth of a GaN-based semiconductor layer can easily be made large in diameter, and thus can be manufactured at a low price by mass production.
[0028]
【The invention's effect】
As described above, in the GaN-based semiconductor device of the present invention, a sapphire substrate is thinned, and a second semiconductor substrate such as a Si substrate, a diamond substrate, or an AlN substrate having good thermal conductivity is bonded thereto, or Since the sapphire substrate is removed and a similar second semiconductor substrate is bonded in place of the sapphire substrate, the thermal conductivity of the entire substrate can be improved, and the thermal resistance can be significantly reduced as compared with the conventional case. Current density and high output can be realized. Further, it is possible to provide a method of manufacturing a semiconductor device which can be manufactured at a low cost by mass production effect by increasing the diameter of a sapphire substrate.
[Brief description of the drawings]
FIG. 1 is a sectional view of a GaN-based semiconductor device according to a first embodiment.
FIG. 2 is a diagram illustrating a method for manufacturing the semiconductor device of FIG.
FIG. 3 is a cross-sectional view of a GaN-based semiconductor device according to a second embodiment.
FIG. 4 is a diagram illustrating a method for manufacturing the semiconductor device of FIG.
FIG. 5 is a cross-sectional view of a conventional GaN-based semiconductor device.
[Explanation of symbols]
11: sapphire substrate, 12: low temperature GaN layer, 13: undoped GaN layer, 14: Al _0.25 Ga _0.75 N layer, 15: GaAs substrate, 16: Si substrate, 17: source, drain electrode, 18: gate Electrode 21: sapphire substrate, 22: low temperature GaN layer, 23: undoped GaN layer, 24: Al _0.25 Ga _0.75 N layer, 25: GaAs substrate, 26: Si substrate, 27: source, drain electrode, 28: Gate electrode 31: Sapphire substrate, 32: Low-temperature GaN layer, 33: Undoped GaN layer, 34: Al _0.25 Ga _0.75 N layer, 35: Source and drain electrodes, 36: Gate electrode

Claims (4)

(1) forming a plurality of semiconductor layers including at least a GaN layer on a sapphire substrate, and bonding a first semiconductor substrate on the plurality of semiconductor layers;
(2) a step of thinning the sapphire substrate by a planar polishing method;
(3) bonding a second semiconductor substrate on the sapphire substrate which has been planarly polished;
(4) a step of selectively removing the first semiconductor substrate by chemical etching after thinning the first semiconductor substrate by a planar polishing method;
(5) forming a semiconductor element on the plurality of semiconductor layers;
A method for manufacturing a semiconductor device, comprising: (1) forming a plurality of semiconductor layers including at least a GaN layer on a sapphire substrate, and bonding a first semiconductor substrate on the plurality of semiconductor layers;
(2) exposing the sapphire substrate from the plurality of semiconductor layers by irradiating a laser beam from the sapphire substrate side;
(3) bonding a second semiconductor substrate to the plurality of semiconductor layers exposed to the atmosphere by peeling the sapphire substrate;
(4) a step of selectively removing the first semiconductor substrate by chemical etching after thinning the first semiconductor substrate by a planar polishing method;
(5) forming a semiconductor element on the plurality of semiconductor layers;
A method for manufacturing a semiconductor device, comprising: 3. The method according to claim 1, wherein the first semiconductor substrate is a GaAs or InP substrate, and the second semiconductor substrate is a Si, diamond, or AlN substrate. 4. In the first and third steps, the first or second semiconductor substrate and the semiconductor layer or the surface of the sapphire substrate are activated by ion bombardment in a high vacuum, and are activated at room temperature or in a heated state. 3. The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor bonding is performed by bringing a suitable surface into contact with a counterpart.

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