JP2007267560A - Invertor equipped with through-current controller - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an invertor, wherein serge voltage and high-frequency vibration of voltage are controlled at reverse recovery time of a diode, through-current is reduced when a voltage control-type power semiconductor element is conducted at voltage change dV/dt, and loss is also reduced. <P>SOLUTION: In the invertor, the voltage controlled-type power semiconductor elements and the diodes parallel to the elements are arranged in upper/lower arms. A drive circuit, having a switch means, controls on/off of the voltage controlled-type power semiconductor elements. A plurality of second diodes whose total forward voltage is almost equal to setting voltage, are connected in series to the switch means which turns off the voltage controlled-type power semiconductor element by the drive circuit, by making a value lower than control threshold voltage required for output of main current by the voltage control-type power semiconductor element, as the setting voltage. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an inverter, and more particularly to a through current control device that suppresses excessive voltage oscillation caused by a reverse recovery current that flows through a diode when switching conduction between upper and lower arms.

  Inverter devices are generally equipped with voltage-controlled power semiconductor elements in the upper and lower arms, and are configured to control conduction and interruption of output current. The upper and lower voltage-controlled power semiconductor elements are supplied with a reverse current during reflux. Diodes are connected in parallel. Here, in the voltage controlled power semiconductor element and the circulating diode, a transient surge voltage is generated when the current is shifted from the conduction state to the cutoff state. As a method of suppressing such a surge voltage in a voltage-controlled power semiconductor element, a method of appropriately selecting a resistance value provided in a drive circuit and suppressing a change in the control voltage when current is interrupted is used. On the other hand, when the diode shifts from a state in which current is conducted to a cutoff state, a current flowing in the diode in the reverse direction (referred to as reverse recovery current) is generated, and this current flows through the upper and lower arms. When the reverse recovery current changes excessively, a surge voltage is generated by multiplying the current change di / dt by the inductance of the bus bar, harness, etc. through which the current flows, and high-frequency voltage oscillation (ringing) over a period of several μs. ) Occurs. However, since the diode is not a controllable device, it is difficult to reduce the reverse recovery current itself by a drive circuit like a voltage-controlled power semiconductor element.

  Examples of a method for suppressing an excessive surge voltage caused by the reverse recovery current of such a diode are described in Patent Document 1, Patent Document 2, Patent Document 3, and the like. In these prior arts, a power control element such as a power MOS or IGBT is used as the power semiconductor element for the upper and lower arms of the inverter. In the case of the power MOS, a parasitic diode built in the device, an IGBT is used. Uses a diode connected in parallel for the return current.

  The driving method described in Patent Document 1 is a voltage control type in which a change in voltage (dV / dt) generated when a diode reversely recovers and a displacement current generated by a feedback capacitance of a voltage control type power semiconductor element are parallel to the diode. The control voltage is increased by flowing into the control terminal of the power semiconductor element, and this value is made slightly higher than the threshold voltage of the voltage-controlled power semiconductor element to make the power semiconductor element conductive. As a result, the power semiconductor element has a lower impedance than the normal off state, and suppresses surge voltage and high-frequency voltage oscillation. The driving devices described in Patent Document 2 and Patent Document 3 also use the same principle, and the control voltage of the voltage-driven power semiconductor element is set to a threshold voltage or a voltage smaller than that before the diode reversely recovers. The power semiconductor element is easily turned on by the displacement current generated by dV / dt and the feedback capacitance of the power semiconductor element.

JP-A-2001-217697 (Description of FIG. 1, FIG. 2, paragraph (0011), paragraph (0018), paragraph (0019)) JP-A-2005-328688 (description of FIG. 1, paragraph (0044), paragraph (0045)) Japanese Patent Laying-Open No. 2005-33873 (Description of paragraphs (FIG. 1, FIG. 2, paragraphs (0010) to (0024))

  In recent years, power MOS and IGBTs have a tendency to reduce on-resistance due to miniaturization, and when the control voltage exceeds a threshold voltage, a large current flows for a slight voltage change. In the above-described prior art, the surge voltage is suppressed by conducting a voltage-controlled power semiconductor element parallel to the diode with a voltage change dV / dt generated at the time of reverse recovery of the diode, but the power semiconductor element is detected at dV / dt. There arises a new problem that the loss increases due to the through current when conducting. The conventional example does not disclose measures for achieving both suppression of surge voltage and reduction of loss due to through current. This through current is repeated at the frequency of PWM (pulse width modulation) control of the inverter and is generated in each of three phases. Therefore, if the through current is excessive, there is a possibility that it becomes several tens% or more of the total loss.

  When the configuration of the above prior art is evaluated by experiment, the voltage change dV / dt at the time of reverse recovery is a very short phenomenon of several tens ns, whereas when the voltage controlled power semiconductor element is made conductive at dV / dt. It was found that the voltage change was relaxed, and as a result, the period during which the through current flowed was expanded about ten times. Increasing the through-current time greatly increases the loss, and its suppression is a problem.

  In addition, the driving devices described in Patent Document 2 and Patent Document 3 maintain the control voltage of the voltage-driven power semiconductor element at a threshold voltage or lower before the diode reversely recovers. When the control voltage to be maintained is referred to as a first voltage, the first voltage and the threshold value of the control voltage have temperature dependence. For example, the threshold value of the power MOS or IGBT has a negative temperature coefficient with respect to temperature, and the threshold value of several V decreases at a temperature exceeding 100 ° C. compared to room temperature (25 ° C.). Assuming that the difference between the first voltage and the threshold value increases with increasing temperature, the previous through current further increases according to this voltage difference.

  The object of the present invention is to suppress surge voltage and high-frequency oscillation of the voltage during reverse recovery of the diode, reduce the through current when conducting the voltage-controlled power semiconductor element with the voltage change dV / dt, and reduce the loss. It is to be compatible.

  In order to achieve the above object, according to the present invention, a voltage control type power semiconductor element and a diode parallel to the voltage control type power semiconductor element are respectively provided on the upper and lower arms of an inverter, and the voltage control type power semiconductor element is turned on by a drive circuit having a switch means. The inverter that controls the off is set to a value that is at least 1 V lower than the control threshold voltage required for the voltage-controlled power semiconductor element to output a current of several A or more, and the total forward voltage is A plurality of second diodes substantially equal to the set voltage are provided in series with the switch means for turning off the voltage-controlled power semiconductor element in the drive circuit.

  With this configuration, when the control voltage of the voltage-controlled power semiconductor element remains at a set voltage value equal to the total forward voltage of the second diode, the power semiconductor element is easily turned on, and the diode is reversely recovered. When the voltage control type power semiconductor element is made to conduct by the voltage change dV / dt of the current, and the voltage change dV / dt is relaxed by this conduction and the energization period of the through current is expanded, the voltage change between the control voltage and the set voltage The second diode reduces the impedance and suppresses the increase of the control voltage, and reduces the control voltage quickly and suppresses the through current. In addition, when the threshold value of the voltage-controlled power semiconductor element decreases due to a temperature rise, the forward voltage sum of the second diode also decreases according to the temperature, thereby reducing an increase in through current according to the temperature. it can.

  According to another aspect of the present invention, there is provided a through current control device for an inverter, comprising a second switch means in parallel with the plurality of second diodes, for detecting a voltage between the input and output terminals of the voltage controlled power semiconductor element. A voltage detection unit is provided, and the second switch unit is turned on according to the output of the voltage detection unit.

  According to this configuration, the voltage-controlled power semiconductor is in a period during which the main current flows through the voltage-controlled power semiconductor element parallel to the diode (when the output current is positive for the upper arm and negative for the lower arm). Since the voltage between the input and output terminals of the element is detected and the second switch means parallel to the plurality of second diodes is made conductive, the voltage sum of the plurality of second diodes becomes almost zero, and the voltage controlled power semiconductor element Does not conduct at a voltage change dV / dt. That is, in this configuration, conduction of the voltage-controlled power semiconductor element by dV / dt can be selectively performed.

  A through current control device for an inverter according to the present invention includes a voltage control type power semiconductor element and a diode parallel to the voltage control type power semiconductor element in the upper and lower arms of the inverter, respectively, and a drive circuit including a resistor and a switch means. A first voltage detection that controls on and off, and detects a first voltage that is at least 1 V lower than a control threshold voltage required for the voltage-controlled power semiconductor element to output a main current of several A or more. And a second voltage detecting means for detecting that the voltage between the input and output terminals of the voltage controlled power semiconductor element is higher than a preset second voltage, and the voltage controlled power semiconductor element is turned off. Sometimes, the switch means of the drive circuit is driven in the order of conduction, interruption, and conduction resumption in accordance with the detection results of the first voltage detection means and the second voltage detection means.

  With this configuration, when the control voltage of the voltage-controlled power semiconductor element becomes equal to or lower than the first voltage value, the switch means of the drive circuit is cut off so that the control voltage becomes substantially equal to the first voltage value. Next, when the voltage controlled power semiconductor element conducts with the voltage change dV / dt when the diode reversely recovers, the voltage change dV / dt is detected from the voltage between the input and output terminals of the voltage controlled power semiconductor element, The conduction of the switch means of the drive circuit is resumed. The control voltage decreases rapidly by the conduction of the switch means, and the through current is suppressed.

  A through current control device for an inverter according to the present invention includes a voltage control type power semiconductor element and a diode parallel to the voltage control type power semiconductor element in the upper and lower arms of the inverter, respectively, and a drive circuit including a resistor and a switch means. A first voltage detection that controls on and off, and detects a first voltage that is at least 1 V lower than a control threshold voltage required for the voltage-controlled power semiconductor element to output a main current of several A or more. And a current detection means for detecting that a second current proportional to the output current of the voltage controlled power semiconductor element is lower than a preset reference current value, and when the voltage controlled power semiconductor element is off, According to the detection results of the first voltage detection means and the current detection means, the switch means of the drive circuit is driven in the order of conduction, interruption, and conduction resumption.

  With this configuration, when the control voltage of the voltage-controlled power semiconductor element becomes equal to or lower than the first voltage value, the switch means of the drive circuit is cut off so that the control voltage becomes substantially equal to the first voltage value. Next, when the voltage-controlled power semiconductor element is turned on by the voltage change dV / dt when the diode reversely recovers, the through current is detected by the current detecting means, and the switch means of the drive circuit is resumed. The control voltage decreases rapidly by the conduction of the switch means, and the through current is suppressed.

  According to the present invention, when the diode reversely recovers, the IGBT parallel to the diode is turned on with the voltage change dV / dt to avoid surge voltage and high-frequency voltage oscillation, and at the same time, the through current flowing through the IGBT is reduced and lost. Can be suppressed.

  Hereinafter, details of the present invention will be described with reference to the drawings.

  The inverter through current control apparatus according to this embodiment will be described with reference to FIG. FIG. 1 is a circuit diagram showing the overall configuration of an inverter according to this embodiment. FIG. 1 shows a configuration of a power conversion device including a power semiconductor element provided with a through current control device of the present invention. The main circuit is configured as a three-phase inverter by connecting six power semiconductor elements composed of an IGBT (for example, Q1) and a reflux diode (for example, D1) between a positive electrode and a negative electrode of a power supply VB to a three-phase bridge. The output terminals of each phase are U, V, and W, and are connected to the load motor M. The IGBTs Q1 to Q6 are each provided with a driving device 1. As an internal configuration of the driving device 1, a gate charging unit is provided in which a P-channel MOSFET S3 and a resistor R3 are connected in series between the positive terminal of the control power supply Vcc and the gate terminal of Q1.

  The through current control device of this embodiment is provided in the gate discharge means of the driving device 1. That is, a diode DG connected in series with an N-channel MOSFET S1 and a resistor R1 is provided between the negative terminal of Vcc and the gate terminal of Q1, and the number of diodes DG required to produce a desired bias voltage as described later. Connecting. An N-channel MOSFET S2 and a resistor R2 are provided between the negative electrode of Vcc and the gate terminal of Q1. S1 and S3 are complementary switches in which one is turned on and the other is turned off according to the drive signal Sg. S2 is driven by the AND circuit 3, and the input of the AND circuit 3 is the drive signal Sg and the output of the voltage detection means transmitted via the delay means 2, and is driven according to these signals.

  Here, the voltage detecting means connects the resistor R4 and the diode DG in series between the positive terminal of the control power supply Vcc and the collector terminal of Q1, and takes out the output from the connection point of the resistor R4 and the diode DG. When Q1 is in the conductive (on) state and the main current flows through Q1, the on-voltage becomes several volts, and the output of the voltage detection means with reference to the negative terminal of Vcc is the forward voltage of the diode DG. It becomes the value which added. This voltage is lower than the logic threshold value (about 1/2 of Vcc) of the AND circuit 3, and the logic level is Low. On the other hand, when Q1 is in the cutoff (off) state, the cathode voltage of the diode DG becomes higher than the voltage of Vcc, and a reverse bias is applied to the diode DG. As a result, the output of the voltage detecting means is substantially equal to Vcc, and the logical level of the AND circuit 3 becomes High. When the diode D1 connected in antiparallel with Q1 is turned on, the cathode voltage of the diode DG becomes a negative value of about −1 to 2 V with respect to the negative electrode of Vcc. In this case, the output of the voltage detection means is Low. . Thus, the function of the voltage detection means is to determine the conduction of the IGBT Q1 or the diode D1, and is not limited to the configuration of the embodiment of FIG. 1, but may be a comparator or other configuration.

  Next, the operation of the embodiment of FIG. 1 will be described. In the present embodiment, since the surge voltage or voltage oscillation when the freewheeling diode reversely recovers is suppressed, the state where the diode D1 is conducting will be described as an example. In general, in PWM (pulse width modulation) control for driving a motor, a control signal is applied to a switching element (Q1 in FIG. 1) in parallel with the diode when the freewheeling diode is conductive. Consider a condition where the diode D1 is conductive in the initial state and the control voltage of Q1 is substantially equal to the value of Vcc. Here, when the operation of removing the control voltage of Q1 is started by the drive signal Sg, the output of the voltage detection signal is Low because the diode D1 is kept conductive, the output of the AND circuit 3 is also Low, and S2 is OFF. It remains. On the other hand, S1 is turned on by Sg, and the control voltage (hereinafter referred to as gate voltage) is removed. When the gate voltage of Q1 becomes equal to the total forward voltage of the diode DG, the DG can no longer pass current, and the decrease of the gate voltage stops. At this time, a voltage substantially equal to the total forward voltage of the diode DG remains in the gate voltage, and this residual voltage is referred to as Vbias.

  Next, when a conduction drive signal is given to the upper arm IGBT Q2 by PWM control and Q2 is turned on and the main current flows, the U-phase output current changes the path from the diode D1 to the Q2, so the current of the diode D1 is When it decreases and becomes almost zero, D1 changes to a cut-off state. The time when D1 switches from the conductive state to the cut-off state is the reverse recovery state, and the impedance of the diode D1 increases rapidly, and a high voltage is applied with a polarity that makes the collector terminal of Q1 positive. Due to the voltage change (dV / dt) at this time, a displacement current is generated in the parasitic capacitance between the collector of the IGBT Q1 and the gate terminal, and the gate voltage of Q1 is added to the residual voltage Vbias by the charge due to the displacement current, resulting in a total value. When the threshold voltage is exceeded, Q1 becomes conductive. At this timing, the output of the voltage detection means changes from Low to High, but the output of the AND circuit 3 is maintained Low and S2 is kept in the cut-off state due to the effect of the delay means 2.

  When a displacement current is generated in the parasitic capacitance between the collector and the gate terminal of the IGBT Q1, and the circuit operation when the Q1 becomes conductive is expressed by an equation (1).

  In the equation (1), the current ig is a displacement current, and this displacement current can be expressed by the equations (2) and (3). In these equations, Cg is the capacitance between the gate and emitter of Q1, Cr is the parasitic capacitance between the collector and gate, and Rg is the combined value of the resistors provided between the gate and emitter of Q1, and in the embodiment of FIG. In a state where S2 is not conducting, Rg is the sum of the resistance R1 and the internal resistance of the diode DG. Further, the inductance Ls represents an inductance value of a wiring or the like existing between the gate and the emitter of Q1. In the equation (2), dV / dt is a voltage change when the diode D1 is reversely recovered. When the gate voltage represented by Vg exceeds the threshold value of Q1, Q1 is turned on and a current flows. The current is expressed by the following equation (4). In equation (4), gm is an IGBT gate amplification factor (dIce / dVg). When the equations (1) and (4) are solved simultaneously, the solution is as shown in the equation (5). Here, Vgo is an initial value of the gate voltage and is equal to the residual voltage Vbias.

The following can be understood from the expression (5).
1) In the first term, Vgo (= Vbias) attenuates with an exponential function, and the smaller the resistance Rg, the faster the attenuation.
2) In the second term, the exponential function in parentheses increases with time, but when the voltage change (dV / dt) disappears, the second term becomes zero. Further, the second term becomes smaller as the resistance Rg is smaller.
3) The initial value Vbias is set so that the gate voltage in the equation (5) is slightly higher than the threshold value of Q1. The appropriate value of Vbias becomes smaller as the second term of equation (5) is larger. When Vbias is equal to or higher than an appropriate value, the through current of the equation (4) becomes excessive due to an increase in the gate voltage.
4) When the control voltage Vg exceeds the threshold value and a through current flows, it is desirable to reduce the resistance Rg to suppress an increase in the gate voltage and reduce the through current.

  The configuration of FIG. 1 is an embodiment based on the above-mentioned 3) and 4). For the residual voltage Vbias, an appropriate value is obtained in advance from Equation (5), and the number of DGs is set so that the forward voltage sum of the diode DG is substantially equal to the Vbias appropriate value. Here, the temperature dependency of the diode built-in voltage (minimum junction voltage required to pass current) is similar to the temperature dependency regarding the threshold value of Q1, and both of them even when the temperature changes. This error can be suppressed.

  The method of reducing the resistance Rg immediately after the through current flows is realized by a first circuit including DG and S1 and a second circuit including S2 that is turned on in accordance with the voltage detection means. First, when the gate voltage exceeds Vbias equal to the total forward voltage of DG, a current flows in the first circuit according to the difference, and the gate voltage increases by dV / dt expressed by the second term of the equation (5). Suppress. Next, when the output of the voltage detection means turns on S2 after a time delay, the control voltage of Q1 is decreased and the increase of the through current is suppressed in a state of lower impedance than the first circuit.

  FIG. 2 shows operation waveforms of this embodiment. FIG. 2A is a waveform at the time of normal diode reverse recovery, and FIG. 2B is an operation waveform showing surge voltage suppression at the time of reverse recovery according to this embodiment. In FIG. 2 (a), the voltage Vce of the IGBT Q1 oscillates at a high frequency during reverse recovery. However, in FIG. 2 (b), there is no such voltage oscillation, and the voltage increases rapidly once during reverse recovery. It can be seen that the relaxation is caused by the conduction of Q1. In FIG. 2B, the gate voltage Vge of Q1 is maintained at the value of Vbias before reverse recovery, and increases at dV / dt at the time of reverse recovery. After the reverse recovery, the function of reducing the gate voltage Vge by the resistance is working as described above, but the control voltage Vge is still increasing due to the influence of dV / dt. If suppression of the gate voltage by the resistor does not work, Vge becomes higher than the value in FIG. 2B, and the current also increases.

  FIG. 3 shows an embodiment of a power conversion device including a power semiconductor element provided with the through current control device of the present invention. The configuration of the three-phase inverter is the same as that of the embodiment of FIG. Moreover, the drive device 4 provided with through current control is provided in each of the IGBTs Q1 to Q6.

  As the internal configuration of the driving device 4, the gate charging means including the P-channel MOSFET S3 and the resistor R3 is the same as that in FIG. 1, and S3 is a switch that is controlled to be turned on and off in accordance with the driving signal Sg. The gate discharge means includes an N-channel MOSFET S1 and a resistor R1 between the negative terminal of Vcc and the gate terminal of Q1. The comparator 7 compares the gate voltage of the IGBT Q1 with the voltage value of the reference voltage 8, and outputs a High signal when the gate voltage is high. Further, the voltage detecting means comprising the diode DC and the resistor R4 has the same configuration as that shown in FIG. The output of the comparator 7 and the output of the voltage detection means are input to the OR circuit 5, and if either input is High, the OR circuit 5 outputs a High signal. The output of the OR circuit 5 is transmitted to the NAND circuit 6 through the delay means 2, and the NAND circuit 6 turns on or off the N-channel MOSFET S1 from the output of the delay means 2 and the drive signal Sg. Here, when the IGBT Q1 is turned off, if the drive signal Sg is High and the gate voltage of the comparator 7 is equal to or higher than the reference voltage 8, S1 is turned on as a result of the OR circuit 5 and the NAND circuit 6. Similarly, when the drive signal Sg is High and the output of the voltage detection circuit is High, S1 is turned on. Next, the operation of the embodiment of FIG. 3 will be described in detail using the operation waveforms of the respective parts of FIG.

  The operation waveforms of FIG. 4 are as follows. From the top, the gate voltage Vge (Q1) and collector voltage Vce (Q1) of the IGBT Q1, the ON / OFF state of the N-channel MOSFET S1, the current I (Q1) of the IGBT Q1 and the current I (Q1) of the diode D1. D1), current I (Q2) of upper arm IGBT Q2, gate voltage Vge (Q2) and collector voltage Vce (Q2) of upper arm IGBT Q2.

In FIG. 4, it is assumed that the diode D1 is circulating the load current in the forward direction at time T ₀ . At this time, in the PWM control, a command for applying a gate voltage to the IGBT Q1 is issued even when the diode D1 is conductive, and Vge (Q1) is substantially equal to Vcc. Next, when a command to remove the gate voltage of Q1 is issued by the drive signal Sg, the comparator 7 in FIG. 3 detects that Vge (Q1) is substantially equal to Vcc, outputs a High signal, and outputs the OR described above. As a result of the circuit 5 and the NAND circuit 6, S1 is turned on, and Vge (Q1) decreases. Even when Vge (Q1) is equal to or lower than the threshold value (Vth), the state in which the diode D1 is circulating the load current does not change, so the collector voltage Vce (Q1) is as low as about −1 to 2 V. The reference voltage Vge (Q1) is set below the threshold at time T ₁ becomes below (Vbias, equal to the reference voltage 8 in FIG. 3), the output comparator 7 detects this turns Low The S1 changes to the OFF state depending on the results of the OR circuit 5 and the NAND circuit 6.

As a result, a voltage equal to the reference voltage (Vbias) remains in Vge (Q1). Next, after the dead time period, a gate voltage is applied to the upper arm IGBT Q2 by the drive signal, and Vge (Q2) increases. When the threshold voltage (Vth) is exceeded, the device is turned on. The current I (Q2) flows through Q2, and the load current that has circulated through the diode D1 is commutated to Q2. Commutation occurs at time T _2, the diode D1 the collector voltage Vce of reverse recovery and IGBT Q1 (Q1) is rapidly increased. The voltage change (dV / dt) of Vce (Q1) charges the collector of IGBT Q1 and the feedback capacitance between the gates, charging current flows into the gate of Q1, Vge (Q1) increases beyond the threshold value, and IGBT Q1 Turn on. At this time, the current I (Q1) of the IGBT Q1 has a waveform as shown by a broken line in FIG. 4, and since this current flows through the upper and lower IGBTs, it is also superimposed on the waveform of the current I (Q2) of the IGBT Q2. .

In time T _2, the results Vge (Q1) exceeds a threshold value, changes to High, and outputs the detection comparator 7 of Figure 3 is the same, S1 the result of the OR circuit 5 and the NAND circuit 6 is changed to the ON state . At this time, the displacement current of the feedback capacitance due to the voltage change (dV / dt) flows into the gate of the IGBT Q1, while the discharge current of the gate due to the ON of S1 flows out. Usually, since the displacement current is larger, Vge (Q1) cannot be decreased immediately after S1 is turned on, but the increase in the gate voltage Vge (Q1) is suppressed and excessive as compared with the case where S1 remains off. Prevent through current from flowing.

When the IGBT Q1 is turned on by the voltage change (dV / dt), voltage sharing occurs between the upper and lower IGBTs, and the voltage increase of Vce (Q1) is alleviated. The voltage detection means in FIG. 3 operates slightly delayed from the time T ₂ by the delay means, the output of the voltage detection means changes to High, and a logical condition for turning on S1 is created based on the results of the OR circuit 5 and the NAND circuit 6. Since Vce (Q1) eventually reaches the power supply voltage and the voltage change (dV / dt) disappears, Vge (Q1) decreases exponentially by S1 thereafter. Even if Vge (Q1) becomes equal to or lower than the reference voltage (Vbias), the ON state of S1 is maintained by the action of the voltage detection means.

  The above is the operation in the case where the diode D1 is circulating the load current in the forward direction. If the IGBT Q1 is a condition for flowing the load current, the collector voltage Vce (Q1) is reached before Vge (Q1) reaches the threshold value. ) Increases, and this is detected by the voltage detection means, so that the ON state of S1 is maintained as indicated by the solid line in S1 of FIG. That is, the present invention is characterized in that the switching means S1 for turning off the gate circuit is switched on, off, and on under the condition that the diode reversely recovers, and this operation increases the gate voltage of the IGBT in parallel with the diode. Can be suppressed, and the surge voltage at the time of reverse recovery can be reduced, and at the same time, the through current can be suppressed.

  FIG. 5 shows an embodiment of a power conversion device including a power semiconductor element provided with the through current control device of the present invention. The overall configuration of the three-phase inverter is the same as that of the embodiment of FIGS. In the present embodiment, a description will be given of the driving device 9 provided with through current control provided in each of the IGBTs Q1 to Q6.

  As an internal configuration of the driving device 9, a gate charging unit including a P-channel MOSFET S3 and a resistor R3, and a gate discharging unit including an N-channel MOSFET S1 and a resistor R1 are arranged between the negative terminal of Vcc and the gate terminal of Q1. Is the same as FIG. 1 and FIG. 3, and S3 is a switch that is controlled to be turned on and off in accordance with the drive signal Sg. The present embodiment includes a gate voltage detecting means and a means for detecting a current proportional to the main current of the IGBT Q1, and the on / off state of S3 is switched from these detection results as in FIG.

  The comparator 7-1 compares the gate voltage of the IGBT Q1 with a reference voltage Vbias obtained by serializing a plurality of diodes, and outputs a High signal when the gate voltage is high. Here, Vbias is a voltage that remains in the gate of the IGBT Q1, as in the embodiment of FIG. Further, a reference voltage is created by summing forward voltages of a plurality of diodes. A current value passed through the diode by the resistor R6 is set so that the temperature dependence of the reference voltage Vbias is equivalent to the temperature dependence regarding the threshold value of the IGBT Q1. adjust.

  In this embodiment, the means for detecting the current proportional to the main current of the IGBT Q1 is a current sensing type in which Q1 has two emitter terminals as shown in FIG. 5 and supplies a current proportional to the area of each emitter electrode. Use the device. The current sense terminal includes a resistor Rs and a noise absorbing capacitor Cf. This signal is input to the comparator 7-2 and compared with the reference voltage Vref. This current detection means detects that the current flowing through the IGBT Q1 is less than or equal to a predetermined current value (a negative value when returning to the diode D1 and becomes a predetermined value or less), and the comparator 7-2 outputs a High signal. .

  The outputs of the comparators 7-1 and 7-2 are input to the OR circuit 5, and if either input is High, the OR circuit 5 outputs a High signal. The output of the OR circuit 5 is transmitted to the NAND circuit 6 through the delay means 2, and the NAND circuit 6 conducts or cuts off the N-channel MOSFET S1 from the output of the delay means and the drive signal Sg.

In the operation of the embodiment of FIG. 5, the comparator 7-2 outputs Low when the current I (D1) of the diode D1 shown in FIG. The process up to T ₂ is the same as that of the embodiment shown in FIG. Then, D1 is reverse recovery at time T _2, is turned on Q1 is in dV / dt at the time, the current flowing through the Q1 detected by the comparator 7-2 outputs changes to High from Low. The subsequent operation is the same as that of the embodiment of FIG. 3, and S1 is performed under either of the following conditions: the gate voltage is equal to or higher than the reference voltage Vbias, or the High is detected by the detection of the current detection comparator 7-2. Is turned on, suppresses an increase in gate voltage due to dV / dt, and works to reduce the through current.

It is a circuit diagram which shows the whole structure of the inverter of Example 1, and a drive device. 4 is an operation waveform of the inverter according to the first embodiment. It is a circuit diagram which shows the whole structure of the inverter of Example 2, and a drive device. It is an operation | movement waveform of the inverter of Example 2. FIG. 6 is a circuit diagram illustrating an inverter drive device according to a third embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1, 4, 9 ... Drive device, 2 ... Delay means, 3 ... AND circuit, 5 ... OR circuit, 6 ... NAND circuit, 7 ... Comparator, 8 ... Reference voltage.

Claims (4)

In an inverter comprising a voltage-controlled power semiconductor element arranged in upper and lower arms, a diode connected in antiparallel to the power semiconductor element, and a drive circuit for the voltage-controlled power semiconductor element,
The drive circuit is
A plurality of second diodes having a sum of forward voltages substantially equal to the set voltage, wherein the voltage-controlled power semiconductor element has a set voltage that is at least lower than a control threshold voltage required for outputting the main current, An inverter provided in series with switch means for turning off the voltage-controlled power semiconductor element. In the through current control device for an inverter according to claim 1,
A second switch means arranged in parallel with the plurality of second diodes is provided, and voltage detection means for detecting a voltage between the input and output terminals of the voltage controlled power semiconductor element is provided, and an output of the voltage detection means is provided. In response, the second switch means is turned on. In an inverter comprising a voltage-controlled power semiconductor element in which upper and lower arms are arranged, a diode connected in antiparallel to the power semiconductor element, and a drive circuit for the voltage-controlled power semiconductor element,
The drive circuit is
First voltage detecting means for detecting a first voltage at least lower than a control threshold voltage required for the voltage-controlled power semiconductor element to output a main current;
A second voltage detecting means for detecting that the voltage between the input and output terminals of the voltage controlled power semiconductor element is higher than a preset second voltage;
When the voltage-controlled power semiconductor element is turned off, the switch means of the drive circuit is driven in the order of conduction, interruption, and conduction resumption in accordance with the detection results of the first voltage detection means and the second voltage detection means. An inverter characterized by that. In an inverter comprising a voltage-controlled power semiconductor element in which upper and lower arms are arranged, a diode connected in antiparallel to the power semiconductor element, and a drive circuit for the voltage-controlled power semiconductor element,
The drive circuit is
First voltage detecting means for detecting a first voltage at least lower than a control threshold voltage required for the voltage-controlled power semiconductor element to output a main current;
Current detecting means for detecting that a second current proportional to the output current of the voltage-controlled power semiconductor element is lower than a preset reference current value;
When the voltage-controlled power semiconductor element is turned off, the switch means of the drive circuit is driven in the order of conduction, cutoff, and conduction resumption in accordance with the detection results of the first voltage detection means and the current detection means. And inverter.

Images