JP2007081313A - Nitride-based semiconductor light-emitting element and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a nitride-based semiconductor light-emitting element which is reduced in warpage after being peeled off from a substrate and can efficiently extract light from a side face. <P>SOLUTION: The nitride-based semiconductor light-emitting element A is provided with a light-emitting element section 5 in which at least an n-type semiconductor layer 13, a light-emitting layer 14 and a p-type semiconductor layer 15 are laminated. In this element A, a translucent insulated portion 6 is formed around the element section 5. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a nitride-based semiconductor light-emitting device and a manufacturing method thereof, and more particularly to a structure capable of improving light extraction efficiency and a manufacturing method thereof in a nitride-based semiconductor light-emitting device of a type having an upper and lower electrode structure including a substrate peeling process. .

In recent years, GaN-based compound semiconductor materials have attracted attention as semiconductor materials for short wavelength light emitting devices. GaN-based compound semiconductors include sapphire single crystals, various oxide substrates and III-V group compounds as substrates, and metalorganic vapor phase chemical reaction method (MOCVD method) or molecular beam epitaxy method (MBE method). ) Etc.
A sapphire single crystal substrate has a lattice constant of 10% or more different from that of GaN. However, by forming a buffer layer such as AlN or AlGaN, a good nitride semiconductor can be formed thereon, and it is generally widely used. Yes. When a sapphire single crystal substrate is used, an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer are stacked in this order. Since the sapphire substrate is an insulator, the element structure generally includes a positive electrode formed on the p-type semiconductor layer and a negative electrode formed on the n-type semiconductor layer. This type of light-emitting element uses a face-up method that uses a transparent electrode such as ITO as the positive electrode to extract light from the p-type semiconductor side, and a flip that uses a highly reflective film such as Ag as the positive electrode to extract light from the sapphire substrate side Two types of chip systems are known.

  As described above, the sapphire single crystal substrate is generally widely used as a substrate for a light emitting element, but has several problems because it is an insulator. First, since the n-type semiconductor layer is exposed by partially removing the light emitting layer by etching or the like to form the negative electrode, the area of the light emitting layer is reduced only in the negative electrode portion, and the output is reduced accordingly. To do. Secondly, since the positive electrode and the negative electrode are on the same plane, the current flow becomes horizontal, creating a region with a high current density locally, and the element generates heat. Third, since the thermal conductivity of the sapphire substrate is low, the generated heat does not diffuse and the temperature of the light emitting element rises.

In order to solve the above problems, a conductive substrate is bonded to an element in which an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer are stacked in this order on a sapphire single crystal substrate, and then the sapphire single crystal substrate is removed. And the method of arrange | positioning a positive electrode and a negative electrode up and down is disclosed. (See Patent Document 1)
Furthermore, a method for producing a substrate by plating instead of bonding a conductive substrate is disclosed. (See Patent Document 2)
Japanese Patent No. 3511970 JP 2004-47704 A

Examples of the conventional method of bonding the conductive substrate include a method of bonding a low melting point metal compound such as AuSn as an adhesive, an activated bonding in which a bonding surface is activated by argon plasma in a vacuum, and the like. The method is known.
With this method, the adhesion surface is required to be extremely smooth, and if there is a foreign substance such as a particle, the part floats and it is difficult to form a uniform adhesion surface, such as poor adhesion. is there.
A GaN film laminated on a substrate such as sapphire has a very high film stress because it is a thick film of 1 to 10 μm and the temperature at the time of lamination is as high as about 1000 ° C. For example, when a GaN film is laminated to a thickness of 5 μm on a sapphire substrate having a thickness of 0.4 mm, a warp of about 50 to 100 μm is generated on the substrate.

Furthermore, when creating a support substrate by plating, the mechanical strength of the plating support substrate is weaker than that of sapphire, and the film thickness (plate thickness) of the plating support substrate is limited to 10 μm to 200 μm due to production efficiency. Therefore, since the warp due to the film stress is generated on the plating support substrate, there is a problem that the influence of the warp after the support substrate is peeled is further increased.
In order to reduce the influence of the warpage of the substrate due to the GaN film, it is effective to previously divide the GaN film stacked on the substrate. For example, when a plurality of light emitting elements are formed on the GaN film after forming the GaN film on the substrate, if the GaN film is divided into a plurality of parts for each light emitting element, the stress is generated at the divided part of the GaN film. Relaxation occurs and the warpage of the entire substrate can be reduced.

On the other hand, when the plating support substrate is formed after dividing the GaN film, it is effective for reducing the warp of the entire support substrate, but the following two problems occur.
(1) Since the n-type semiconductor layer is exposed, if the plating is performed as it is, the n-type semiconductor layer and the p-type semiconductor layer are short-circuited by the plating layer.
(2) If the plating process is simply performed to form the plating support substrate, plating for forming the plating support substrate enters the side surfaces of the exposed p-type semiconductor layer, light emitting layer, and n-type semiconductor layer. In addition, since the plating layer shields these side surfaces and light cannot be extracted from the side surfaces, there is a problem that the light intensity obtained from the light emitting element is lowered.

  The problem (1) can be solved by forming a protective film on the side surfaces of the p-type semiconductor layer, the light emitting layer, and the n-type semiconductor layer, but the problem (2) There is a problem that it is difficult to solve easily because the depth of the side surface of the combined portion of the p-type semiconductor layer, the light-emitting layer, and the n-type semiconductor layer is 1 to 10 μm.

As a result of diligent efforts to solve the above problems, the present inventors have formed a light emitting element portion in which at least an n-type semiconductor layer, a light emitting layer, and a p type semiconductor layer are laminated, and the periphery of the light emitting element portion. It was found that the light-transmitting insulating part is provided with a less influence of warp caused by the film-forming stress at the time of manufacture, and the light extraction efficiency from the side surface can be secured.
Furthermore, the present inventors have made a light-emitting element structure obtained by forming a plurality of light-emitting element portions in a laminate formed on a substrate, and then performing element division and substrate separation. It has been found that by preparing a plating support substrate after filling with a conductive insulator, there is little warping even after the substrate is peeled off from the sapphire substrate or the like, and it is possible to achieve both light extraction efficiency from the side surface. That is, the present invention relates to the following.

(1) A nitride-based semiconductor light-emitting device including a light-emitting device portion in which at least an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are stacked, and a light-transmitting insulating portion is provided around the light-emitting device portion. A nitride-based semiconductor light-emitting element provided.
(2) The nitride-based semiconductor light-emitting element according to (1), wherein a metal film layer and a plated metal plate are laminated on the light-emitting element part.
(3) A plurality of the light emitting element portions are formed on the substrate and divided into elements,
The translucent insulating part is characterized in that a translucent insulator filled between a plurality of elements on the substrate is left around the light emitting element part after the element division. The nitride-based semiconductor light-emitting device according to 1) or (2).
(4) The nitride-based semiconductor light-emitting element according to any one of (1) to (3), wherein the translucent insulating portion is made of a silica-based insulator.
(5) The nitride-based semiconductor light-emitting element according to (4), wherein the silica-based insulator is formed using an SOG material.
(6) The nitride-based semiconductor light-emitting element according to (5), wherein the SOG material is siloxane-based or silazane-based.
(7) The nitride-based semiconductor light-emitting element according to any one of (2) to (6), wherein the metal film layer includes an ohmic contact layer.
(8) The nitride-based semiconductor light-emitting element according to any one of (2) to (7), wherein the metal film layer includes a reflective layer.
(9) The nitride-based semiconductor light-emitting element according to any one of (2) to (8), wherein the metal film layer includes an adhesion layer.
(10) The nitride-based semiconductor light-emitting device according to (7), wherein the ohmic contact layer is made of a single metal of Pt, Ru, Os, Rh, Ir, Pd, or Ag and an alloy thereof. element.
(11) The nitride-based semiconductor light-emitting element according to (8), wherein the reflective layer is made of an Ag alloy or an Al alloy.
(12) The nitride system according to (9), wherein the adhesion layer is composed of single metals of Ti, V, Cr, Zr, Nb, Mo, Hf, Ta, and W and alloys thereof. Semiconductor light emitting device.
(13) The nitride-based semiconductor light-emitting element according to any one of (2) to (12), wherein the plated metal plate has a thickness of 10 μm to 200 μm.
(14) The nitride-based semiconductor light-emitting element according to any one of (2) to (13), wherein the plated metal plate is made of NiP alloy, Cu, or Cu alloy.
(15) The nitride system according to any one of (2) to (14), wherein a plating adhesion layer is formed in contact with the plated metal plate between the metal film and the plated metal plate. Semiconductor light emitting device.
(16) The nitride-based semiconductor light-emitting element according to (15), wherein the plating adhesion layer has 50 wt% or more of the same composition as a main component that occupies 50 wt% or more of plating.
(17) The nitride-based semiconductor light-emitting element according to (15) or (16), wherein the plating adhesion layer is formed of a NiP alloy or a Cu alloy.
(18) A nitride-based semiconductor light-emitting element comprising a light-emitting element part formed by laminating at least an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer, and having a light-transmitting insulating part around the light-emitting element part In which at least a buffer layer, an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are stacked on a substrate to form a stacked body, and the stacked body is divided into a plurality of elements on the substrate. Forming a light emitting element part, a step of filling a light-transmitting insulator between the light-emitting element parts, a step of laminating a plated metal plate on the light-emitting element part and the light-transmitting insulator, A step of exposing the surface of the n-type semiconductor layer by removing the substrate and the buffer layer; and dividing the plated metal plate in units of the light-emitting element part, thereby transmitting light around the light-emitting element part. And a step of forming an insulating portion. Production method for a nitride semiconductor light emitting element.
(19) The method for manufacturing a nitride-based semiconductor light-emitting element according to (18), wherein the substrate is removed by a laser.
(20) The method for producing a nitride-based semiconductor light-emitting element according to (18) or (19), wherein the plated metal plates are laminated and then heat-treated at 100 ° C. to 300 ° C.

According to the present invention, there is provided a nitride-based semiconductor light-emitting device including a light-emitting device portion in which at least an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are stacked, and a light-transmitting property is provided around the light-emitting device portion. By providing the insulating portion, a short circuit between the n-type semiconductor layer and the p-type semiconductor layer on the side surface of the light-emitting element portion can be prevented. In addition, according to the present invention, since the light-transmitting insulating portion can pass the light output from the side surface of the light emitting element portion, the light extraction efficiency from the side surface can be improved. Further, according to the present invention, since a light-transmitting insulator is filled between light-emitting element portions and then a plated metal plate is laminated on the light-emitting element portion and the light-transmitting insulator, a substrate such as a sapphire substrate There will be less warping even after removing. Thereby, it is possible to provide a nitride-based semiconductor light-emitting device with high reliability and high output.
In the present invention, the light transmissivity as the translucent insulating part or translucent insulator means having light transmissivity in the wavelength range of 350 nm to 550 nm. In order to improve the light extraction property as the nitride semiconductor light emitting device, it is preferable to set the light transmittance to 80% or more as the light transmitting insulating portion or the light transmitting insulator.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention is not limited to the following embodiments, and for example, the constituent elements of these embodiments may be appropriately combined.
FIG. 1 is a schematic cross-sectional view of an example of a nitride semiconductor light emitting device according to this embodiment. The nitride semiconductor light emitting device A shown in FIG. 1 includes a light emitting device portion 5 including an n type semiconductor layer 13, a light emitting layer 14, and a p type semiconductor layer 15. All the side surfaces of the light emitting element portion 5 are covered with a light-transmitting insulating portion 6. On the p-type semiconductor layer 105, the ohmic contact layer 7 and the reflective layer 8 which are the metal film layers 4 are sequentially formed. Further, the upper surface of the reflective layer 8, the side surfaces of the ohmic contact layer 7 and the reflective layer 8, and the reflective layer 8 The adhesion layer 9, which is the metal film layer 4, the plating adhesion layer 10, and the plating metal plate 11, so as to cover the upper surface of the p-type semiconductor layer 105 located around the surface and the upper surface of the translucent insulating portion 6. They are sequentially stacked.

The planar shape of the light emitting element portion 5 may be a quadrangular shape, a round shape, or other shapes, but it is preferable that the translucent insulating portion 6 covers the entire side surface. However, in the present invention, it is not required that the translucent insulating portion 6 completely covers the entire side surface of the light emitting element portion 5.
Further, the nitride semiconductor light emitting device A shown in FIG. 1 has an upper and lower electrode structure in which the negative electrode 23 is formed on the lower surface side of the n-type semiconductor layer 103 and the positive electrode 12 is formed on the upper surface side of the plated metal plate 11. Yes.

In order to manufacture the nitride semiconductor light emitting device A having the structure shown in FIG. 1, for example, as shown in FIG. 2, a plurality of nitride semiconductor light emitting devices A that can be a plurality of nitride semiconductor light emitting devices A are aligned and formed. It can be manufactured by separating elements from the substrate 101 individually.
For example, a buffer layer 102 is formed on the substrate 101 as shown in FIG. 2, and an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer are sequentially stacked on the buffer layer 102 to form a stacked body. Thereafter, the stacked body is divided into elements along the boundary where the elements are to be separated to form the isolation grooves 26, and the rectangular n-type semiconductor layer 13, the light emitting layer 14, and the p-type semiconductor layer 15 are stacked on the substrate 101. Further, the elements are separated into individual light emitting element portions 5.

Next, the exposed isolation groove 26 is filled with a translucent insulator 106.
Next, the ohmic contact layer 7 is formed on the p-type semiconductor 15. A reflective layer 8 is provided on the ohmic contact layer 7 in order to improve the light reflectivity, but the reflective layer 8 may be omitted.
Next, a plating process is performed. However, before the plating process is performed, the adhesion layer 9 and the plating adhesion layer 10 are provided in order to improve the adhesion to the translucent insulator 106 and the p-type semiconductor layer 15, and after these are formed, the plating process is performed. A plated metal plate 111 is formed. These adhesion layer 9 and plating adhesion layer 10 are preferably formed, but the formation thereof may be omitted.
After the formation of the plated metal plate 111 described above, the substrate 101 is peeled off, and the buffer layer 102 is further removed to expose the surface of the n-type semiconductor layer 13. Thereafter, the positive electrode 12 and the negative electrode 13 are formed. And finally, by dividing the plated metal plate 111 and each layer on the plated metal plate 111 into units of the light emitting element unit 5 by dicing or the like, the translucent insulator 106 is divided and around the light emitting element unit 5. The nitride semiconductor light emitting element A having the cross-sectional structure shown in FIG.

In the series of manufacturing processes described above, the substrate 101 includes a sapphire single crystal (Al ₂ O ₃ ; A plane, C plane, M plane, R plane), spinel single crystal (AgAl ₂ O ₄ ), ZnO single crystal, LiAlO. Known substrate materials such as oxide single crystals such as ₂ single crystals, LiGaO ₂ single crystals, and MgO single crystals, Si single crystals, SiC single crystals, and GaAs single crystals can be used without any limitation.
If a conductive substrate such as SiC is used, the nitride semiconductor light emitting device A in which the positive electrode and the negative electrode are arranged vertically can be formed without peeling the substrate. In that case, the buffer layer that is an insulator is used. 102 cannot be used, and the crystal of the nitride-based semiconductor layer (the n-type semiconductor layer 13, the light-emitting layer 14, and the p-type semiconductor layer 15) grown thereon is deteriorated to form a favorable light-emitting element. Can not do it. In the present invention, it is preferable to perform substrate peeling even when conductive SiC or Si is used.

The buffer layer 102 is generally used for improving the crystallinity of GaN, such as AlN or AlGaN having an intermediate lattice constant, because the lattice constant of GaN differs from the sapphire single crystal substrate 101 by 10% or more. In the present invention, AlN and AlGaN can be applied without any limitation.
In the present embodiment, the nitride-based semiconductor (light-emitting element portion 5) has a heterojunction structure including, for example, an n-type semiconductor layer 13, a light-emitting layer 14, and a p-type semiconductor layer 15. Many semiconductors represented by the general formula AlxInyGa1-xyN (0 ≦ x <1, 0 ≦ y <1, x + y <1) are known as nitride-based semiconductor layers, and the general formula AlxInyGa1 is also used in the present invention. A nitride-based semiconductor represented by −xyN (0 ≦ x <1, 0 ≦ y <1, x + y <1) is used without any limitation.

The growth method of these nitride-based semiconductors (light emitting element portion 5) is not particularly limited, and metal organic chemical vapor deposition (MOCVD), hydride vapor deposition (HPVE), molecular beam epitaxy (MBE), etc. All methods known to grow group III nitride based semiconductors can be applied. A preferred growth method is the MOCVD method from the viewpoint of film thickness controllability and mass productivity.
In the MOCVD method, hydrogen (H ₂ ) or nitrogen (N ₂ ) as a carrier gas, trimethyl gallium (TMG) or triethyl gallium (TEG) as a Ga source which is a group III source, trimethyl aluminum (TMA) or triethyl aluminum as an Al source (TEA), trimethylindium (TMI) or triethylindium (TEI) as the In source, and ammonia (NH ₃ ), hydrazine (N ₂ H ₄ ), etc. as the N source as the group V source. As dopants, monosilane (SiH ₄ ) or disilane (Si ₂ H ₆ ) is used as a Si raw material for n-type, germane (GeH ₄ ) is used as a Ge raw material, and biscyclohexane is used as an Mg raw material for p-type. Pentadienyl magnesium (Cp ₂ Mg) or bisethylcyclopentadienyl magnesium ((EtCp) ₂ Mg) is used.

  As a method for dividing the nitride-based semiconductor (light-emitting element portion 5) on the sapphire substrate 101, a known technique such as an etching method such as dry etching or a laser cutting method can be used without any limitation. In the case of using the laser lift-off method, the nitride-based semiconductor is divided, but it is preferable to prevent damage to the sapphire substrate in order to achieve good substrate peeling. Therefore, when dividing | segmenting by an etching method, it is preferable to use the method with a quick etching rate with respect to a nitride-type semiconductor, and a slow etching rate with respect to a sapphire substrate. When dividing by a laser, it is preferable to use a laser having a wavelength of 300 to 400 nm because of the difference in absorption wavelength between GaN and sapphire.

  When the light emitting element portion 5 is divided into elements on the substrate 101, the width of the dividing grooves 26 formed on these side surfaces is set to about 1 to 30 μm and the depth is set to about 1 to 10 μm. In the present embodiment, the translucent insulating portion 6 is embedded in the dividing groove 26. As a means for filling the dividing groove 26, a film forming technique such as CVD, sputtering, or vapor deposition has a low film forming rate and is difficult to use as a practical mass production means. In order to form such a thick film, a liquid coating material such as SOG (spin-on-glass) is suitable.

As the SOG material, any known material can be used without limitation as long as it is a light-transmitting insulator such as methylsiloxane, highmethylsiloxane, hydrogenated methylmethylsiloxane, phosphorus-doped silicate, or polysilazane. I can do it. The translucency of the translucent insulating portion 6 is preferably 80% or more in the range of 350 nm to 550 nm.
It is preferable to perform the treatment under humidified conditions after application of the SOG material in order to facilitate the conversion to silica glass. Further, baking at 100 ° C. to 500 ° C. after application of the SOG material is preferable for improving rigidity and removing moisture and organic components contained in the SOG. For the application of the SOG material, a known method such as a spin coating method, a spray method, or a dip coating method can be used, but the spin coating method is preferably used from the viewpoint of productivity.

As the performance required for the ohmic contact layer 7, it is essential that the contact resistance with the p-type semiconductor layer 15 is small. The material of the ohmic contact layer 7 is preferably a platinum group such as Pt, Ru, Os, Rh, Ir, Pd or Ag from the viewpoint of contact resistance with the p-type semiconductor layer 15. More preferred are Pt, Ir, Rh and Ru. Pt is particularly preferred. Using Ag is preferable for obtaining good reflection, but the contact resistance is lower than Pt. Therefore, Ag can be used for applications that do not require much contact resistance.
The thickness of the ohmic contact layer 7 is preferably 0.1 nm or more in order to stably obtain a low contact resistance. More preferably, it is 1 nm or more, and uniform contact resistance is obtained by satisfying this thickness range.

A reflective layer 8 such as an Ag alloy is preferably formed on the ohmic contact layer 7. Pt, Ir, Rh, Ru, OS, Pd, and the like have a lower reflectance from visible light to ultraviolet region than Ag alloys. Therefore, it is difficult to obtain an element with high output because the light from the light emitting layer is not sufficiently reflected. In this case, it is preferable that the ohmic contact layer 7 is formed to be thin enough to allow light to pass therethrough, and a reflective layer such as an Ag alloy is formed to obtain reflected light. Can be created. In this case, the thickness of the ohmic contact layer 7 is preferably 30 nm or less. Furthermore, the thickness of the ohmic contact layer 7 is preferably 10 nm or less.
A method for forming the ohmic contact layer 7 and the reflective layer 8 is not particularly limited, and a known sputtering method or vapor deposition method can be used.

For the adhesion layer 9, a metal having good adhesion with GaN can be used. As a material of the adhesion layer 9, a single metal of Ti, V, Cr, Zr, Nb, Mo, Hf, Ta, and W and / or an alloy combining them can be used. Furthermore, the plating adhesion layer 10 may be formed in order to improve the adhesion with the plated metal plate 111. The material of the plating adhesion layer 10 varies depending on the plating used, but the adhesion can be improved by containing a substance mainly contained in the plating component. For example, when NiP plating is used, it is preferable to use a Ni-based alloy for the plating adhesion layer 10. More preferably, NiP is used. When using Cu plating, it is preferable to use a Cu-based alloy for the plating adhesion layer 10. More preferably, Cu is used.
The thickness of the adhesion layer 9 and the plating adhesion layer 10 is preferably 0.1 nm or more in order to obtain good adhesion. More preferably, it is 1 nm or more, and uniform adhesion is obtained. The upper limit of the thickness is not particularly limited, but is preferably 2 μm or less from the viewpoint of productivity.

The method for forming the adhesion layer 9 and the plating adhesion layer 10 is not particularly limited, and a known sputtering method or vapor deposition method can be used. In the sputtering method, since the sputtered particles collide with the substrate surface with high energy to form a film, a film having high adhesion can be obtained. Therefore, it is more preferable to use the sputtering method.
Either electroless plating or electrolytic plating can be used for plating. In the case of electroless plating, it is preferable to use NiP alloy plating as the material. In the case of electrolytic plating, it is preferable to use Cu or a Cu alloy as the material.
The thickness of the plated metal plate 111 is preferably 10 μm or more in order to maintain the strength as a substrate. When the thickness is increased, peeling of the plating is likely to occur and the productivity is also lowered. Therefore, the thickness is preferably 200 μm or less.

In addition, before carrying out plating, it is preferable to degrease and clean using a general-purpose neutral detergent or the like. Further, it is preferable to remove the natural oxide film on the plating adhesion layer by chemically etching the surface of the plating adhesion layer using an acid such as nitric acid.
As a plating treatment method such as NiP plating, an electroless plating treatment method using a nickel bath such as nickel sulfate or nickel chloride and a phosphorus source such as hypophosphite as a plating bath is employed. be able to. A commercially available product suitable as a plating bath used in the electroless plating method includes Nimden HDX manufactured by Uemura Kogyo. The pH of the plating bath when performing the electroless plating treatment is preferably 4 to 10, and the temperature is preferably 30 to 95 ° C.
As a plating method for Cu or Cu alloy, an electrolytic plating method using a Cu source such as copper sulfate can be employed as a plating bath. The pH of the plating bath when performing electroplating is preferably 2 or less under strong acid conditions. The temperature is preferably 10 to 50 ° C, and more preferably at room temperature (25 ° C). The current density is preferably 0.5 to 10 A / dm2. A more preferable current density is 2 to 4 A / dm2. It is more preferable to add a leveling agent in order to smooth the surface. As a commercial item used for the leveling agent, for example, ETN-1-A and ETN-1-B manufactured by Uemura Kogyo are used.

In order to improve the adhesion of the plated metal plate 111 thus obtained, it is preferable to perform a heat treatment. The heat treatment temperature is preferably 100 to 300 ° C. for improving adhesion. If the temperature is increased further, the adhesion may be further improved, but there is a risk that the ohmic contact property is lowered.
After forming the plated metal plate 111, the substrate 101 such as sapphire is peeled off. As a method for peeling off the substrate, a known technique such as a polishing method, an etching method, or a laser lift-off method can be used without any limitation.
After the substrate 101 is peeled off, the buffer layer 102 is removed by a polishing method, an etching method, or the like to expose the n-type semiconductor layer 13. Here, the negative electrode 23 is formed on the n-type semiconductor layer 13. As the negative electrode 23, negative electrodes having various compositions and structures are known, and these known negative electrodes can be used without any limitation. Various structures using materials such as Au, Al, Ni, and Cu are known for the positive electrode 12, and these known materials can be used without any limitation.

Hereinafter, an example is shown and the operation effect of the present invention is clarified. However, the present invention is not limited to the following examples.
Example 1
The nitride semiconductor light emitting device having the cross-sectional structure shown in FIG. 1 was manufactured as follows.
On a substrate made of sapphire, a 5 μm thick Si-doped n-type GaN contact layer, a 30 nm thick n-type In0.1Ga0.9N cladding layer, and a thickness through a buffer layer (thickness 10 nm) made of AlN A 30 nm thick Si-doped GaN barrier layer and a 2.5 nm thick In0.2Ga0.8N well layer are stacked five times, and finally a multiwell light emitting layer provided with a barrier layer, and a 50 nm thick Mg doped layer A clad layer of p-type Al 0.07 Ga 0.93 N and a Mg-doped p-type GaN contact layer having a thickness of 150 nm were laminated in this order to form a nitride semiconductor laminate.

Next, as shown in FIG. 2, a nitride semiconductor stack was dug up to the buffer layer 102 by dry etching on the substrate 101 to form isolation grooves 26, and the elements were divided into light emitting element portions 5. Thereafter, SOG was applied to fill the separation grooves 26. A polysilazane SOD Signflow 100 manufactured by Clariant was used as the SOG material. After application of SOG, prebaking was performed at 150 ° C. for 2 minutes, humidification was performed at 50 ° C. and 80% RH for 30 minutes, and treatment was performed at 300 ° C. for 30 minutes in an N ₂ atmosphere.

Next, a Pt layer having a thickness of 1.5 nm is deposited as an ohmic contact layer 7 on the nitride semiconductor p-type contact layer (p-type semiconductor layer 15), and is reflected on the ohmic contact layer 7. As the layer 8, Ag was deposited by a 20 nm sputtering method. SOG, Pt, and Ag patterns were formed using a known photolithography technique and lift-off technique.
Thereafter, Cr was deposited as the adhesion layer 9 by a 20 nm sputtering method, and a NiP alloy (Ni: 80 at%, P: 20 at%) was deposited thereon as the plating adhesion layer 10 by a 30 nm sputtering method. Next, the surface of the plating adhesion layer 10 was immersed in an aqueous nitric acid solution (5N) and treated at a temperature of 25 ° C. for 30 seconds to remove the oxide film.

  Next, using a plating bath (Nimden HDX-7G, manufactured by Uemura Kogyo Co., Ltd.), electroless plating made of a 50 μm NiP alloy was formed on the plating adhesion layer 10 to obtain a plated metal plate 111. The treatment conditions at this time were pH 4.6, temperature 90 ° C., and time 3 hours. Next, the plated metal plate 111 was washed with water and dried, and then treated for 1 hour under a condition of 250 ° C. using a clean oven. Next, the sapphire substrate 101 and the buffer layer 102 were peeled off by a laser lift-off method to expose the n-type semiconductor layer 13.

Thereafter, ITO (SnO 2: 10 wt%) was deposited on the surface of the n-type semiconductor layer 13 by vapor deposition at 400 nm. Next, a negative electrode 23 made of Cr (40 nm), Ti (100 nm), and Au (1000 nm) was formed on the central portion of the ITO surface by vapor deposition. The negative electrode pattern was formed using a known photolithography technique and lift-off technique. A positive electrode 12 made of Au (1000 nm) was formed on the surface of the plated metal plate 111 by vapor deposition.
Next, the light-transmitting insulator 106 is divided by dividing the plated metal plate 111 and each layer on the plated metal plate 111 in units of the light-emitting element portion 5 by dicing, so that the light-transmitting insulating portion is formed around the light-emitting element portion 5. The nitride-based semiconductor device A shown in FIG.

  About the obtained element, it mounted in the TO-18 can package, and the light emission output in 20 mA of applied currents was measured with the tester. The light emission output was 18 mW.

(Example 2)
The same treatment as in Example 1 was performed except that Cu was deposited as a plating adhesion layer by 30 nm instead of the NiP alloy film by sputtering, and Cu was deposited by electrolytic plating as a plating layer by 50 μm instead of the NiP alloy film. gave.
As Cu plating conditions, CuSO4: 80 g / L, sulfuric acid: 200 g / L, leveling agent (UTN-MURA ETN-1-A: 1.0 mL / L, ETN-1-B: 1-mL / L) The plating was carried out at room temperature at a current density of 2.5 A / dm2. The plating time was 3 hours, and a 50 μm Cu film was formed. Moreover, copper-containing copper phosphate was used for the anode.

  About the obtained element, it mounted in the TO-18 can package, and the light emission output in 20 mA of applied currents was measured with the tester. The light emission output was 18 mW.

(Comparative example)
A SiO ₂ film having a thickness of 100 nm was formed on the side surface of the light emitting element portion 5 exposed in the groove 26. CVD was used as the SiO ₂ film formation method. Otherwise, the same treatment as in Example 1 was performed.

  About the obtained element, it mounted in the TO-18 can package, and the light emission output in 20 mA of applied currents was measured with the tester. The light emission output was 12 mW.

In the comparative example, since the plating has entered the side surface of the light emitting element portion 5, light cannot be extracted from the side surface of the light emitting element portion 5. For this reason, the output was as low as 12 mW.
On the other hand, in Example 1, the translucent insulator 106 was formed on the side surface of the light emitting element unit 5 to prevent the plating from entering from the side surface of the light emitting element unit 5. After that, light could be extracted from the side, and an output as high as 18 mW was obtained. In Example 2 using Cu as the plated metal plate, a high output of 18 mW was obtained as in Example 1.

(Industrial applicability)
The nitride-based semiconductor device provided by the present invention has excellent characteristics and stability and is useful as a material for light-emitting diodes and lamps.

FIG. 1 is a cross-sectional view showing an embodiment of a nitride semiconductor light emitting device according to the present invention. FIG. 2 is a cross-sectional view showing a state in which a plurality of elements are formed on a substrate in the course of manufacturing the nitride semiconductor light emitting element of the embodiment.

Explanation of symbols

A nitride semiconductor light emitting element 13 n-type semiconductor layer 14 light emitting layer 15 p-type semiconductor layer 4 metal film layer 5 light emitting element part 6 translucent insulating part 7 ohmic contact layer 8 reflecting layer 9 adhesion layer 10 plating adhesion layer 11 plating metal Plate 12 Negative electrode 23 Positive electrode

Claims (20)

A nitride-based semiconductor light-emitting element including a light-emitting element unit in which at least an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are stacked,
A nitride-based semiconductor light-emitting element, wherein a translucent insulating part is provided around the light-emitting element part.   The nitride-based semiconductor light-emitting element according to claim 1, wherein a metal film layer and a plated metal plate are laminated on the light-emitting element part. A plurality of the light emitting element portions are formed on a substrate and divided into elements,
The light-transmitting insulating portion is a portion in which a light-transmitting insulator filled between a plurality of elements on the substrate remains around the light-emitting element portion after the element division. Item 3. The nitride-based semiconductor light-emitting device according to Item 1 or 2.   The nitride-based semiconductor light-emitting element according to claim 1, wherein the translucent insulating portion is made of a silica-based insulator.   The nitride-based semiconductor light-emitting element according to claim 4, wherein the silica-based insulator is formed using an SOG material.   6. The nitride-based semiconductor light-emitting element according to claim 5, wherein the SOG material is siloxane-based or silazane-based.   The nitride-based semiconductor light-emitting element according to claim 2, wherein the metal film layer includes an ohmic contact layer.   The nitride-based semiconductor light-emitting element according to claim 2, wherein the metal film layer includes a reflective layer.   The nitride-based semiconductor light-emitting element according to claim 2, wherein the metal film layer includes an adhesion layer.   The nitride-based semiconductor light-emitting element according to claim 7, wherein the ohmic contact layer is made of a single metal of Pt, Ru, Os, Rh, Ir, Pd, or Ag and an alloy thereof.   The nitride-based semiconductor light-emitting element according to claim 8, wherein the reflective layer is made of an Ag alloy or an Al alloy.   The nitride-based semiconductor light-emitting device according to claim 9, wherein the adhesion layer is made of a single metal of Ti, V, Cr, Zr, Nb, Mo, Hf, Ta, or W and an alloy thereof. .   13. The nitride-based semiconductor light-emitting element according to claim 2, wherein the plated metal plate has a thickness of 10 μm to 200 μm.   The nitride-based semiconductor light-emitting element according to claim 2, wherein the plated metal plate is formed of a NiP alloy, Cu, or a Cu alloy.   The nitride-based semiconductor light-emitting element according to claim 2, wherein a plating adhesion layer is formed between the metal film and the plated metal plate in contact with the plated metal plate.   The nitride-based semiconductor light-emitting element according to claim 15, wherein the plating adhesion layer has 50 wt% or more of the same composition as a main component occupying 50 wt% or more of plating.   The nitride-based semiconductor light-emitting element according to claim 15 or 16, wherein the plating adhesion layer is formed of a NiP alloy or a Cu alloy. A nitride-based semiconductor light-emitting element including a light-emitting element portion in which at least an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer are stacked and having a light-transmitting insulating portion around the light-emitting element portion is manufactured. A method,
Forming at least a buffer layer, an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer on a substrate to form a laminate, and dividing the laminate on the substrate to form a plurality of light-emitting element portions; When,
Filling a translucent insulator between the light emitting element portions;
Laminating a plated metal plate on the light emitting element part and on the translucent insulator;
Removing the substrate and the buffer layer to expose a surface of the n-type semiconductor layer;
And a step of forming a translucent insulating portion around the light emitting element portion by dividing the plated metal plate in units of the light emitting element portion.   The method for manufacturing a nitride-based semiconductor light-emitting element according to claim 18, wherein the substrate is removed by a laser. The method for manufacturing a nitride-based semiconductor light-emitting element according to claim 18, wherein heat treatment is performed at 100 ° C. to 300 ° C. after the plating metal plates are laminated.

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