JP2005158887A - Circuit board and its production process - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit board capable of ensuring sufficient adhesion between a substrate and a Cu film, and to provide its production process. <P>SOLUTION: The circuit board comprises a substrate 1, a Cu alloy thin film 2 formed on the substrate 1, and a Cu plated gold film 3 having a thickness of 300 nm-30 μm formed on the Cu alloy thin film 2. The Cu alloy thin film 2 is composed of an alloy principally comprising Cu and containing total 0.5-5.0 wt% of at least one kind of element selected from a group of Ti, Mo, Ni, Al and Ag and has a film thickness of 5 nm-1 μm. Consequently, adhesion can be ensured sufficiently between the substrate and the Cu film. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a circuit board and a method for manufacturing the circuit board, and more particularly to a circuit board that can sufficiently secure adhesion between the substrate and the Cu film, a method for manufacturing the circuit board, a circuit board that can suppress generation of etching residues, and a method for manufacturing the circuit board.

9A and 9B are cross-sectional views showing a conventional circuit board manufacturing method.
First, as shown in FIG. 9A, a base film 102 made of Cr, Ni or the like is formed on a polyimide substrate 101. Next, a Cu plating film 103 is formed on the base film 102 by an electric field plating method. By disposing the base film 102 between the Cu plating film 103 and the polyimide substrate 101, the base film 102 acts as an adhesion layer between the Cu plating film and the polyimide substrate, and Cu in the Cu plating film is applied to the polyimide substrate. It also acts as a barrier layer that suppresses diffusion.

  Next, as shown in FIG. 9B, a photoresist film (not shown) is applied on the Cu plating film 103, exposed and developed, whereby a resist pattern ( (Not shown) is formed. Next, the Cu plating film 103 and the base film 102 are wet-etched using this resist pattern as a mask, whereby wiring patterns 104 a to 104 d made of the Cu plating film and the base film are formed on the polyimide substrate 101.

  By the way, in the above conventional circuit board, the base film 102 made of Cr, Ni or the like acting as an adhesion layer is disposed between the Cu plating film 103 and the polyimide substrate 101. However, the wiring patterns 104a to 104d are miniaturized. As the process proceeds, the base film cannot secure sufficient adhesion.

  Further, since the resistance value of the base film 102 is relatively high, there is a problem that the growth rate of the Cu plating film is low.

  In addition, when the Cu plating film 103 and the base film 102 are patterned by wet etching, the Cu plating film and the base film are different in material, and therefore have different etching properties. Therefore, if the Cu plating film and the base film are patterned by one etching under the same conditions, an etching residue remains, which may cause problems such as short circuit between wirings and migration. On the other hand, in order not to leave etching residues, it is possible to pattern the Cu plating film and the base film by etching twice under different conditions, but in this case, the etching process takes longer time. There arises a problem that the throughput is lowered.

  10 (A) and 10 (B) are cross-sectional views showing another conventional circuit board manufacturing method. The other conventional circuit board manufacturing method solves the problem that the plating growth rate in the conventional circuit board manufacturing method shown in FIG. 9 is low.

  First, as shown in FIG. 10A, a base film 102 made of Cr, Ni or the like is formed on a polyimide substrate 101. Next, a Cu film 105 is formed on the base film 102 by sputtering. Next, a Cu plating film 103 is formed on the Cu film 105 by an electric field plating method.

  Next, as shown in FIG. 10B, a photoresist film (not shown) is applied on the Cu plating film 103, exposed and developed to form a resist pattern (on the Cu plating film 103). (Not shown) is formed. Next, the Cu plating film 103, the Cu film 105, and the base film 102 are etched using the resist pattern as a mask, whereby wiring patterns 106a to 106d made of the Cu plating film, the Cu film, and the base film are formed on the polyimide substrate 101. It is formed.

  In the other conventional circuit board, since the Cu film 105 is formed under the Cu plating film 103, the growth rate of the Cu plating film 103 can be increased as compared with the conventional circuit board of FIG. However, since the number of films is larger than that of the circuit board of FIG. 9, the number of processes is increased and the throughput is lowered. In addition, the adhesion and etching residue due to the base film have the same problems as those of the circuit board of FIG.

  As described above, the conventional circuit board and other conventional circuit boards have problems such as insufficient adhesion due to the base film 102 made of Cr, Ni, etc., and etching residue.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a circuit board that can sufficiently secure the adhesion between the substrate and the Cu film, and a method for manufacturing the circuit board. Another object of the present invention is to provide a circuit board capable of suppressing the generation of etching residues and a method for manufacturing the circuit board.

In order to solve the above problems, a circuit board according to the present invention includes a board,
A thin film formed on the substrate;
A circuit board comprising:
The thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag. To do.

  According to the circuit board, the adhesion between the thin film and the substrate is good, and when the Cu film is formed on the thin film by an electric field plating method, an electroless plating method, a vacuum vapor deposition method or an electron beam vapor deposition method, Good adhesion to Cu film. Therefore, by using a circuit board in which a thin film is formed on the substrate, it is possible to sufficiently secure the adhesion between the substrate and the Cu film.

A circuit board according to the present invention includes a board,
A thin film formed on the substrate;
A circuit board comprising:
The thin film is characterized in that it contains at least one element selected from the group consisting of Ti, Mo, Ni, Al and Ag in a total amount of 0.5 to 5.0 wt%, and the balance is made of an alloy made of Cu.

In the circuit board according to the present invention, the thickness of the thin film is preferably 5 nm or more and 1 μm or less.
The circuit board according to the present invention may further include a Cu film having a thickness of 300 nm to 30 μm formed on the thin film. Since the adhesion between the thin film and the Cu film is good, sufficient adhesion between the substrate and the Cu film can be secured.

A circuit board according to the present invention includes a board,
A thin film formed on the substrate by sputtering;
A Cu film formed on the thin film by vacuum vapor deposition or electron beam vapor deposition;
A circuit board comprising:
The thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al and Ag. 5 nm or more and 1 μm or less,
The thin film and the Cu film are characterized by reducing or reducing propagation loss associated with the skin effect.

  According to the circuit board, the adhesion between the thin film and the substrate is good, and the thin film has good adhesion with the Cu film. Therefore, sufficient adhesion between the substrate and the Cu film can be ensured. Further, a dense Cu film made of fine particles can be formed by vacuum vapor deposition or electron beam vapor deposition. This Cu film is advantageous in the skin effect because it becomes a film having excellent surface flatness. The skin effect is a concentration of high-frequency current on the conductor surface. For this reason, the path of the current flowing through the wiring pattern having an uneven surface as viewed microscopically is relatively long and the resistance value increases. For this reason, the path of the current flowing through the wiring pattern having excellent surface flatness does not become longer and the resistance value does not increase as compared with the case where there is unevenness. Therefore, a Cu film having excellent flatness is advantageous in the skin effect.

A circuit board according to the present invention includes a board,
A wiring pattern formed on the substrate;
A circuit board comprising:
The wiring pattern has a thin film and a Cu film formed on the thin film,
The thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al and Ag. 5 nm or more and 1 μm or less.

A circuit board according to the present invention includes a board,
A first wiring pattern formed on the substrate;
An insulating film formed on the first wiring pattern and the substrate;
A second wiring pattern formed on the insulating film;
A circuit board comprising:
The first wiring pattern includes a first thin film and a first Cu film formed on the first thin film,
The second wiring pattern has a second thin film and a second Cu film formed on the second thin film,
The first thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag; The film thickness is 5 nm or more and 1 μm or less,
The second thin film is made of an alloy containing, as a main component, Cu and containing at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag in a total amount of 0.5 to 5.0 wt%. The film thickness is 5 nm or more and 1 μm or less.

A circuit board according to the present invention includes a board,
A first thin film formed on the surface of the substrate;
A second thin film formed on the back surface of the substrate;
A circuit board comprising:
The first thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag; The film thickness is 5 nm or more and 1 μm or less,
The second thin film is made of an alloy containing, as a main component, Cu and containing at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag in a total amount of 0.5 to 5.0 wt%. The film thickness is 5 nm or more and 1 μm or less.

  In the circuit board according to the present invention, the thin film may be a base for promoting adhesion between the substrate and the Cu film.

  In the circuit board according to the present invention, the substrate may be provided with a through hole.

  In the circuit board according to the present invention, the board may be made of a polymer material, a resin material, or a ceramic material.

  In the circuit board according to the present invention, the polymer material may be one selected from the group consisting of polyimide, liquid crystal polymer, Teflon (registered trademark), and epoxy resin.

A circuit board manufacturing method according to the present invention is a circuit board manufacturing method comprising a step of forming a thin film on a substrate by sputtering,
The thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag. To do.

A circuit board manufacturing method according to the present invention is a circuit board manufacturing method comprising a step of forming a thin film on a substrate by sputtering,
The thin film is characterized in that it contains at least one element selected from the group consisting of Ti, Mo, Ni, Al and Ag in a total amount of 0.5 to 5.0 wt%, and the balance is made of an alloy made of Cu.

In the method for manufacturing a circuit board according to the present invention, the film thickness is preferably 5 nm or more and 1 μm or less.
In the method of manufacturing a circuit board according to the present invention, after the step of forming the thin film, a step of forming a Cu film having a thickness of 300 nm or more and 30 μm or less on the thin film by an electric field plating method or an electroless plating method. It is also possible to further comprise.

  Moreover, in the method for manufacturing a circuit board according to the present invention, after the step of forming the thin film, a step of forming a Cu film having a thickness of 300 nm or more and 30 μm or less on the thin film by a vacuum evaporation method or an electron beam evaporation method. It is also possible to further comprise.

The method of manufacturing a circuit board according to the present invention includes a step of forming a thin film on a substrate by sputtering,
Forming a Cu film having a thickness of 300 nm or more and 30 μm or less on the thin film by an electric field plating method or an electroless plating method;
Forming a wiring pattern comprising the Cu film and the thin film on the substrate by etching the Cu film and the thin film; and
A circuit board manufacturing method comprising:
The thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al and Ag. 5 nm or more and 1 μm or less.

  According to the above circuit board manufacturing method, the Cu film and the thin film, which are pure Cu, can be etched with the same etching solution, and the thin film has no difference in chemical reaction with pure Cu. Therefore, the Cu film and the thin film can be etched by one etching, and the problem of etching residue does not occur.

The method of manufacturing a circuit board according to the present invention includes a step of forming a thin film on a substrate by sputtering,
Forming a Cu film having a film thickness of 300 nm or more and 30 μm or less on the thin film by a vacuum evaporation method or an electron beam evaporation method;
Forming a wiring pattern comprising the Cu film and the thin film on the substrate by etching the Cu film and the thin film; and
A circuit board manufacturing method comprising:
The thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al and Ag. 5 nm or more and 1 μm or less.

A method for manufacturing a circuit board according to the present invention includes a step of forming a first thin film on a substrate by sputtering,
Forming a first Cu film having a film thickness of 300 nm or more and 30 μm or less on the first thin film by an electric field plating method or an electroless plating method;
Forming a first wiring pattern comprising the first Cu film and the first thin film on the substrate by etching the first Cu film and the first thin film;
Forming an insulating film on the first wiring pattern and the substrate;
Forming a second thin film on the insulating film by sputtering;
Forming a second Cu film having a thickness of 300 nm or more and 30 μm or less on the second thin film by an electric field plating method or an electroless plating method;
Forming a second wiring pattern comprising the second Cu film and the second thin film on the insulating film by etching the second Cu film and the second thin film;
A circuit board manufacturing method comprising:
The first thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag; The film thickness is 5 nm or more and 1 μm or less,
The second thin film is made of an alloy containing, as a main component, Cu and containing at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag in a total amount of 0.5 to 5.0 wt%. The film thickness is 5 nm or more and 1 μm or less.

A method for manufacturing a circuit board according to the present invention includes a step of forming a first thin film on a substrate by sputtering,
Forming a first Cu film having a thickness of 300 nm or more and 30 μm or less on the first thin film by a vacuum evaporation method or an electron beam evaporation method;
Forming a first wiring pattern comprising the first Cu film and the first thin film on the substrate by etching the first Cu film and the first thin film;
Forming an insulating film on the first wiring pattern and the substrate;
Forming a second thin film on the insulating film by sputtering;
Forming a second Cu film having a thickness of 300 nm or more and 30 μm or less on the second thin film by vacuum deposition or electron beam deposition;
Forming a second wiring pattern comprising the second Cu film and the second thin film on the insulating film by etching the second Cu film and the second thin film;
A circuit board manufacturing method comprising:
The first thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag; The film thickness is 5 nm or more and 1 μm or less,
The second thin film is made of an alloy containing, as a main component, Cu and containing at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag in a total amount of 0.5 to 5.0 wt%. The film thickness is 5 nm or more and 1 μm or less.

  As described above, according to the present invention, it is possible to provide a circuit board that can sufficiently secure the adhesion between the substrate and the Cu film, and a method for manufacturing the circuit board. In addition, according to another aspect of the present invention, it is possible to provide a circuit board capable of suppressing the generation of etching residues and a manufacturing method thereof.

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiments of the present invention will be described below with reference to the drawings.
(Embodiment 1)
FIGS. 1A to 1E and FIGS. 2F and 2G are cross-sectional views showing a method of manufacturing a circuit board according to Embodiment 1 of the present invention and mounting electronic components on the circuit board. is there.

  First, as shown in FIG. 1A, a Cu alloy thin film 2 having a thickness of 5 nm to 1 μm is formed on a substrate 1 by sputtering. The Cu alloy thin film 2 is an alloy containing 0.5 to 5.0% by weight (wt%) in total of at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag. It consists of Further, the more preferable Cu alloy thin film 2 is made of an alloy containing 0.5 to 5.0 wt% in total of at least one element selected from the group consisting of Ti, Mo, Ni, Al and Ag, with the balance being Cu. It will be. Further, a more preferable Cu alloy thin film is an alloy containing 1.1 to 1.2 wt% of Mo and the balance being Cu. The substrate 1 is formed of a polymer material or resin material made of polyimide, liquid crystal polymer, Teflon (registered trademark), epoxy resin, or the like.

  The reason why the above-described material is used for the Cu alloy thin film 2 is as follows. Alloy material can be easily manufactured, it is composed of chemically stable material, costly advantage of the material is high because no expensive metal is used, and the particle size is fine and dense. The composition can easily form a film, and when wet etching is performed, it is possible to perform etching at the same rate with the same etching solution as pure Cu (for example, ferric chloride, cupric chloride). This is because there is no difference in chemical reaction with pure Cu during wet etching, and there is no problem of residue or the like.

  Thereafter, as shown in FIG. 1B, a Cu plating film 3 having a thickness of 300 nm or more and 30 μm or less is formed on the Cu alloy thin film 2 by an electric field plating method or an electroless plating method. By disposing the Cu alloy thin film 2 under the Cu plating film 3, the plating growth rate can be increased and the throughput can be improved. Also, since the Cu plating film 3 is pure Cu (but contains unavoidable impurities), the composition is different from that of the Cu alloy thin film 2 but is the same in that it is mainly composed of Cu. very good. Further, the adhesion between the Cu alloy thin film 2 and the substrate 1 made of a polymer material or a resin material is very good as compared with a conventional base film such as Cr or Ni. Therefore, in this embodiment, unlike the conventional circuit board, there is no need for a base film for ensuring adhesion.

  Next, as shown in FIG. 1C, a photoresist film is applied on the Cu plating film 3, and exposed and developed to form a resist pattern 4 on the Cu plating film 3.

  Thereafter, as shown in FIG. 1D, the Cu plating film 3 and the Cu alloy thin film 2 are wet-etched with an etchant such as ferric chloride or cupric chloride using the resist pattern 4 as a mask. Next, by removing the resist pattern 4, wiring patterns 5 a to 5 d made of the Cu plating film 3 and the Cu alloy thin film 2 are formed on the substrate 1 as shown in FIG. The Cu-plated film 3 made of pure Cu and the Cu alloy thin film 2 having the above-described composition can be etched with an etchant such as ferric chloride or cupric chloride, and the etching rate is substantially the same. Further, the Cu alloy thin film has no difference in chemical reaction with that of pure Cu, and does not cause problems such as residues.

Next, as shown in FIG. 2F, the Ni plating film 6 is formed on the wiring patterns 5a to 5d, and the Au plating film 7 is formed. The Ni plating film 6 functions as a barrier layer and an adhesion layer.
Thereafter, as shown in FIG. 2G, an electronic component such as a semiconductor chip 8 to be mounted on a circuit board is prepared. Au bumps 9 as external terminals are formed on the active surface of the semiconductor chip 8.

  Next, the semiconductor chip 8 is aligned on the circuit board, Au bumps 9 are disposed on the wiring pattern, and the wiring pattern on the board and the semiconductor chip are thermocompression bonded. Thereby, the wiring pattern and the Au bump are joined, and the semiconductor chip is mounted on the circuit board.

  According to the first embodiment, by using the Cu alloy thin film 2 as a plating seed layer when forming the Cu plating film 3, a thin circuit board having a fine wiring pattern and having high reliability is realized. It becomes possible.

  In the present embodiment, as described above, the adhesion between the Cu alloy thin film 2 and the substrate 1 made of a polymer material or a resin material is very good at 4 to 6 N / cm, and the Cu alloy thin film 2 and the Cu plating film Adhesion with 3 is also very good. Further, it has been confirmed that the Cu alloy thin film 2 is less likely to diffuse Cu into the substrate 1. Further, by arranging the Cu alloy thin film 2 under the Cu plating film 3, the plating growth rate can be increased and the throughput can be improved. Further, the Cu plating film 3 which is pure Cu and the Cu alloy thin film 2 having the above-described composition can be etched with the same etching solution, and the etching rate is almost the same. Further, the Cu alloy thin film is different from pure Cu in chemical reaction. There is no. Therefore, the Cu plating film 3 and the Cu alloy thin film 2 can be etched by one wet etching, and problems such as etching residues do not occur. Therefore, the throughput in the etching process can be improved.

  In the first embodiment, the semiconductor chip 8 is mounted on the circuit board by bonding the wiring pattern having the Au plating film formed on the surface and the Au bump 9. However, the mounting of the electronic component such as the semiconductor chip is performed. The method is not limited to this, and it can be mounted on the circuit board using another mounting method. For example, the semiconductor chip 8 can be mounted on the circuit board by directly bonding the Au bumps 9 to a wiring pattern that does not form an Au plating film (that is, a wiring pattern made of the Cu plating film 3 and the Cu alloy thin film 2). . It is also possible to mount the electronic component on the circuit board by bonding the wiring pattern and the external terminal of the electronic component using a conductive paste, and the junction between the wiring pattern and the external terminal of the electronic component. It is also possible to mount the electronic component on the circuit board by fixing with an adhesive.

(Embodiment 2)
FIGS. 3A to 3E are cross-sectional views showing a method for manufacturing a circuit board according to the second embodiment of the present invention, and the same parts as those in FIG.

  First, as shown in FIG. 3A, a Cu alloy thin film 2 having a thickness of 5 nm to 1 μm is formed on a substrate 1 by sputtering. The Cu alloy thin film 2 is made of the same alloy as in the first embodiment, and the substrate 1 is made of the same material as in the first embodiment.

  Thereafter, as shown in FIG. 3B, a resist film 4 is applied on the Cu alloy thin film 2, and exposed and developed to form a resist pattern 4 on the Cu alloy thin film 2. This resist pattern 4 is a pattern in which only a portion where a Cu plating film is formed is opened.

  Next, as shown in FIG. 3C, a Cu plating film 3 having a film thickness of 300 nm to 30 μm is formed by an electric field plating method using the resist pattern 4 as a mask. Since this Cu plating film 3 is formed using a resist pattern as a mask, it has a wiring pattern when plating growth is completed. Further, the plating growth rate can be increased by disposing the Cu alloy thin film 2 under the Cu plating film 3 as in the first embodiment. Also, the adhesion between the Cu alloy thin film 2 and the Cu plating film 3 is good, and the adhesion between the Cu alloy thin film 2 and the substrate 1 is good as in the first embodiment.

Thereafter, as shown in FIG. 3D, the resist pattern 4 is removed.
Next, as shown in FIG. 3E, the Cu alloy thin film 2 is removed by etching using the Cu plating film 3 as a mask. Thereby, a wiring pattern composed of the Cu plating film 3 and the Cu alloy thin film 2 is formed on the substrate 1. An etching solution for etching the Cu alloy thin film 2 may be an etching solution such as ferric chloride or cupric chloride. This etching solution etches both the Cu plating film and the Cu alloy thin film. However, since the Cu alloy thin film is much thinner than the Cu plating film, it can be etched without any problem. However, it is more preferable to use an etching solution having a sufficient etching selectivity between the Cu plating film and the Cu alloy thin film so that the Cu plating film is not etched when etching the Cu alloy thin film.

  The subsequent steps are the same as the steps shown in FIGS.

In the second embodiment, the same effect as in the first embodiment can be obtained.
That is, a thin circuit board having a fine wiring pattern and high reliability can be realized. Further, the adhesion between the Cu alloy thin film 2 and the substrate 1 is very good, and the adhesion between the Cu alloy thin film 2 and the Cu plating film 3 is also very good. The Cu alloy thin film 2 is such that Cu in the Cu alloy thin film 2 is difficult to diffuse into the substrate 1. Further, the growth rate of the Cu plating film 3 can be increased, and the throughput can be improved. Further, problems such as etching residues do not occur.

(Embodiment 3)
4A and 4B are cross-sectional views showing a method for manufacturing a circuit board according to Embodiment 3 of the present invention. In this circuit board, wiring patterns are formed on both surfaces of the substrate 1.

  First, as shown in FIG. 4A, a Cu alloy thin film 2 having a film thickness of 5 nm or more and 1 μm or less is formed on the surface and the back surface of the substrate 1 by sputtering. The Cu alloy thin film 2 is made of the same alloy as in the first embodiment, and the substrate 1 is made of the same material as in the first embodiment.

  Thereafter, as shown in FIG. 4 (B), a Cu plating film 3 having a film thickness of 300 nm or more and 30 μm or less is formed on the Cu alloy thin film 2 on the front surface side and the back surface side of the substrate 1 by an electric field plating method or an electroless plating method. Form. Similar to the first embodiment, the plating growth rate can be increased by disposing the Cu alloy thin film 2 under the Cu plating film 3. Further, as in the first embodiment, the adhesion between the Cu alloy thin film 2 and the Cu plating film 3 is good, and the adhesion between the Cu alloy thin film 2 and the substrate 1 is good.

  Next, the Cu plating film 3 and the Cu alloy thin film 2 are wet etched by the same method as in the first embodiment, so that the Cu plating film 3 and the Cu alloy thin film 2 are formed on the front surface and the back surface of the substrate 1, respectively. A wiring pattern is formed (not shown).

  In the third embodiment, the same effect as in the first embodiment can be obtained.

(Embodiment 4)
5A to 5C are cross-sectional views showing a method for manufacturing a circuit board according to Embodiment 4 of the present invention. In this circuit board, through holes 1 a are formed in the substrate 1 and wiring patterns are formed on both surfaces of the substrate 1.

  First, as shown in FIG. 5A, a substrate 1 having a through hole 1a which is a through hole is prepared.

  Next, as shown in FIG. 5B, a Cu alloy thin film 2 having a film thickness of 5 nm or more and 1 μm or less is formed by sputtering on the front surface, back surface, and through hole 1a of the substrate 1. The Cu alloy thin film 2 is made of the same alloy as in the first embodiment, and the substrate 1 is made of the same material as in the first embodiment.

  Thereafter, as shown in FIG. 5C, the film thickness is 300 nm or more and 30 μm or less by the electric field plating method or the non-electrolytic plating method on the Cu alloy thin film 2 in the front surface side, the back surface side and the through hole 1a of the substrate 1. The Cu plating film 3 is formed. Similar to the first embodiment, the plating growth rate can be increased by disposing the Cu alloy thin film 2 under the Cu plating film 3. Further, as in the first embodiment, the adhesion between the Cu alloy thin film 2 and the Cu plating film 3 is good, and the adhesion between the Cu alloy thin film 2 and the substrate 1 is good.

  Next, the Cu plating film 3 and the Cu alloy thin film 2 are wet etched by the same method as in the first embodiment, so that the Cu plating film 3 and the Cu alloy thin film 2 are formed on the front surface and the back surface of the substrate 1, respectively. A wiring pattern is formed (not shown).

  In the fourth embodiment, the same effect as in the first embodiment can be obtained.

(Embodiment 5)
6 (A) and 6 (B) are cross-sectional views showing a method for manufacturing a circuit board according to Embodiment 5 of the present invention. This circuit board has a multilayer wiring structure.

  First, as shown in FIG. 6A, a Cu alloy thin film 2 having a film thickness of 5 nm to 1 μm is formed on a substrate 1 by sputtering, and an electric field plating method or a no electric field plating method is formed on the Cu alloy thin film 2. Thus, a Cu plating film 3 having a thickness of 300 nm to 30 μm is formed. Next, by patterning the Cu plating film 3 and the Cu alloy thin film 2, a wiring pattern (not shown) composed of the Cu plating film 3 and the Cu alloy thin film 2 is formed on the substrate 1. The steps so far are the same as those in the first embodiment. A wiring pattern made of the Cu plating film 3 and the Cu alloy thin film 2 may be formed on the substrate 1 by the same method as in the second embodiment.

  Thereafter, a polyimide film 10 is formed on the wiring pattern and the substrate 1 by applying a thermoplastic polyimide varnish on the wiring pattern and the substrate 1 and performing a heat treatment. Next, by etching the polyimide film 10, a through hole 10 a located on the wiring pattern is formed in the polyimide film 10. In addition, if a polyimide film has photosensitivity, a through hole can be formed by exposing and developing a polyimide film.

  Next, as shown in FIG. 6B, a Cu alloy thin film 11 having a thickness of 5 nm or more and 1 μm or less is formed by sputtering on the bottom surface, the inner side surface of the through hole 10 a and the polyimide film 10. A Cu plating film 12 having a thickness of 300 nm or more and 30 μm or less is formed thereon by an electric field plating method or an electroless plating method. Next, by patterning the Cu plating film 12 and the Cu alloy thin film 11, a wiring pattern (not shown) composed of the Cu plating film 12 and the Cu alloy thin film 11 is formed on the substrate 1. These steps use the same method as in the first embodiment. The wiring pattern on the polyimide film 10 is connected to the wiring pattern on the substrate 1 through the through hole 10a. A wiring pattern made of the Cu plating film 12 and the Cu alloy thin film 11 may be formed on the polyimide film 10 by the same method as in the second embodiment.

  A circuit board having a multilayer wiring structure is formed by the above method. The circuit board shown in FIG. 6B has a multilayer wiring structure in which two wiring layers are formed on the substrate. However, three or more wiring layers can be formed on the board. . In this case, a multilayer wiring structure having three or more layers can be formed by repeating the process of forming the second wiring layer shown in FIG.

  In the fifth embodiment, the same effect as in the first embodiment can be obtained.

  Further, since the Cu alloy thin film 11 is formed in the through hole 10a by sputtering, the Cu alloy thin film 11 can be formed with a small thickness and good coverage even with the fine through hole 10a. That is, this is particularly effective when the wiring pattern is miniaturized and the through hole is miniaturized.

Further, when the Cu alloy thin film 11 is formed by sputtering, the film thickness controllability is very good.
Further, the adhesion between the polyimide film 10 and the Cu alloy thin film 11 is very good, and the adhesion necessary for practical use can be sufficiently ensured.

(Embodiment 6)
A circuit board manufacturing method according to Embodiment 6 of the present invention will be described with reference to FIGS. 1 and 2 show a circuit board manufacturing method according to the first embodiment. In the first embodiment, the Cu plating film 3 is changed to a Cu vapor deposition film formed by vacuum vapor deposition or electron beam vapor deposition. This is the sixth embodiment.

  First, as shown in FIG. 1A, a Cu alloy thin film 2 having a thickness of 5 nm to 1 μm is formed on a substrate 1 by sputtering. The Cu alloy thin film 2 is made of the same alloy as in the first embodiment, and the substrate 1 is made of the same material as in the first embodiment. The reason why the above-described material is used for the Cu alloy thin film 2 is the same as that of the first embodiment. It is as follows.

  Thereafter, as shown in FIG. 1B, a Cu vapor deposition film 3 having a film thickness of 300 nm to 30 μm is formed on the Cu alloy thin film 2 by vacuum vapor deposition or electron beam vapor deposition. Since the deposited Cu film 3 is pure Cu (but contains inevitable impurities), the composition is different from that of the Cu alloy thin film 2 but is the same in that it is mainly composed of Cu. good. The adhesion between the Cu alloy thin film 2 and the substrate 1 is very good.

  Next, as shown in FIG. 1C, a photoresist film is applied on the Cu vapor deposition film 3, exposed and developed to form a resist pattern 4 on the Cu vapor deposition film 3.

  Thereafter, as shown in FIG. 1D, the Cu vapor deposition film 3 and the Cu alloy thin film 2 are wet-etched with an etchant such as ferric chloride and copper chloride using the resist pattern 4 as a mask. Next, by removing the resist pattern 4, wiring patterns 5 a to 5 d made of the Cu vapor deposition film 3 and the Cu alloy thin film 2 are formed on the substrate 1 as shown in FIG. The Cu vapor deposition film 3 which is pure Cu and the Cu alloy thin film 2 having the above-described composition can be etched with an etchant such as ferric chloride, cupric chloride and the like, and the etching rate is substantially the same. Further, the Cu alloy thin film has no difference in chemical reaction with that of pure Cu and does not cause problems such as residue.

  Next, as shown in FIG. 2F, an Au plating film 7 is formed on the wiring patterns 5a to 5d.

  Thereafter, as shown in FIG. 2G, an electronic component such as a semiconductor chip 8 to be mounted on a circuit board is prepared. Au bumps 9 as external terminals are formed on the active surface of the semiconductor chip 8.

  Next, the semiconductor chip 8 is aligned on the circuit board, Au bumps 9 are disposed on the wiring pattern, and the wiring pattern on the board and the semiconductor chip are thermocompression bonded. Thereby, the wiring pattern and the Au bump are joined, and the semiconductor chip is mounted on the circuit board.

  According to the sixth embodiment, the adhesion between the Cu alloy thin film 2 and the substrate 1 is very good, and the adhesion between the Cu alloy thin film 2 and the Cu vapor deposition film 3 is also very good. The Cu alloy thin film 2 is such that Cu in the Cu alloy thin film 2 is difficult to diffuse into the substrate 1. Moreover, it is possible to etch the Cu vapor deposition film 3 and the Cu alloy thin film 2 by one wet etching, and problems such as etching residues do not occur. Therefore, the throughput in the etching process can be improved.

  In the present embodiment, the use of the Cu vapor deposition film 3 has the following advantages. The crystal grain size of Cu in the Cu vapor deposition film 3 made of pure Cu formed by a vacuum vapor deposition method or an electron beam vapor deposition method is finer than that of a Cu plating film by an electric field plating method or an electroless plating method. For this reason, a dense film with a high particle density can be obtained.

  Further, in the vacuum vapor deposition method or the electron beam vapor deposition method, it is not necessary to use a wet process using chemicals, various solutions, water, or the like as compared with various plating methods. For this reason, it becomes possible to manufacture by a very environmentally friendly process.

  In addition, since the switching from the dry process to the wet process is not performed between the deposition process of the Cu alloy thin film 2 and the deposition process of the Cu vapor deposition film 3 as in the first embodiment, the throughput can be improved.

  Further, the formation of the Cu alloy thin film 2 by sputtering and the formation of the Cu vapor deposition film 3 by vapor deposition can be continuously performed by one apparatus. Thus, if the film is continuously formed by one apparatus, the productivity is extremely high and a low-cost process can be realized.

  Further, the Cu vapor deposition film 3 formed by the vapor deposition method has a finer crystal grain size and is denser than the Cu plating film formed by various plating methods. For this reason, when the Cu vapor deposition film 3 is wet-etched, it is possible to obtain the wiring patterns 5a to 5d whose surface and cross section are extremely flat and fine as compared with the case of the Cu plating film formed by various plating methods. In particular, in a wiring pattern that obtains a line or space having a width of 20 μm or less, there is a great advantage over the reliability of the wiring pattern itself such as migration or disconnection.

Further, when a dense Cu vapor deposition film 3 made of fine particles is formed by a vacuum vapor deposition method or an electron beam vapor deposition method, it is advantageous in the skin effect because the film has excellent surface flatness compared to various plating methods. is there.
The skin effect is that the high-frequency current is concentrated on the conductor surface, and in particular, the high-frequency current flows only in a portion having a thickness of about 1 μm on the conductor surface. For this reason, the path of the current flowing through the wiring pattern having an uneven surface as viewed microscopically is relatively long and the resistance value increases. For this reason, the path of the current flowing through the wiring pattern having excellent surface flatness does not become longer and the resistance value does not increase as compared with the case where there is unevenness. Therefore, the Cu vapor deposition film 3 having excellent flatness is advantageous in the skin effect.

  With a current that changes with time, such as alternating current, the induced magnetic field generated thereby also changes with time, and an electromotive force is generated in a direction that prevents the current from changing. The current at the center of the conductor has a larger number of magnetic flux linkages and a larger counter electromotive force, so that the current density becomes smaller and flows around the conductor. The degree of current gathering around the conductor is called skin depth. Here, the skin depth of Cu when the frequency is 5 GHz is 0.93 μm. For this reason, a circuit board used in such a frequency band can theoretically use a wiring pattern having a thickness of 0.93 μm × 2.

(Embodiment 7)
A circuit board manufacturing method according to a seventh embodiment of the present invention will be described with reference to FIG. FIG. 4 shows a method of manufacturing a circuit board according to the third embodiment. In the third embodiment, the Cu plating film 3 is changed to a Cu vapor deposition film formed by vacuum vapor deposition or electron beam vapor deposition. This is the seventh embodiment.

  First, as shown in FIG. 4A, a Cu alloy thin film 2 having a film thickness of 5 nm or more and 1 μm or less is formed on the surface and the back surface of the substrate 1 by sputtering. The Cu alloy thin film 2 is made of the same alloy as in the first embodiment, and the substrate 1 is made of the same material as in the first embodiment.

  Thereafter, as shown in FIG. 4 (B), a Cu vapor deposition film 3 having a film thickness of 300 nm or more and 30 μm or less on the Cu alloy thin film 2 on the front surface side and the back surface side of the substrate 1 by vacuum vapor deposition or electron beam vapor deposition. Form. As in the sixth embodiment, the adhesion between the Cu alloy thin film 2 and the Cu vapor deposition film 3 is good, and the adhesion between the Cu alloy thin film 2 and the substrate 1 is good.

  Next, the Cu vapor deposition film 3 and the Cu alloy thin film 2 are wet etched by the same method as in the sixth embodiment, so that the Cu vapor deposition film 3 and the Cu alloy thin film 2 are formed on the front surface and the back surface of the substrate 1 respectively. A wiring pattern is formed (not shown).

  In the seventh embodiment, the same effect as in the sixth embodiment can be obtained.

(Embodiment 8)
A method of manufacturing a circuit board according to the eighth embodiment of the present invention will be described with reference to FIG. FIG. 5 shows a method of manufacturing a circuit board according to the fourth embodiment. In the fourth embodiment, the Cu plating film 3 is changed to a Cu vapor deposition film formed by vacuum vapor deposition or electron beam vapor deposition. This is an eighth embodiment.

  First, as shown in FIG. 5A, a substrate 1 having a through hole 1a which is a through hole is prepared.

  Next, as shown in FIG. 5B, a Cu alloy thin film 2 having a film thickness of 5 nm or more and 1 μm or less is formed by sputtering on the front surface, back surface, and through hole 1a of the substrate 1. The Cu alloy thin film 2 is made of the same alloy as in the first embodiment, and the substrate 1 is made of the same material as in the first embodiment.

  Thereafter, as shown in FIG. 5C, the film thickness is 300 nm or more and 30 μm or less by vacuum deposition or electron beam deposition on the Cu alloy thin film 2 on the front surface side, back surface side and through hole 1a of the substrate 1. The Cu vapor deposition film 3 is formed. As in the sixth embodiment, the adhesion between the Cu alloy thin film 2 and the Cu vapor deposition film 3 is good, and the adhesion between the Cu alloy thin film 2 and the substrate 1 is good.

  Next, the Cu vapor deposition film 3 and the Cu alloy thin film 2 are wet etched by the same method as in the sixth embodiment, so that the Cu vapor deposition film 3 and the Cu alloy thin film 2 are formed on the front surface and the back surface of the substrate 1 respectively. A wiring pattern is formed (not shown).

  In the eighth embodiment, the same effect as in the sixth embodiment can be obtained.

(Embodiment 9)
A circuit board manufacturing method according to Embodiment 9 of the present invention will be described with reference to FIG. FIG. 6 shows a method of manufacturing a circuit board according to the fifth embodiment. In the fifth embodiment, the Cu plated films 3 and 12 are changed to Cu deposited films formed by vacuum deposition or electron beam deposition. This is the ninth embodiment.

  First, as shown in FIG. 6A, a Cu alloy thin film 2 having a film thickness of 5 nm to 1 μm is formed on a substrate 1 by sputtering, and a vacuum vapor deposition method or an electron beam vapor deposition method is formed on the Cu alloy thin film 2. Thus, a Cu vapor deposition film 3 having a film thickness of 300 nm to 30 μm is formed. Next, by patterning the Cu vapor deposition film 3 and the Cu alloy thin film 2, a wiring pattern (not shown) composed of the Cu vapor deposition film 3 and the Cu alloy thin film 2 is formed on the substrate 1. The steps so far are the same as in the sixth embodiment.

  Thereafter, a polyimide film 10 is formed on the wiring pattern and the substrate 1 by the same method as in the fifth embodiment, and a through hole 10a located on the wiring pattern is formed in the polyimide film 10.

  Next, as shown in FIG. 6B, a Cu alloy thin film 11 having a thickness of 5 nm or more and 1 μm or less is formed by sputtering on the bottom surface, the inner side surface of the through hole 10 a and the polyimide film 10. A Cu vapor deposition film 12 having a film thickness of 300 nm or more and 30 μm or less is formed thereon by vacuum vapor deposition or electron beam vapor deposition. Next, by patterning the Cu vapor deposition film 12 and the Cu alloy thin film 11, a wiring pattern (not shown) composed of the Cu vapor deposition film 12 and the Cu alloy thin film 11 is formed on the substrate 1. These steps use the same method as in the sixth embodiment. The wiring pattern on the polyimide film 10 is connected to the wiring pattern on the substrate 1 through the through hole 10a.

  A circuit board having a multilayer wiring structure is formed by the above method. The circuit board shown in FIG. 6B has a multilayer wiring structure in which two wiring layers are formed on the substrate. However, three or more wiring layers can be formed on the board. . In this case, a multilayer wiring structure having three or more layers can be formed by repeating the process of forming the second wiring layer shown in FIG.

  Also in the ninth embodiment, the same effect as in the sixth embodiment can be obtained.

  Further, since the Cu alloy thin film 11 is formed in the through hole 10a by sputtering, the Cu alloy thin film 11 can be formed with a small thickness and good coverage even with the fine through hole 10a. That is, this is particularly effective when the wiring pattern is miniaturized and the through hole is miniaturized.

Further, when the Cu alloy thin film 11 is formed by sputtering, the film thickness controllability is very good.
Further, the adhesion between the polyimide film 10 and the Cu alloy thin film 11 is very good, and the adhesion necessary for practical use can be sufficiently ensured.

  The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention. For example, the embodiments can be combined with each other within the obvious range of the first to ninth embodiments.

  In addition, the semiconductor chip 8 in the first embodiment can be mounted on the circuit board having the wiring patterns on both surfaces according to the third and seventh embodiments by using the same method as in the first embodiment.

  In addition, the semiconductor chip 8 in the first embodiment can be mounted on the circuit board having the through hole 1a according to the fourth and eighth embodiments by using the same method as in the first embodiment.

  In addition, the semiconductor chip 8 in the first embodiment can be mounted on the circuit board having the multilayer wiring structure according to the fifth and ninth embodiments by using the same method as in the first embodiment.

  It is also possible to provide the multilayer wiring structure according to the fifth and ninth embodiments on the circuit board according to the third and seventh embodiments. In this case, the multilayer wiring structure may be double-sided or single-sided.

  It is also possible to provide the multilayer wiring structure according to the fifth and ninth embodiments on the circuit board according to the fourth and eighth embodiments. In this case, the multilayer wiring structure may be double-sided or single-sided.

  In the fifth and ninth embodiments, the multilayer wiring structure is provided on one surface of the substrate 1, but the multilayer wiring structure can be provided on both surfaces of the substrate 1.

Moreover, in the said embodiment, although the board | substrate 1 formed with the polymeric material or resin material which consists of a polyimide, a liquid crystal polymer, Teflon (trademark), an epoxy resin, etc. is used, the material of a board | substrate is limited to these. However, the present invention can be implemented by changing the material of the substrate. For example, composite oxides mainly composed of Al ₂ O ₃ or Al ₂ O ₃ , ceramics such as AlN, SiO ₂ , paper base phenol resin copper clad laminate, paper base epoxy resin copper clad laminate, synthetic fiber Cloth base material epoxy resin copper clad laminate, glass cloth / paper composite base material epoxy resin copper clad laminate, glass cloth / glass nonwoven fabric composite base material epoxy resin copper clad laminate, glass cloth base material epoxy resin copper clad laminate, It is also possible to use substrates such as glass substrate polyimide resin copper clad laminate, glass substrate BT resin copper clad laminate, glass substrate fluorine resin copper clad laminate, glass substrate thermosetting PPO resin copper clad laminate It is.

Examples will be described below.
Using a DC magnetron sputtering device (Showa Vacuum, TSP) on a substrate made of commercially available polyimide, liquid crystal polymer, Teflon (registered trademark), and epoxy resin, the inside of the sputtered film tank was evacuated to 1 × 10 ⁻⁵ Torr. After that, a 100 nm thick underlayer was sputter-deposited at a voltage of 1.0 kilovolt, and further, an electron beam heating type vacuum evaporation apparatus (EBH-6, manufactured by Nippon Vacuum Co., Ltd.) in the same exhaust conditions on the underlayer. Was used to deposit 2 to 10 μm thick copper at a voltage of 2.0 kilovolts to produce a metal laminate / resin substrate. The normal adhesive strength of this metal laminate / resin substrate and the adhesive strength between the metal layer and the resin substrate after 96 hours exposure to an environment of 121 ° C and 100% RH, copper pattern width 50μm according to JIS, C-6481 And evaluated by the 90 degree peel test method.

  In the evaluation of the examples, the prepared test substrates are as shown in Table 1. As for the composition of the base film in Table 1, Examples 1 to 4 contain 0.5 to 5% by weight of Ti and the balance is made of Cu, and Examples 5 to 8 contain 0.5 to 5% by weight of Mo. The balance is an alloy made of Cu, Examples 9 to 12 contain 0.5 to 5% by weight of Ni, the balance is an alloy made of Cu, and Examples 13 to 16 contain 0.5 to 5% by weight of Al. The balance is an alloy made of Cu, and Examples 17 to 20 are alloys containing 0.5 to 5% by weight of Ag and the balance is made of Cu.

  Moreover, in order to confirm the effect of the Example described in Table 1, the test base material used as the comparative example described in Table 2 was created.

Example 1 and Table 2 above and the metal laminates / resin substrates in the normal state as shown in Table 1 and Table 2, and the metal layers and resin groups after being exposed to an environment of 121 ° C. and 100% RH for 96 hours. The adhesive strength of the material was evaluated by a 90 degree peel test method with a copper pattern width of 50 μm according to JIS, C-6481.
The results of evaluation are as shown in Table 3.

  As shown in Table 3 above, various resin substrates are made of an alloy material containing 0.5 to 5% by weight of at least one metal of Ti, Mo, Ni, Al, and Ag mainly composed of Cu. All circuit boards formed by forming a base layer on the upper layer by sputtering and then forming pure Cu by vapor deposition have high adhesion and are not affected by the environment because of little change over time after PCT. It is confirmed that the circuit board is stable and can obtain high reliability as a circuit board.

  In Comparative Examples 3 and 4 in Table 3 above, the normal state of adhesion and the results after PCT sufficiently ensure industrial utility, but metal Cr is bonded to oxygen during etching to be hexavalent. Since this hexavalent chromium is extremely toxic in the environment and is specified in the PRTR regulations and RoHS regulations, it causes environmental problems even if its characteristics are obtained. Is going on. This is the same for NiCr used in the industry in the prior art of the present invention, and it can be confirmed that the present invention includes many environmental advantages in addition to the technical advantages.

  That is, when a flexible printed wiring board is manufactured using the circuit board obtained by the structure of the present invention, the environment resistance, particularly the adhesive strength after being exposed to a high temperature and high humidity environment is excellent. There is an advantage that it is possible to provide a metal laminate / resin substrate and a flexible printed wiring board suitable as an electric device circuit that operates without impairing the function even in a severe environment of high humidity.

  Furthermore, the vacuum deposition method is a technology that heats and evaporates metals and non-metals in a vacuum and coats the surfaces of metals, glasses, and plastics to produce a thin film. It is used in fields such as antireflection of lenses, optical filters, and electronic devices. Widely used. In the current vacuum deposition method, the molten state of the material occurs in the process of heating and evaporating metals, etc., so the material is put in a crucible and melted and evaporated, and the evaporated atoms and molecules are attached to the upper substrate and coated. ing. Forming a circuit board by this method has been standard in the past, but since the establishment of material technology has not been realized in the prior art, it has not been put into practical use. I was not standing. For this reason, by using the underlayer of the present invention, it is practically used for the first time in the industry, and it is a fact that the superiority of the present invention can be confirmed.

  Next, as an effect of forming a pure Cu layer by vapor deposition, compared to the conventional plating method or the method of pasting copper foil, by forming a dense layer with fine particles, wiring and electrodes constituting the circuit As a result, the reliability can be improved.

(Experiment)
As an evaluation of the reliability of the circuit pattern itself, an experiment was conducted on migration resistance.
First, in the same manner as the above-mentioned adhesion evaluation, a sputtered film tank is formed on a substrate made of commercially available polyimide, liquid crystal polymer, Teflon (registered trademark), and epoxy resin by using a DC magnetron sputtering device (Showa Vacuum, TSP). After evacuating the inside to 1 × 10 ^-5 Torr, a 100 nm thick underlayer was sputter-deposited at a voltage of 1.0 kilovolt, and further, an electron beam heating method vacuum evaporation was performed on the underlayer in the same exhaust conditions. Using an apparatus (manufactured by Nippon Vacuum Co., Ltd., EBH-6), copper having a thickness of 2 to 10 μm was vapor-deposited at a voltage of 2.0 kilovolts to prepare a metal laminate / resin base material.

  As shown in FIG. 7, this metal laminate was alternately combined with a comb-shaped electrode wiring pattern having a width of 20 μm so that the electrode wirings were not in contact with each other.

  After that, 1 μL of ion-exchanged water is dropped between the electrodes, and the copper ion elution amount is used for qualitative analysis that replaces the ion concentration with discoloration and adds some quantitative judgment compared to the color scale. This was measured using a semi-quantitative ion test paper.

The standard electrode potential of metallic copper is + 0.337V for Cu ²⁺ (indicating that it is a potential difference with respect to the potential of the standard hydrogen electrode “Standard Hydrogen Electrode”), and aqueous solution at + 0.520V (vs.SHE) for Cu ⁺ Dissolves in. For this reason, copper ions elute even near 1 VDC, which is lower than the theoretical voltage at which water is electrolyzed. However, the higher the voltage, the greater the copper ion elution amount.

  When the eluted metal ions are diffused and reduced, ion migration occurs, and there is a problem that the reliability of the wiring electrode in the circuit board is impaired. Therefore, the reliability of the circuit board having wiring electrodes formed by the vapor deposition method is evaluated to confirm the difference from the conventional plating method. As a means of evaluation, the applied voltage and pH were changed, and metal ion diffusion and reduction processes were considered.

In this case, as the measure of ion migration resistance, IPC is standards (= The institute for I nterconnecting and P ackaging Electronic C ircuits) "TM - 650 - insulation resistance tests during the humidifying 2.6.3 printed wiring board" In the same way as Class 2 above, the presence or absence of breakdown or deterioration of the wiring electrode after standing for 7 days at 10 VDC as the applied voltage at 50 ° C. and 85 to 93% RH was confirmed.

  As a result of the evaluation of the above-mentioned ion migration resistance, as shown in Table 4, in relation to the plating method and the material of the underlayer, the circuit board having the wiring electrode formed by vapor deposition of Cu on the uppermost layer has a fine Cu layer. From the denseness, it was confirmed that the reliability as the wiring and the electrode was high. The composition of the sputtered layer of the test substrate in Table 4 is an alloy containing 0.5 to 5% by weight of Mo and the balance being Cu.

FIG. 8 is a schematic diagram for explaining the mechanism of ion migration.
As shown in FIG. 8, when a DC bias voltage is applied to both electrodes, the portion that should originally be the insulating layer has an electrolyte property due to moisture, ionic residues, and the like. At this time, the electrode metal elutes from the anode in the ionized region due to the relationship between the potential specific to the electrode metal and pH (pH). In many cases, this is distinguished when it is deposited by reduction during its growth process or by deposition at the cathode. The occurrence location is found on the surface of the insulating layer, the interface between the insulating layers, and between the layers, and this extends to cause a short circuit between the electrodes.

(A)-(E) are sectional drawings which show the method of manufacturing the circuit board by Embodiment 1 of this invention, and mounting an electronic component on a circuit board. (F) and (G) show a method of manufacturing the circuit board according to the first embodiment of the present invention and mounting electronic components on the circuit board, and show the next step of FIG. It is sectional drawing. (A)-(E) are sectional drawings which show the method to manufacture the circuit board by Embodiment 2 of this invention. (A), (B) is sectional drawing which shows the manufacturing method of the circuit board by Embodiment 3 of this invention. (A)-(C) are sectional drawings which show the manufacturing method of the circuit board by Embodiment 4 of this invention. (A), (B) is sectional drawing which shows the manufacturing method of the circuit board by Embodiment 5 of this invention. It is a schematic diagram explaining the experimental method of migration resistance. It is a schematic diagram explaining the mechanism of ion migration. (A), (B) is sectional drawing which shows the manufacturing method of the conventional circuit board. (A), (B) is sectional drawing which shows the manufacturing method of the other conventional circuit board.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Substrate 1a ... Through hole 2 ... Cu alloy thin film 3 ... Cu plating film or Cu vapor deposition film 4 ... Resist pattern 5a-5d ... Wiring pattern 6 ... Ni plating film 7 ... Au plating film 8 ... Semiconductor chip 9 ... Au bump 10 ... Polyimide film 10a ... Through hole 11 ... Cu alloy thin film 12 ... Cu plating film or Cu vapor deposition film 101 ... Substrate 102 ... Base film 103 ... Cu plating films 104a to 104d, 106a to 106d ... Wiring pattern 105 ... Cu film

Claims (21)

A substrate,
A thin film formed on the substrate;
A circuit board comprising:
The thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag. Circuit board to do. A substrate,
A thin film formed on the substrate;
A circuit board comprising:
The thin film is composed of an alloy containing at least one element selected from the group consisting of Ti, Mo, Ni, Al and Ag in a total amount of 0.5 to 5.0 wt%, and the balance being made of Cu. substrate. The circuit board according to claim 1, wherein the thin film has a thickness of 5 nm to 1 μm. The circuit board according to claim 1, further comprising a Cu film having a thickness of 300 nm to 30 μm formed on the thin film. A substrate,
A thin film formed on the substrate by sputtering;
A Cu film formed on the thin film by vacuum vapor deposition or electron beam vapor deposition;
A circuit board comprising:
The thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al and Ag. 5 nm or more and 1 μm or less,
The circuit board, wherein the thin film and the Cu film reduce or reduce propagation loss associated with a skin effect. A substrate,
A wiring pattern formed on the substrate;
A circuit board comprising:
The wiring pattern has a thin film and a Cu film formed on the thin film,
The thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al and Ag. A circuit board having a thickness of 5 nm to 1 μm. A substrate,
A first wiring pattern formed on the substrate;
An insulating film formed on the first wiring pattern and the substrate;
A second wiring pattern formed on the insulating film;
A circuit board comprising:
The first wiring pattern includes a first thin film and a first Cu film formed on the first thin film,
The second wiring pattern has a second thin film and a second Cu film formed on the second thin film,
The first thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag; The film thickness is 5 nm or more and 1 μm or less,
The second thin film is made of an alloy containing, as a main component, Cu and containing at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag in a total amount of 0.5 to 5.0 wt%. A circuit board having a thickness of 5 nm to 1 μm. A substrate,
A first thin film formed on the surface of the substrate;
A second thin film formed on the back surface of the substrate;
A circuit board comprising:
The first thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag; The film thickness is 5 nm or more and 1 μm or less,
The second thin film is made of an alloy containing, as a main component, Cu and containing at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag in a total amount of 0.5 to 5.0 wt%. A circuit board having a thickness of 5 nm to 1 μm.
The circuit board according to claim 1, wherein the thin film is a base for promoting adhesion between the substrate and the Cu film. The circuit board according to claim 1, wherein the substrate is provided with a through hole. The circuit board according to any one of claims 1 to 10, wherein the board is made of a polymer material, a resin material, or a ceramic material. 12. The circuit board according to claim 11, wherein the polymer material is one selected from the group consisting of polyimide, liquid crystal polymer, Teflon (registered trademark), and epoxy resin. A method of manufacturing a circuit board comprising a step of forming a thin film on a substrate by sputtering,
The thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag. Circuit board manufacturing method. A method of manufacturing a circuit board comprising a step of forming a thin film on a substrate by sputtering,
The thin film is composed of an alloy containing at least one element selected from the group consisting of Ti, Mo, Ni, Al and Ag in a total amount of 0.5 to 5.0 wt%, and the balance being made of Cu. A method for manufacturing a substrate. The method of manufacturing a circuit board according to claim 13 or 14, wherein the thickness of the thin film is 5 nm or more and 1 µm or less. 16. The method of claim 13, further comprising a step of forming a Cu film having a thickness of 300 nm or more and 30 μm or less on the thin film by an electric field plating method or an electroless plating method after the step of forming the thin film. The manufacturing method of the circuit board as described in any one of these. 16. The method according to claim 13, further comprising a step of forming a Cu film having a thickness of 300 nm to 30 μm on the thin film by a vacuum deposition method or an electron beam deposition method after the step of forming the thin film. The manufacturing method of the circuit board as described in any one of these. Forming a thin film on the substrate by sputtering;
Forming a Cu film having a thickness of 300 nm or more and 30 μm or less on the thin film by an electric field plating method or an electroless plating method;
Forming a wiring pattern comprising the Cu film and the thin film on the substrate by etching the Cu film and the thin film; and
A circuit board manufacturing method comprising:
The thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al and Ag. A method for producing a circuit board, wherein the thickness is 5 nm or more and 1 μm or less. Forming a thin film on the substrate by sputtering;
Forming a Cu film having a film thickness of 300 nm or more and 30 μm or less on the thin film by a vacuum evaporation method or an electron beam evaporation method;
Forming a wiring pattern comprising the Cu film and the thin film on the substrate by etching the Cu film and the thin film; and
A circuit board manufacturing method comprising:
The thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al and Ag. A method for producing a circuit board, wherein the thickness is 5 nm or more and 1 μm or less. Forming a first thin film on the substrate by sputtering;
Forming a first Cu film having a film thickness of 300 nm or more and 30 μm or less on the first thin film by an electric field plating method or an electroless plating method;
Forming a first wiring pattern comprising the first Cu film and the first thin film on the substrate by etching the first Cu film and the first thin film;
Forming an insulating film on the first wiring pattern and the substrate;
Forming a second thin film on the insulating film by sputtering;
Forming a second Cu film having a thickness of 300 nm or more and 30 μm or less on the second thin film by an electric field plating method or an electroless plating method;
Forming a second wiring pattern comprising the second Cu film and the second thin film on the insulating film by etching the second Cu film and the second thin film;
A circuit board manufacturing method comprising:
The first thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag; The film thickness is 5 nm or more and 1 μm or less,
The second thin film is made of an alloy containing, as a main component, Cu and containing at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag in a total amount of 0.5 to 5.0 wt%. A method for manufacturing a circuit board, wherein the film thickness is 5 nm or more and 1 μm or less. Forming a first thin film on the substrate by sputtering;
Forming a first Cu film having a thickness of 300 nm or more and 30 μm or less on the first thin film by a vacuum evaporation method or an electron beam evaporation method;
Forming a first wiring pattern comprising the first Cu film and the first thin film on the substrate by etching the first Cu film and the first thin film;
Forming an insulating film on the first wiring pattern and the substrate;
Forming a second thin film on the insulating film by sputtering;
Forming a second Cu film having a thickness of 300 nm or more and 30 μm or less on the second thin film by vacuum deposition or electron beam deposition;
Forming a second wiring pattern comprising the second Cu film and the second thin film on the insulating film by etching the second Cu film and the second thin film;
A circuit board manufacturing method comprising:
The first thin film is made of an alloy containing Cu as a main component and containing a total of 0.5 to 5.0 wt% of at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag; The film thickness is 5 nm or more and 1 μm or less,
The second thin film is made of an alloy containing, as a main component, Cu and containing at least one element selected from the group consisting of Ti, Mo, Ni, Al, and Ag in a total amount of 0.5 to 5.0 wt%. A method for manufacturing a circuit board, wherein the film thickness is 5 nm or more and 1 μm or less.

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