JP2007036218A - 非対称のcmosを介した、ノーマリーオン、ノーマリーオフカスコード接続構成デバイスのアクティブ駆動 - Google Patents
非対称のcmosを介した、ノーマリーオン、ノーマリーオフカスコード接続構成デバイスのアクティブ駆動 Download PDFInfo
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- JP2007036218A JP2007036218A JP2006176993A JP2006176993A JP2007036218A JP 2007036218 A JP2007036218 A JP 2007036218A JP 2006176993 A JP2006176993 A JP 2006176993A JP 2006176993 A JP2006176993 A JP 2006176993A JP 2007036218 A JP2007036218 A JP 2007036218A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/6877—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the control circuit comprising active elements different from those used in the output circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/04—Modifications for accelerating switching
- H03K17/041—Modifications for accelerating switching without feedback from the output circuit to the control circuit
- H03K17/0412—Modifications for accelerating switching without feedback from the output circuit to the control circuit by measures taken in the control circuit
- H03K17/04123—Modifications for accelerating switching without feedback from the output circuit to the control circuit by measures taken in the control circuit in field-effect transistor switches
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K2017/6875—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors using self-conductive, depletion FETs
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Abstract
【解決手段】本発明に係るカスコード回路は、第1及び第2のスイッチ、第1のスイッチのソースに接続されたコンデンサ、第1のスイッチのドレインに接続されたHEMTのソース、並びに、第1及び第2のスイッチを制御するコントローラを備える。この方法は状態Aを定義することによって達成され、第1のスイッチはOFFに、第2のスイッチはONになるように制御されコンデンサが帯電されることを可能にし、HEMTゲート閾値電圧の周辺でHEMTのドレイン電圧を安定させる。この方法はさらに状態Bを定義し、第1のスイッチはONに、第2のスイッチはほとんどの間OFFになるように制御されコンデンサに蓄えられた電荷を維持する。さらにこの方法は状態を遷移させ、コンデンサからの第1のスイッチの出力キャパシタンスのより速い帯電を可能にする。
【選択図】図1
Description
Claims (16)
- 高電子移動度トランジスタ(HEMT)を駆動するカスコード回路であって、前記回路は、
ソース、ドレイン及びゲートを有するp型スイッチと、
前記p型スイッチの前記ソースに接続されたコンデンサと、
前記p型スイッチの前記ドレインに接続されたソースを有する前記HEMTと、
前記p型スイッチを制御するコントローラと
を備えることを特徴とする回路。 - 請求項1に記載の回路であって、前記p型スイッチは、低電圧MOSFETであることを特徴とする回路。
- 請求項1に記載の回路であって、第2のスイッチをさらに含み、前記第2のスイッチ及び前記p型スイッチはともに、前記コントローラによって制御されるCMOS構造を形成することを特徴とする回路。
- 請求項3に記載の回路であって、前記n型スイッチは、前記HEMTを介してすべての電流を運び、前記第2のスイッチは、前記コンデンサと前記n型スイッチとの間の電流の流れを方向付けることを特徴とする回路。
- 請求項3に記載の回路であって、前記CMOS構造は、状態A、状態B、状態Aから状態Bへの遷移、及び状態Bから状態Aへの遷移にしたがって動作することを特徴とする回路。
- 請求項5に記載の回路であって、状態Aにおいて前記n型スイッチはOFFとなるように制御され、その結果前記HEMTはOFFとなり、前記第2のスイッチはONとなるように制御され、コンデンサが帯電されることを可能にし、前記HEMTのゲート閾値電圧の周辺で前記HEMTのドレイン電圧を安定させることを特徴とする回路。
- 請求項6に記載の回路であって、前記第2のスイッチは、同期整流器として動作し、ダイオードよりも低い電圧降下を可能にし、前記コンデンサのより速い帯電を可能にすることを特徴とする回路。
- 請求項5に記載の回路であって、状態Bにおいて前記n型スイッチはONとなるように制御され、その結果前記HEMTはONとなり、前記第2のスイッチはほとんどの間OFFとなるように制御され、そうすることによって、コンデンサに蓄えられた電荷を維持することを特徴とする回路。
- 請求項5に記載の回路であって、状態Aから状態Bに遷移する間、前記第2のスイッチがOFFにされた後に、前記n型スイッチはONにスイッチされることを特徴とする回路。
- 請求項5に記載の回路であって、状態Bから状態Aに遷移する間、前記n型スイッチはOFFにスイッチされ、前記第2のスイッチはONにスイッチされ、前記コンデンサからの前記n型スイッチの出力キャパシタンスのより速い帯電を可能にし、そうすることによって、前記HEMTをOFFのまま維持することを特徴とする回路。
- 請求項10に記載の回路であって、前記n型スイッチのドレイン−ソース電圧VDSの効果をさらに含み、
前記VDS電圧がHEMT閾値電圧に到達する前は、前記HEMTは完全にONであり、
前記VDS電圧が前記HEMT閾値電圧に達すると、前記HEMTはOFFにスイッチし始め、そうすることによって、前記HEMTにおける電流の流れを減少させ、
前記p型スイッチの前記出力キャパシタンスは、残りの電荷または前記HEMTからのリーク電流によって帯電されることを特徴とする回路。 - カスコード回路を介して高電子移動度トランジスタ(HEMT)を制御する方法であって、前記カスコード回路は、第1及び第2のスイッチ、前記第1のスイッチのソースに接続されたコンデンサ、前記第1のスイッチのドレインに接続された前記HEMTのソース、並びに、前記第1及び第2のスイッチを制御するコントローラを備え、前記方法は、
状態Aを定義するステップであって、前記第1のスイッチはOFFとなるように制御され、その結果前記HEMTはOFFになり、前記第2のスイッチはONとなるように制御され、前記コンデンサが帯電されることを可能にし、前記HEMTのドレイン電圧を前記HEMTのゲート閾値電圧の周辺で安定させるステップと、
状態Bを定義するステップであって、前記第1のスイッチはONとなるように制御され、その結果前記HEMTはONになり、前記第2のスイッチはほとんどの間OFFとなるように制御され、そうすることによって、前記コンデンサに帯電された電荷を維持するステップと、
状態Aから状態Bに遷移して、前記HEMTをONにするステップと、
状態Bから状態Aに遷移して、前記HEMTをOFFにするステップであって、前記第1のスイッチはOFFにスイッチされ、前記第2のスイッチはONにスイッチされ、前記コンデンサから前記第1のスイッチの出力キャパシタンスのより速い帯電を可能にし、前記HEMTをOFFに維持するステップと
を含むことを特徴とする方法。 - 請求項12に記載の方法であって、前記第1のスイッチは、低電圧n型MOSFETであることを特徴とする方法。
- 請求項13に記載の方法であって、前記第2のスイッチは同期整流器として動作し、ダイオードよりも低い電圧降下を可能にし、より速い供給コンデンサの帯電を可能にすることを特徴とする方法。
- 請求項13に記載の方法であって、状態Aから状態Bに遷移する間、前記第2のスイッチがOFFにスイッチされた後に、前記第1のスイッチはONにスイッチされることを特徴とする方法。
- 請求項13に記載の方法であって、状態Bから状態Aに遷移する前記ステップは、前記第1のスイッチのドレイン−ソース電圧VDSの効果を含み、
前記VDS電圧がHEMT閾値電圧に到達する前は、前記HEMTは完全にONであり、
前記VDS電圧が前記HEMT閾値電圧に到達すると、前記HEMTはOFFにスイッチし始め、そうすることによって、前記HEMTにおける電流を減少させ、
前記n型スイッチの前記出力キャパシタンスは、残りの電荷または前記HEMTからのリーク電流によって帯電されること
を特徴とする方法。
Applications Claiming Priority (2)
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US69433005P | 2005-06-27 | 2005-06-27 | |
US11/439,459 US7408399B2 (en) | 2005-06-27 | 2006-05-23 | Active driving of normally on, normally off cascoded configuration devices through asymmetrical CMOS |
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JP2007036218A true JP2007036218A (ja) | 2007-02-08 |
JP4216299B2 JP4216299B2 (ja) | 2009-01-28 |
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JP2006176993A Expired - Fee Related JP4216299B2 (ja) | 2005-06-27 | 2006-06-27 | 非対称のcmosを介した、ノーマリーオン、ノーマリーオフカスコード接続構成デバイスのアクティブ駆動 |
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JP (1) | JP4216299B2 (ja) |
DE (1) | DE102006029474A1 (ja) |
TW (1) | TW200707703A (ja) |
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DE102006029474A1 (de) | 2006-12-28 |
JP4216299B2 (ja) | 2009-01-28 |
TW200707703A (en) | 2007-02-16 |
US7408399B2 (en) | 2008-08-05 |
US20060290407A1 (en) | 2006-12-28 |
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