JP2006526203A5 - - Google Patents

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JP2006526203A5
JP2006526203A5 JP2006506228A JP2006506228A JP2006526203A5 JP 2006526203 A5 JP2006526203 A5 JP 2006526203A5 JP 2006506228 A JP2006506228 A JP 2006506228A JP 2006506228 A JP2006506228 A JP 2006506228A JP 2006526203 A5 JP2006526203 A5 JP 2006526203A5
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address translation
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address
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JP4608484B2 (ja
JP2006526203A (ja
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JP2006506228A 2003-05-12 2004-05-06 ストレージの無効化、バッファ・エントリの消去 Expired - Lifetime JP4608484B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/435,919 US7284100B2 (en) 2003-05-12 2003-05-12 Invalidating storage, clearing buffer entries, and an instruction therefor
PCT/GB2004/001971 WO2004099997A1 (en) 2003-05-12 2004-05-06 Invalidating storage, clearing buffer entries

Publications (3)

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JP2006526203A JP2006526203A (ja) 2006-11-16
JP2006526203A5 true JP2006526203A5 (enExample) 2007-06-14
JP4608484B2 JP4608484B2 (ja) 2011-01-12

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JP2006506228A Expired - Lifetime JP4608484B2 (ja) 2003-05-12 2004-05-06 ストレージの無効化、バッファ・エントリの消去

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US (7) US7284100B2 (enExample)
EP (5) EP1701269B1 (enExample)
JP (1) JP4608484B2 (enExample)
KR (2) KR100834365B1 (enExample)
CN (2) CN100397368C (enExample)
AT (5) ATE430963T1 (enExample)
CY (2) CY1111421T1 (enExample)
DE (6) DE112004000464T5 (enExample)
DK (4) DK1701269T3 (enExample)
ES (5) ES2336973T3 (enExample)
GB (3) GB2414842B (enExample)
IL (1) IL171905A (enExample)
PL (4) PL1653365T3 (enExample)
PT (2) PT1653343E (enExample)
SI (2) SI1653365T1 (enExample)
WO (1) WO2004099997A1 (enExample)

Families Citing this family (103)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8463998B1 (en) 2002-12-13 2013-06-11 Open Text S.A. System and method for managing page variations in a page delivery cache
US8312222B1 (en) * 2002-12-13 2012-11-13 Open Text, S.A. Event-driven regeneration of pages for web-based applications
US7530067B2 (en) * 2003-05-12 2009-05-05 International Business Machines Corporation Filtering processor requests based on identifiers
US9454490B2 (en) 2003-05-12 2016-09-27 International Business Machines Corporation Invalidating a range of two or more translation table entries and instruction therefore
US7284100B2 (en) * 2003-05-12 2007-10-16 International Business Machines Corporation Invalidating storage, clearing buffer entries, and an instruction therefor
US7443878B2 (en) * 2005-04-04 2008-10-28 Sun Microsystems, Inc. System for scaling by parallelizing network workload
US7415034B2 (en) * 2005-04-04 2008-08-19 Sun Microsystems, Inc. Virtualized partitionable shared network interface
US7415035B1 (en) * 2005-04-04 2008-08-19 Sun Microsystems, Inc. Device driver access method into a virtualized network interface
JP2006333438A (ja) * 2005-04-28 2006-12-07 Fujitsu Ten Ltd ゲートウェイ装置及びルーティング方法
US20070005932A1 (en) * 2005-06-29 2007-01-04 Intel Corporation Memory management in a multiprocessor system
JP4978008B2 (ja) * 2006-01-11 2012-07-18 株式会社日立製作所 仮想計算機上でのページテーブルアドレスの変更を高速化する方法
JP2007233615A (ja) * 2006-02-28 2007-09-13 Fujitsu Ltd アドレス変換装置
US7647509B2 (en) * 2006-05-12 2010-01-12 Intel Corporation Method and apparatus for managing power in a processing system with multiple partitions
US7797555B2 (en) * 2006-05-12 2010-09-14 Intel Corporation Method and apparatus for managing power from a sequestered partition of a processing system
US7401185B2 (en) * 2006-07-06 2008-07-15 International Business Machines Corporation Buffered indexing to manage hierarchical tables
US7555628B2 (en) * 2006-08-15 2009-06-30 Intel Corporation Synchronizing a translation lookaside buffer to an extended paging table
US20080270827A1 (en) * 2007-04-26 2008-10-30 International Business Machines Corporation Recovering diagnostic data after out-of-band data capture failure
US8799620B2 (en) * 2007-06-01 2014-08-05 Intel Corporation Linear to physical address translation with support for page attributes
US8180997B2 (en) * 2007-07-05 2012-05-15 Board Of Regents, University Of Texas System Dynamically composing processor cores to form logical processors
US8145876B2 (en) * 2007-08-06 2012-03-27 Advanced Micro Devices, Inc. Address translation with multiple translation look aside buffers
US8041923B2 (en) 2008-01-11 2011-10-18 International Business Machines Corporation Load page table entry address instruction execution based on an address translation format control field
US8677098B2 (en) 2008-01-11 2014-03-18 International Business Machines Corporation Dynamic address translation with fetch protection
US8417916B2 (en) 2008-01-11 2013-04-09 International Business Machines Corporation Perform frame management function instruction for setting storage keys and clearing blocks of main storage
US8041922B2 (en) 2008-01-11 2011-10-18 International Business Machines Corporation Enhanced dynamic address translation with load real address function
US8103851B2 (en) 2008-01-11 2012-01-24 International Business Machines Corporation Dynamic address translation with translation table entry format control for indentifying format of the translation table entry
US8335906B2 (en) 2008-01-11 2012-12-18 International Business Machines Corporation Perform frame management function instruction for clearing blocks of main storage
US8019964B2 (en) 2008-01-11 2011-09-13 International Buisness Machines Corporation Dynamic address translation with DAT protection
US8117417B2 (en) 2008-01-11 2012-02-14 International Business Machines Corporation Dynamic address translation with change record override
US8037278B2 (en) 2008-01-11 2011-10-11 International Business Machines Corporation Dynamic address translation with format control
US8151083B2 (en) * 2008-01-11 2012-04-03 International Business Machines Corporation Dynamic address translation with frame management
US8082405B2 (en) 2008-01-11 2011-12-20 International Business Machines Corporation Dynamic address translation with fetch protection
US8176280B2 (en) * 2008-02-25 2012-05-08 International Business Machines Corporation Use of test protection instruction in computing environments that support pageable guests
US8112174B2 (en) * 2008-02-25 2012-02-07 International Business Machines Corporation Processor, method and computer program product for fast selective invalidation of translation lookaside buffer
US8086811B2 (en) 2008-02-25 2011-12-27 International Business Machines Corporation Optimizations of a perform frame management function issued by pageable guests
US8458438B2 (en) * 2008-02-26 2013-06-04 International Business Machines Corporation System, method and computer program product for providing quiesce filtering for shared memory
US8140834B2 (en) * 2008-02-26 2012-03-20 International Business Machines Corporation System, method and computer program product for providing a programmable quiesce filtering register
US8527715B2 (en) * 2008-02-26 2013-09-03 International Business Machines Corporation Providing a shared memory translation facility
US8095773B2 (en) 2008-02-26 2012-01-10 International Business Machines Corporation Dynamic address translation with translation exception qualifier
US8380907B2 (en) * 2008-02-26 2013-02-19 International Business Machines Corporation Method, system and computer program product for providing filtering of GUEST2 quiesce requests
US8266411B2 (en) * 2009-02-05 2012-09-11 International Business Machines Corporation Instruction set architecture with instruction characteristic bit indicating a result is not of architectural importance
US8510511B2 (en) * 2009-12-14 2013-08-13 International Business Machines Corporation Reducing interprocessor communications pursuant to updating of a storage key
US8918601B2 (en) * 2009-12-14 2014-12-23 International Business Machines Corporation Deferred page clearing in a multiprocessor computer system
US8930635B2 (en) * 2009-12-14 2015-01-06 International Business Machines Corporation Page invalidation processing with setting of storage key to predefined value
US8806179B2 (en) 2009-12-15 2014-08-12 International Business Machines Corporation Non-quiescing key setting facility
US8214598B2 (en) * 2009-12-22 2012-07-03 Intel Corporation System, method, and apparatus for a cache flush of a range of pages and TLB invalidation of a range of entries
US8595469B2 (en) 2010-06-24 2013-11-26 International Business Machines Corporation Diagnose instruction for serializing processing
US8407701B2 (en) 2010-06-24 2013-03-26 International Business Machines Corporation Facilitating quiesce operations within a logically partitioned computer system
US8918885B2 (en) * 2012-02-09 2014-12-23 International Business Machines Corporation Automatic discovery of system integrity exposures in system code
US9251091B2 (en) * 2012-06-15 2016-02-02 International Business Machines Corporation Translation look-aside table management
US20130339656A1 (en) * 2012-06-15 2013-12-19 International Business Machines Corporation Compare and Replace DAT Table Entry
US9182984B2 (en) * 2012-06-15 2015-11-10 International Business Machines Corporation Local clearing control
US9043565B2 (en) * 2012-09-07 2015-05-26 Kabushiki Kaisha Toshiba Storage device and method for controlling data invalidation
US9196014B2 (en) 2012-10-22 2015-11-24 Industrial Technology Research Institute Buffer clearing apparatus and method for computer graphics
US9330017B2 (en) * 2012-11-02 2016-05-03 International Business Machines Corporation Suppressing virtual address translation utilizing bits and instruction tagging
US9092382B2 (en) 2012-11-02 2015-07-28 International Business Machines Corporation Reducing microprocessor performance loss due to translation table coherency in a multi-processor system
US20140258635A1 (en) * 2013-03-08 2014-09-11 Oracle International Corporation Invalidating entries in a non-coherent cache
US10509725B2 (en) 2013-03-08 2019-12-17 Oracle International Corporation Flushing by copying entries in a non-coherent cache to main memory
US9465965B1 (en) 2013-03-11 2016-10-11 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Adminstration Methods, systems and apparatuses for radio frequency identification
US9619387B2 (en) * 2014-02-21 2017-04-11 Arm Limited Invalidating stored address translations
US9886391B2 (en) * 2014-03-20 2018-02-06 International Business Machines Corporation Selective purging of PCI I/O address translation buffer
WO2016012831A1 (en) * 2014-07-21 2016-01-28 Via Alliance Semiconductor Co., Ltd. Simultaneous invalidation of all address translation cache entries associated with x86 process context identifier
US9684606B2 (en) * 2014-11-14 2017-06-20 Cavium, Inc. Translation lookaside buffer invalidation suppression
US9697137B2 (en) * 2014-11-14 2017-07-04 Cavium, Inc. Filtering translation lookaside buffer invalidations
US9477516B1 (en) 2015-03-19 2016-10-25 Google Inc. Concurrent in-memory data publication and storage system
US11755484B2 (en) 2015-06-26 2023-09-12 Microsoft Technology Licensing, Llc Instruction block allocation
US9952867B2 (en) 2015-06-26 2018-04-24 Microsoft Technology Licensing, Llc Mapping instruction blocks based on block size
US10346168B2 (en) 2015-06-26 2019-07-09 Microsoft Technology Licensing, Llc Decoupled processor instruction window and operand buffer
US10409606B2 (en) 2015-06-26 2019-09-10 Microsoft Technology Licensing, Llc Verifying branch targets
US9946548B2 (en) 2015-06-26 2018-04-17 Microsoft Technology Licensing, Llc Age-based management of instruction blocks in a processor instruction window
US10169044B2 (en) 2015-06-26 2019-01-01 Microsoft Technology Licensing, Llc Processing an encoding format field to interpret header information regarding a group of instructions
US10175988B2 (en) 2015-06-26 2019-01-08 Microsoft Technology Licensing, Llc Explicit instruction scheduler state information for a processor
US10191747B2 (en) 2015-06-26 2019-01-29 Microsoft Technology Licensing, Llc Locking operand values for groups of instructions executed atomically
US10409599B2 (en) 2015-06-26 2019-09-10 Microsoft Technology Licensing, Llc Decoding information about a group of instructions including a size of the group of instructions
US11126433B2 (en) 2015-09-19 2021-09-21 Microsoft Technology Licensing, Llc Block-based processor core composition register
US10768936B2 (en) 2015-09-19 2020-09-08 Microsoft Technology Licensing, Llc Block-based processor including topology and control registers to indicate resource sharing and size of logical processor
US11016770B2 (en) 2015-09-19 2021-05-25 Microsoft Technology Licensing, Llc Distinct system registers for logical processors
US10942683B2 (en) 2015-10-28 2021-03-09 International Business Machines Corporation Reducing page invalidation broadcasts
US10248573B2 (en) 2016-07-18 2019-04-02 International Business Machines Corporation Managing memory used to back address translation structures
US10176111B2 (en) 2016-07-18 2019-01-08 International Business Machines Corporation Host page management using active guest page table indicators
US10282305B2 (en) 2016-07-18 2019-05-07 International Business Machines Corporation Selective purging of entries of structures associated with address translation in a virtualized environment
US10223281B2 (en) 2016-07-18 2019-03-05 International Business Machines Corporation Increasing the scope of local purges of structures associated with address translation
US10802986B2 (en) 2016-07-18 2020-10-13 International Business Machines Corporation Marking to indicate memory used to back address translation structures
US10162764B2 (en) 2016-07-18 2018-12-25 International Business Machines Corporation Marking page table/page status table entries to indicate memory used to back address translation structures
US10169243B2 (en) 2016-07-18 2019-01-01 International Business Machines Corporation Reducing over-purging of structures associated with address translation
US10168902B2 (en) 2016-07-18 2019-01-01 International Business Machines Corporation Reducing purging of structures associated with address translation
US10180909B2 (en) 2016-07-18 2019-01-15 International Business Machines Corporation Host-based resetting of active use of guest page table indicators
US10176006B2 (en) 2016-07-18 2019-01-08 International Business Machines Corporation Delaying purging of structures associated with address translation
US10176110B2 (en) 2016-07-18 2019-01-08 International Business Machines Corporation Marking storage keys to indicate memory used to back address translation structures
US10241924B2 (en) 2016-07-18 2019-03-26 International Business Machines Corporation Reducing over-purging of structures associated with address translation using an array of tags
US11531552B2 (en) 2017-02-06 2022-12-20 Microsoft Technology Licensing, Llc Executing multiple programs simultaneously on a processor core
US10528488B1 (en) * 2017-03-30 2020-01-07 Pure Storage, Inc. Efficient name coding
US10437729B2 (en) 2017-04-19 2019-10-08 International Business Machines Corporation Non-disruptive clearing of varying address ranges from cache
US10725928B1 (en) * 2019-01-09 2020-07-28 Apple Inc. Translation lookaside buffer invalidation by range
US11151267B2 (en) * 2019-02-25 2021-10-19 International Business Machines Corporation Move data and set storage key based on key function control
US11042483B2 (en) 2019-04-26 2021-06-22 International Business Machines Corporation Efficient eviction of whole set associated cache or selected range of addresses
US11132470B2 (en) * 2019-11-07 2021-09-28 Micron Technology, Inc. Semiconductor device with secure access key and associated methods and systems
US11182308B2 (en) * 2019-11-07 2021-11-23 Micron Technology, Inc. Semiconductor device with secure access key and associated methods and systems
US11494522B2 (en) 2019-11-07 2022-11-08 Micron Technology, Inc. Semiconductor device with self-lock security and associated methods and systems
US11030124B2 (en) 2019-11-07 2021-06-08 Micron Technology, Inc. Semiconductor device with secure access key and associated methods and systems
CN111338987B (zh) * 2020-02-13 2023-12-12 江苏华创微系统有限公司 快速无效组相联tlb的方法
US11422946B2 (en) 2020-08-31 2022-08-23 Apple Inc. Translation lookaside buffer striping for efficient invalidation operations
US11615033B2 (en) 2020-09-09 2023-03-28 Apple Inc. Reducing translation lookaside buffer searches for splintered pages
US20250378027A1 (en) * 2024-06-07 2025-12-11 Arm Limited Invalidate-write hazard detection

Family Cites Families (57)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US592853A (en) * 1897-11-02 Electric battery
US4432053A (en) * 1981-06-29 1984-02-14 Burroughs Corporation Address generating apparatus and method
JPS5815196A (ja) 1981-07-22 1983-01-28 株式会社日立製作所 蒸気発生プラント
JPS5815195A (ja) 1981-07-22 1983-01-28 株式会社日立製作所 制御棒駆動装置の自動交換装置
JPS58150195A (ja) 1982-02-27 1983-09-06 Fujitsu Ltd 主記憶キ−制御方式
JPS58150196A (ja) 1982-02-27 1983-09-06 Fujitsu Ltd 主記憶キ−の更新制御方式
JPS5994289A (ja) * 1982-11-22 1984-05-30 Hitachi Ltd 記憶制御方式
US4779188A (en) * 1983-12-14 1988-10-18 International Business Machines Corporation Selective guest system purge control
US4792895A (en) * 1984-07-30 1988-12-20 International Business Machines Corp. Instruction processing in higher level virtual machines by a real machine
DE3686984T2 (de) 1985-06-28 1993-03-11 Hewlett Packard Co Verfahren und mittel zum laden und speichern von daten in einem rechner mit beschraenktem befehlssatz.
EP0220451B1 (en) 1985-10-30 1994-08-10 International Business Machines Corporation A cache coherence mechanism based on locking
JP2545789B2 (ja) * 1986-04-14 1996-10-23 株式会社日立製作所 情報処理装置
JPS62295147A (ja) * 1986-06-16 1987-12-22 Hitachi Ltd 仮想計算機システム
JP2960415B2 (ja) * 1987-05-22 1999-10-06 株式会社日立製作所 記憶保護方法および装置
JP2510605B2 (ja) 1987-07-24 1996-06-26 株式会社日立製作所 仮想計算機システム
JP2507785B2 (ja) * 1988-07-25 1996-06-19 富士通株式会社 ペ―ジテ―ブルエントリ無効化装置
JP2592958B2 (ja) * 1989-06-30 1997-03-19 キヤノン株式会社 液晶装置
US5471593A (en) * 1989-12-11 1995-11-28 Branigin; Michael H. Computer processor with an efficient means of executing many instructions simultaneously
US5317705A (en) * 1990-10-24 1994-05-31 International Business Machines Corporation Apparatus and method for TLB purge reduction in a multi-level machine system
US5423014A (en) * 1991-10-29 1995-06-06 Intel Corporation Instruction fetch unit with early instruction fetch mechanism
US5500948A (en) * 1991-10-29 1996-03-19 Intel Corporation Translating instruction pointer virtual addresses to physical addresses for accessing an instruction cache
JP3242161B2 (ja) * 1992-09-11 2001-12-25 株式会社日立製作所 データプロセッサ
US5615354A (en) * 1992-12-23 1997-03-25 International Business Machines Corporation Method and system for controlling references to system storage by overriding values
WO1994027215A1 (en) 1993-05-07 1994-11-24 Apple Computer, Inc. Method for decoding guest instructions for a host computer
DE69425310T2 (de) * 1993-10-18 2001-06-13 Via-Cyrix, Inc. Mikrosteuereinheit für einen superpipeline-superskalaren Mikroprozessor
JP2806778B2 (ja) * 1994-01-28 1998-09-30 甲府日本電気株式会社 変換索引バッファクリア命令処理方式
WO1995031783A1 (de) * 1994-05-11 1995-11-23 Gmd - Forschungszentrum Informationstechnik Gmbh Speichervorrichtung zum speichern von daten
US5551013A (en) 1994-06-03 1996-08-27 International Business Machines Corporation Multiprocessor for hardware emulation
JP2842313B2 (ja) * 1995-07-13 1999-01-06 日本電気株式会社 情報処理装置
US5790825A (en) 1995-11-08 1998-08-04 Apple Computer, Inc. Method for emulating guest instructions on a host computer through dynamic recompilation of host instructions
US5761743A (en) * 1996-06-28 1998-06-09 Marmon Holdings, Inc. Finger cot and method of manufacturing finger cot
US5761734A (en) * 1996-08-13 1998-06-02 International Business Machines Corporation Token-based serialisation of instructions in a multiprocessor system
US5782029A (en) * 1996-09-25 1998-07-21 Saf T Lok Corporation Firearm safety mechanism
JPH10301814A (ja) * 1997-04-23 1998-11-13 Hitachi Ltd 情報処理システム
US6009261A (en) 1997-12-16 1999-12-28 International Business Machines Corporation Preprocessing of stored target routines for emulating incompatible instructions on a target processor
US6079013A (en) * 1998-04-30 2000-06-20 International Business Machines Corporation Multiprocessor serialization with early release of processors
US6119219A (en) * 1998-04-30 2000-09-12 International Business Machines Corporation System serialization with early release of individual processor
US6199219B1 (en) 1998-05-08 2001-03-13 Howard Silken Device to facilitate removal of a helmet face mask
US6308255B1 (en) * 1998-05-26 2001-10-23 Advanced Micro Devices, Inc. Symmetrical multiprocessing bus and chipset used for coprocessor support allowing non-native code to run in a system
US6119204A (en) * 1998-06-30 2000-09-12 International Business Machines Corporation Data processing system and method for maintaining translation lookaside buffer TLB coherency without enforcing complete instruction serialization
US6978357B1 (en) 1998-07-24 2005-12-20 Intel Corporation Method and apparatus for performing cache segment flush and cache segment invalidation operations
US6463582B1 (en) 1998-10-21 2002-10-08 Fujitsu Limited Dynamic optimizing object code translator for architecture emulation and dynamic optimizing object code translation method
GB9825102D0 (en) * 1998-11-16 1999-01-13 Insignia Solutions Plc Computer system
US6467007B1 (en) * 1999-05-19 2002-10-15 International Business Machines Corporation Processor reset generated via memory access interrupt
US6587964B1 (en) * 2000-02-18 2003-07-01 Hewlett-Packard Development Company, L.P. Transparent software emulation as an alternative to hardware bus lock
US6604187B1 (en) * 2000-06-19 2003-08-05 Advanced Micro Devices, Inc. Providing global translations with address space numbers
US6651132B1 (en) * 2000-07-17 2003-11-18 Microsoft Corporation System and method for emulating the operation of a translation look-aside buffer
EP1182570A3 (en) 2000-08-21 2004-08-04 Texas Instruments Incorporated TLB with resource ID field
US6684305B1 (en) 2001-04-24 2004-01-27 Advanced Micro Devices, Inc. Multiprocessor system implementing virtual memory using a shared memory, and a page replacement method for maintaining paged memory coherence
US6715050B2 (en) * 2001-05-31 2004-03-30 Oracle International Corporation Storage access keys
US6801993B2 (en) * 2001-09-28 2004-10-05 International Business Machines Corporation Table offset for shortening translation tables from their beginnings
US6931471B2 (en) * 2002-04-04 2005-08-16 International Business Machines Corporation Method, apparatus, and computer program product for migrating data subject to access by input/output devices
US7197585B2 (en) * 2002-09-30 2007-03-27 International Business Machines Corporation Method and apparatus for managing the execution of a broadcast instruction on a guest processor
JP3936672B2 (ja) * 2003-04-30 2007-06-27 富士通株式会社 マイクロプロセッサ
US7530067B2 (en) * 2003-05-12 2009-05-05 International Business Machines Corporation Filtering processor requests based on identifiers
US7284100B2 (en) 2003-05-12 2007-10-16 International Business Machines Corporation Invalidating storage, clearing buffer entries, and an instruction therefor
US7356710B2 (en) * 2003-05-12 2008-04-08 International Business Machines Corporation Security message authentication control instruction

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