JP2006523347A5 - - Google Patents

Download PDF

Info

Publication number
JP2006523347A5
JP2006523347A5 JP2006508658A JP2006508658A JP2006523347A5 JP 2006523347 A5 JP2006523347 A5 JP 2006523347A5 JP 2006508658 A JP2006508658 A JP 2006508658A JP 2006508658 A JP2006508658 A JP 2006508658A JP 2006523347 A5 JP2006523347 A5 JP 2006523347A5
Authority
JP
Japan
Prior art keywords
authority
access
indicator
bus
peripheral device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2006508658A
Other languages
English (en)
Japanese (ja)
Other versions
JP2006523347A (ja
Filing date
Publication date
Priority claimed from US10/384,024 external-priority patent/US7434264B2/en
Application filed filed Critical
Publication of JP2006523347A publication Critical patent/JP2006523347A/ja
Publication of JP2006523347A5 publication Critical patent/JP2006523347A5/ja
Pending legal-status Critical Current

Links

JP2006508658A 2003-03-07 2004-02-04 周辺装置アクセス保護を有するデータ処理システムおよびその方法 Pending JP2006523347A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/384,024 US7434264B2 (en) 2003-03-07 2003-03-07 Data processing system with peripheral access protection and method therefor
PCT/US2004/003101 WO2004081707A2 (en) 2003-03-07 2004-02-04 Data processing system with peripheral access protection and method therefor

Publications (2)

Publication Number Publication Date
JP2006523347A JP2006523347A (ja) 2006-10-12
JP2006523347A5 true JP2006523347A5 (enExample) 2007-03-22

Family

ID=32927178

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006508658A Pending JP2006523347A (ja) 2003-03-07 2004-02-04 周辺装置アクセス保護を有するデータ処理システムおよびその方法

Country Status (7)

Country Link
US (1) US7434264B2 (enExample)
EP (1) EP1604482A4 (enExample)
JP (1) JP2006523347A (enExample)
KR (1) KR20050113638A (enExample)
CN (1) CN1759557A (enExample)
TW (1) TW200417869A (enExample)
WO (1) WO2004081707A2 (enExample)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7444668B2 (en) * 2003-05-29 2008-10-28 Freescale Semiconductor, Inc. Method and apparatus for determining access permission
AU2004258511B2 (en) * 2003-07-03 2008-03-13 Conduent Business Services, Llc System and method for electronically managing composite documents
US7620807B1 (en) * 2004-02-11 2009-11-17 At&T Corp. Method and apparatus for automatically constructing application signatures
US8332653B2 (en) * 2004-10-22 2012-12-11 Broadcom Corporation Secure processing environment
WO2007000726A2 (en) * 2005-06-28 2007-01-04 Nxp B.V. Electronic device
US7761914B2 (en) * 2005-10-21 2010-07-20 Oracle International Corporation Method and apparatus for facilitating adjustment of an audit state in a computing environment
WO2007083278A1 (en) * 2006-01-20 2007-07-26 Nokia Corporation Distributed (modular) internal architecture
US8001591B2 (en) * 2006-01-31 2011-08-16 Freescale Semiconductor, Inc. Distributed resource access protection
US8949312B2 (en) * 2006-05-25 2015-02-03 Red Hat, Inc. Updating clients from a server
JP2007334432A (ja) * 2006-06-12 2007-12-27 Nec Electronics Corp 情報処理装置及びそのアクセス制御方法
US8464069B2 (en) * 2007-02-05 2013-06-11 Freescale Semiconductors, Inc. Secure data access methods and apparatus
US7992209B1 (en) 2007-07-19 2011-08-02 Owl Computing Technologies, Inc. Bilateral communication using multiple one-way data links
JP4939382B2 (ja) * 2007-11-28 2012-05-23 ルネサスエレクトロニクス株式会社 情報処理装置及びそのプログラム実行制御方法
JP4335940B2 (ja) 2007-11-29 2009-09-30 Ｎｅｃエレクトロニクス株式会社 データ処理装置及びデータ処理装置における周辺装置保護方法
JP5215655B2 (ja) * 2007-12-27 2013-06-19 ルネサスエレクトロニクス株式会社 データ処理装置及びデータ処理装置におけるバスアクセス制御方法
JP4514066B2 (ja) * 2008-04-28 2010-07-28 ルネサスエレクトロニクス株式会社 データ処理装置及びデータ処理装置におけるアクセス制御方法
US8447943B2 (en) * 2010-02-24 2013-05-21 Hitachi, Ltd. Reduction of I/O latency for writable copy-on-write snapshot function
JP2012099154A (ja) * 2012-02-22 2012-05-24 Renesas Electronics Corp 情報処理装置及びそのアクセス制御方法
US9092647B2 (en) 2013-03-07 2015-07-28 Freescale Semiconductor, Inc. Programmable direct memory access channels
US20140366131A1 (en) * 2013-06-07 2014-12-11 Andes Technology Corporation Secure bus system
US9836318B2 (en) * 2014-02-21 2017-12-05 Infineon Technologies Ag Safety hypervisor function
CN104899175A (zh) * 2014-03-04 2015-09-09 深圳市中兴微电子技术有限公司 一种基于片内总线协议的安全访问控制方法和装置
US9268970B2 (en) 2014-03-20 2016-02-23 Analog Devices, Inc. System and method for security-aware master
US10534739B2 (en) 2014-10-31 2020-01-14 Hewlett Packard Enterprise Development Lp Indicating a privilege level
US10095891B2 (en) * 2015-06-08 2018-10-09 Nuvoton Technology Corporation Secure access to peripheral devices over a bus
US20190196967A1 (en) * 2017-12-27 2019-06-27 Samsung Electronics Co., Ltd. Device including access controller, system on chip and system including the same
GB201807589D0 (en) * 2018-05-10 2018-06-27 Nordic Semiconductor Asa Memory access
CN114902223A (zh) * 2020-01-14 2022-08-12 华为技术有限公司 安全隔离方法、装置以及计算机系统
US11354172B2 (en) 2020-09-01 2022-06-07 Nxp Usa, Inc. Centralized access control circuit for controlling access to peripherals
JP7589584B2 (ja) * 2021-02-25 2024-11-26 セイコーエプソン株式会社 回路装置及び電子機器
WO2023129462A1 (en) * 2022-01-03 2023-07-06 Microchip Technology Incorporated Electronic device including access control identifiers for controlling access to peripherals
JP2024536673A (ja) * 2022-01-06 2024-10-08 マイクロチップ テクノロジー インコーポレイテッド 周辺機器のアクセス設定を示すビットマスクを用いた周辺機器アクセス制御
GB2624257B (en) * 2022-11-08 2024-11-06 Cirrus Logic Int Semiconductor Ltd Systems and methods for access protection of system peripherals

Family Cites Families (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB8308149D0 (en) * 1983-03-24 1983-05-05 Int Computers Ltd Computer system
US4763250A (en) * 1985-04-01 1988-08-09 Motorola, Inc. Paged memory management unit having variable number of translation table levels
US4809160A (en) * 1985-10-28 1989-02-28 Hewlett-Packard Company Privilege level checking instruction for implementing a secure hierarchical computer system
US4890223A (en) * 1986-01-15 1989-12-26 Motorola, Inc. Paged memory management unit which evaluates access permissions when creating translator
US4831581A (en) * 1987-02-24 1989-05-16 Digital Equipment Corporation Central processor unit for digital data processing system including cache management mechanism
US5140684A (en) * 1987-09-30 1992-08-18 Mitsubishi Denki Kabushiki Kaisha Access privilege-checking apparatus and method
US5454082A (en) * 1991-09-18 1995-09-26 Ncr Corporation System for preventing an unselected controller from transferring data via a first bus while concurrently permitting it to transfer data via a second bus
US5367695A (en) * 1991-09-27 1994-11-22 Sun Microsystems, Inc. Bus-to-bus interface for preventing data incoherence in a multiple processor computer system
US5423034A (en) * 1992-06-10 1995-06-06 Cohen-Levy; Leon Network file management with user determined hierarchical file structures and means for intercepting application program open and save commands for inputting and displaying user inputted descriptions of the location and content of files
US5450593A (en) * 1992-12-18 1995-09-12 International Business Machines Corp. Method and system for controlling access to objects in a data processing system based on temporal constraints
ATE278218T1 (de) * 1994-05-26 2004-10-15 Commw Of Australia Gesicherte rechnerarchitektur
US5553019A (en) * 1995-01-23 1996-09-03 Motorola, Inc. Write-once read-many memory using EEPROM cells
US5948097A (en) * 1996-08-29 1999-09-07 Intel Corporation Method and apparatus for changing privilege levels in a computer system without use of a call gate
JPH10143437A (ja) * 1996-11-14 1998-05-29 Toshiba Corp コンピュータシステムおよび動画像転送方法
JPH10187595A (ja) * 1996-12-26 1998-07-21 Nec Eng Ltd バスブリッジ
US5915086A (en) * 1997-04-03 1999-06-22 Oracle Corporation Hierarchical protection of seed data
JPH10307788A (ja) * 1997-05-07 1998-11-17 Fujitsu Ltd バスブリッジ
JPH10312357A (ja) * 1997-05-13 1998-11-24 Fujitsu Ltd データ処理システム
US6046676A (en) * 1997-11-14 2000-04-04 International Business Machines Corporation Self powered electronic memory identification tag with dual communication ports
US6061753A (en) * 1998-01-27 2000-05-09 Emc Corporation Apparatus and method of accessing target devices across a bus utilizing initiator identifiers
US6449652B1 (en) * 1999-01-04 2002-09-10 Emc Corporation Method and apparatus for providing secure access to a computer system resource
US6480941B1 (en) * 1999-02-23 2002-11-12 International Business Machines Corporation Secure partitioning of shared memory based multiprocessor system
US6470455B1 (en) * 1999-03-31 2002-10-22 International Business Machines Corporation Data processing system and method for prohibiting access to a SCSI bus
US6490642B1 (en) * 1999-08-12 2002-12-03 Mips Technologies, Inc. Locked read/write on separate address/data bus using write barrier
US7216345B1 (en) * 2000-04-07 2007-05-08 Hall Aluminum Llc Method and apparatus for protectively operating a data/information processing device
JP3407200B2 (ja) * 2000-08-08 2003-05-19 松下電器産業株式会社 アービトレーション装置および方法
US6694457B2 (en) * 2001-03-06 2004-02-17 Hewlett-Packard Development Company, L.P. System and method for monitoring execution of privileged instructions
US6662251B2 (en) * 2001-03-26 2003-12-09 International Business Machines Corporation Selective targeting of transactions to devices on a shared bus
EP1248179A1 (en) * 2001-04-03 2002-10-09 Hewlett-Packard Company Selective activation and deactivation of peripheral devices connected to a USB system
US7055038B2 (en) * 2001-05-07 2006-05-30 Ati International Srl Method and apparatus for maintaining secure and nonsecure data in a shared memory system
DE10126281A1 (de) * 2001-05-29 2002-12-12 Infineon Technologies Ag Programmgesteuerte Einheit
US6745307B2 (en) * 2001-10-31 2004-06-01 Hewlett-Packard Development Company, L.P. Method and system for privilege-level-access to memory within a computer
US7277972B2 (en) 2002-03-08 2007-10-02 Freescale Semiconductor, Inc. Data processing system with peripheral access protection and method therefor
US6851056B2 (en) * 2002-04-18 2005-02-01 International Business Machines Corporation Control function employing a requesting master id and a data address to qualify data access within an integrated system

Similar Documents

Publication Publication Date Title
JP2006523347A5 (enExample)
US7434264B2 (en) Data processing system with peripheral access protection and method therefor
US10733313B2 (en) Counter integrity tree for memory security
EP1376305B1 (en) Secure hardware identifier (HWID) for use in a digital rights management (DRM) system
EP2517112B1 (en) Mechanism for detecting a no-processor swap condition and modification of high speed bus calibration during boot
CN101853352B (zh) 程序执行设备
EP3662404B1 (en) Counter integrity tree for memory security
JP2013502665A (ja) 仮想マシン用エントロピー・プール
US20040068594A1 (en) Method and apparatus for data bus inversion
BRPI0613299A2 (pt) sistema para permitir acesso a conteúdo eletrÈnico e método para permitir acesso à conteúdo eletrÈnico
JP2009266085A (ja) データ処理装置及びデータ処理装置におけるアクセス制御方法
JP4370800B2 (ja) 音楽コンテンツ利用装置及びプログラム
JP2011181000A (ja) コントローラ、半導体記憶装置および半導体記憶装置の制御方法
JP2006186595A5 (enExample)
US20050203852A1 (en) Electronic musical apparatus for recording and reproducing music content
WO2012047199A1 (en) Modifying a length of an element to form an encryption key
TWI868416B (zh) 保護並管理金鑰的方法及裝置
US20240078326A1 (en) Technique for providing a trusted execution environment
US20240146546A1 (en) Module authentication
US7315928B2 (en) Apparatus and related method for accessing page mode flash memory
JP2004117344A5 (enExample)
JP2004038705A (ja) メモリ制御装置およびメモリアクセス方法
CN1741010A (zh) 优化哈希树完整性校验的方法和装置
JP2018180656A (ja) メモリコントローラとその制御方法
TWI820930B (zh) 用於更新產品版本的電子裝置及方法