JP2006500759A - 基板への相互接続を有する集積回路およびその製造方法 - Google Patents

基板への相互接続を有する集積回路およびその製造方法 Download PDF

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Publication number
JP2006500759A
JP2006500759A JP2003539091A JP2003539091A JP2006500759A JP 2006500759 A JP2006500759 A JP 2006500759A JP 2003539091 A JP2003539091 A JP 2003539091A JP 2003539091 A JP2003539091 A JP 2003539091A JP 2006500759 A JP2006500759 A JP 2006500759A
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JP
Japan
Prior art keywords
conductive
region
dielectric
doped
layer
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Pending
Application number
JP2003539091A
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English (en)
Japanese (ja)
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JP2006500759A5 (enExample
Inventor
エム． リーバー、ダグラス
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NXP USA Inc
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NXP USA Inc
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Application filed by NXP USA Inc filed Critical NXP USA Inc
Publication of JP2006500759A publication Critical patent/JP2006500759A/ja
Publication of JP2006500759A5 publication Critical patent/JP2006500759A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0149—Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Memories (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2003539091A 2001-10-22 2002-09-27 基板への相互接続を有する集積回路およびその製造方法 Pending JP2006500759A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/986,232 US6555915B1 (en) 2001-10-22 2001-10-22 Integrated circuit having interconnect to a substrate and method therefor
PCT/US2002/030337 WO2003036702A2 (en) 2001-10-22 2002-09-27 Integrated circuit having interconnect to a substrate and method therefor

Publications (2)

Publication Number Publication Date
JP2006500759A true JP2006500759A (ja) 2006-01-05
JP2006500759A5 JP2006500759A5 (enExample) 2009-11-05

Family

ID=25532216

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003539091A Pending JP2006500759A (ja) 2001-10-22 2002-09-27 基板への相互接続を有する集積回路およびその製造方法

Country Status (7)

Country Link
US (1) US6555915B1 (enExample)
EP (1) EP1479101A2 (enExample)
JP (1) JP2006500759A (enExample)
KR (1) KR20040048985A (enExample)
CN (1) CN1326210C (enExample)
AU (1) AU2002327714A1 (enExample)
WO (1) WO2003036702A2 (enExample)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016010053A1 (ja) * 2014-07-14 2016-01-21 矢崎総業株式会社 電気素子
JP2016020524A (ja) * 2014-07-14 2016-02-04 矢崎総業株式会社 電気素子
JP2016020535A (ja) * 2014-07-15 2016-02-04 矢崎総業株式会社 端子及びコネクタ
JP2016060928A (ja) * 2014-09-16 2016-04-25 矢崎総業株式会社 メッキ材及び端子金具
JP2016084500A (ja) * 2014-10-24 2016-05-19 矢崎総業株式会社 板状導電体及び板状導電体の表面処理方法

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003031801A (ja) * 2001-07-16 2003-01-31 Oki Electric Ind Co Ltd 電界効果型トランジスタの製造方法
US20040121524A1 (en) * 2002-12-20 2004-06-24 Micron Technology, Inc. Apparatus and method for controlling diffusion
US7297617B2 (en) * 2003-04-22 2007-11-20 Micron Technology, Inc. Method for controlling diffusion in semiconductor regions
US7654221B2 (en) * 2003-10-06 2010-02-02 Applied Materials, Inc. Apparatus for electroless deposition of metals onto semiconductor substrates
US7297605B2 (en) * 2004-05-10 2007-11-20 Texas Instruments Incorporated Source/drain extension implant process for use with short time anneals
DE102004038369B4 (de) * 2004-08-06 2018-04-05 Austriamicrosystems Ag Hochvolt-NMOS-Transistor und Herstellungsverfahren
US7150516B2 (en) * 2004-09-28 2006-12-19 Hewlett-Packard Development Company, L.P. Integrated circuit and method for manufacturing
KR100657142B1 (ko) * 2005-06-03 2006-12-13 매그나칩 반도체 유한회사 이미지센서의 픽셀 쉬링크를 위한 콘택 구조 및 그 제조방법
US10038081B1 (en) 2017-09-06 2018-07-31 Nxp Usa, Inc. Substrate contacts for a transistor
US10679987B2 (en) * 2017-10-31 2020-06-09 Taiwan Semiconductor Manufacturing Co., Ltd. Bootstrap metal-oxide-semiconductor (MOS) device integrated with a high voltage MOS (HVMOS) device and a high voltage junction termination (HVJT) device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03101255A (ja) * 1989-09-14 1991-04-26 Sony Corp 半導体装置
JPH04162519A (ja) * 1990-10-24 1992-06-08 Sony Corp Ｍｏｓ型半導体装置の製造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4843034A (en) * 1987-06-12 1989-06-27 Massachusetts Institute Of Technology Fabrication of interlayer conductive paths in integrated circuits
CA1276314C (en) * 1988-03-24 1990-11-13 Alexander Kalnitsky Silicon ion implanted semiconductor device
US5783469A (en) * 1996-12-10 1998-07-21 Advanced Micro Devices, Inc. Method for making nitrogenated gate structure for improved transistor performance
US6017829A (en) * 1997-04-01 2000-01-25 Micron Technology, Inc. Implanted conductor and methods of making
US6074904A (en) * 1998-04-21 2000-06-13 Advanced Micro Devices, Inc. Method and structure for isolating semiconductor devices after transistor formation
US6027961A (en) * 1998-06-30 2000-02-22 Motorola, Inc. CMOS semiconductor devices and method of formation
US6077748A (en) * 1998-10-19 2000-06-20 Advanced Micro Devices, Inc. Advanced trench isolation fabrication scheme for precision polysilicon gate control
KR100281908B1 (ko) * 1998-11-20 2001-02-15 김덕중 반도체소자 및 그 제조방법
JP3723410B2 (ja) * 2000-04-13 2005-12-07 三洋電機株式会社 半導体装置とその製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03101255A (ja) * 1989-09-14 1991-04-26 Sony Corp 半導体装置
JPH04162519A (ja) * 1990-10-24 1992-06-08 Sony Corp Ｍｏｓ型半導体装置の製造方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016010053A1 (ja) * 2014-07-14 2016-01-21 矢崎総業株式会社 電気素子
JP2016020524A (ja) * 2014-07-14 2016-02-04 矢崎総業株式会社 電気素子
JP2016020535A (ja) * 2014-07-15 2016-02-04 矢崎総業株式会社 端子及びコネクタ
JP2016060928A (ja) * 2014-09-16 2016-04-25 矢崎総業株式会社 メッキ材及び端子金具
JP2016084500A (ja) * 2014-10-24 2016-05-19 矢崎総業株式会社 板状導電体及び板状導電体の表面処理方法

Also Published As

Publication number Publication date
KR20040048985A (ko) 2004-06-10
WO2003036702A3 (en) 2003-11-06
WO2003036702A2 (en) 2003-05-01
CN1326210C (zh) 2007-07-11
EP1479101A2 (en) 2004-11-24
AU2002327714A1 (en) 2003-05-06
CN1592951A (zh) 2005-03-09
US6555915B1 (en) 2003-04-29
US20030075806A1 (en) 2003-04-24

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