JP2006339484A - Semiconductor device and its fabrication process - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To enlarge the area of a semiconductor layer formed on an insulator without using an SOI substrate. <P>SOLUTION: A second semiconductor layer 14 provided with a support 14a touching the surface of a semiconductor substrate 11 through an opening 13a is formed on a first semiconductor layer, the first semiconductor layer 13 is removed by touching etching gas or etching liquid to the first semiconductor layer 13 through a portion 17 for exposing the side face of the first semiconductor layer 13, and then a buried oxide film 20 is formed in a cavity 19 between the semiconductor substrate 11 and the second semiconductor layer 14 by performing thermal oxidation of the semiconductor substrate 11 and the second semiconductor layer 14. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device, and is particularly suitable for application to a field effect transistor formed on an SOI (Silicon On Insulator) substrate.

  Field effect transistors formed on an SOI substrate are attracting attention because of their ease of element isolation, latch-up freeness, and low source / drain junction capacitance. In particular, since a fully depleted SOI transistor can operate at low power consumption and at high speed and can be easily driven at a low voltage, research for operating the SOI transistor in a fully depleted mode has been actively conducted. Here, as the SOI substrate, for example, as disclosed in Patent Documents 1 and 2, a SIMOX (Separation by Implanted Oxgen) substrate or a bonded substrate is used.

Non-Patent Document 1 discloses a method by which an SOI transistor can be formed at a low cost by forming an SOI layer over a bulk substrate. In the method disclosed in Non-Patent Document 1, a Si / SiGe layer is formed on a Si substrate, and only the SiGe layer is selectively removed using a difference in selectivity between Si and SiGe. A cavity is formed between the Si substrate and the Si layer. Then, by performing thermal oxidation of Si exposed in the cavity, an SiO ₂ layer is embedded between the Si substrate and the Si layer, and a BOX layer is formed between the Si substrate and the Si layer.
JP 2002-299951 A Japanese Unexamined Patent Publication No. 2000-124092 T. T. et al. Sakai et al. “Separation by Bonding Si Islands (SBSI) for LSI Applications”, Second International GiGe Technology and Meeting Abstracts, pp. 230-231, May (2004)

  However, in order to manufacture a SIMOX substrate, high-concentration oxygen ions must be implanted into a silicon wafer. In order to manufacture a bonded substrate, it is necessary to polish the surface of the silicon wafer after bonding two silicon wafers. For this reason, the SOI transistor has a problem that the cost is increased as compared with a field effect transistor formed in a bulk semiconductor.

Also, in ion implantation and polishing, the variation in the thickness of the SOI layer is large, and it is difficult to stabilize the characteristics of the field effect transistor when the SOI layer is thinned in order to produce a fully depleted SOI transistor. There was a problem.
Further, in the method disclosed in Non-Patent Document 1, a region for supporting the Si layer on the Si substrate when the SiGe layer is removed and a region for bringing the etching solution into contact with the SiGe layer under the Si layer are formed in Si. Must be secured around the layer. For this reason, there is a problem that the area of a useless portion that cannot be used as an active region is increased, which hinders integration of transistors.

  In view of the above, an object of the present invention is to provide a semiconductor device and a method for manufacturing the semiconductor device that can increase the area of a semiconductor layer formed on an insulator without using an SOI substrate.

  In order to solve the above-described problem, according to a semiconductor device of one embodiment of the present invention, a semiconductor layer formed by epitaxial growth on a semiconductor substrate and embedded between the semiconductor substrate and the semiconductor layer A buried insulating layer; a gate electrode formed on the semiconductor layer; a source layer formed on the semiconductor layer and disposed on one side of the gate electrode; formed on the semiconductor layer; A drain layer disposed on the other side, wherein the buried insulating layer includes an oxide film in which a part of the semiconductor layer is thermally oxidized in a state where a part of the semiconductor layer is in contact with the semiconductor substrate It is characterized by comprising.

  Thereby, by utilizing a part of the semiconductor layer, the semiconductor layer can be supported on the semiconductor substrate with a gap between the semiconductor layer and the semiconductor substrate. For this reason, in order to support the semiconductor layer on the semiconductor substrate, it is not necessary to secure a region for arranging the support around the semiconductor layer, and the area of the semiconductor layer formed on the insulator can be increased. It becomes. For this reason, it is possible to form an SOI transistor on a semiconductor layer without using an SOI substrate, it is possible to reduce the price of the SOI transistor, and relax restrictions on the size and layout of the SOI transistor. However, the integration degree of the SOI transistor can be improved.

  In addition, according to the method for manufacturing a semiconductor device of one embodiment of the present invention, the step of forming the first semiconductor layer on a part of the surface of the semiconductor substrate, and the second semiconductor having an etching rate smaller than that of the first semiconductor layer. Forming a layer on the first semiconductor layer such that a part of the layer contacts the surface of the semiconductor substrate, and forming an exposed portion exposing a part of the first semiconductor layer from the second semiconductor layer. A step of selectively etching the first semiconductor layer through the exposed portion to form a cavity from which the first semiconductor layer has been removed under the second semiconductor layer; and the second semiconductor Forming a buried insulating layer embedded in the cavity while thermally oxidizing a portion of the layer contacting the semiconductor substrate; and forming a gate electrode on the second semiconductor layer via a gate insulating film And the above Characterized in that it comprises a source layer disposed so as to sandwich the gate electrode and a step of forming a drain layer on the second semiconductor layer.

  As a result, even when the second semiconductor layer is stacked on the first semiconductor layer, it becomes possible to contact the etching gas or the etchant with the first semiconductor layer through the exposed portion, leaving the second semiconductor layer. The first semiconductor layer can be removed using the difference in selectivity between the first and second semiconductor layers, and a buried insulating layer embedded in the cavity under the second semiconductor layer is formed. can do. Further, a part of the second semiconductor layer formed on the first semiconductor layer is brought into contact with the surface of the semiconductor substrate, whereby the second semiconductor layer is supported on the semiconductor substrate by using a part of the second semiconductor layer. The support can be configured, and it is not necessary to secure a region for arranging the support around the second semiconductor layer. Further, when forming the buried insulating layer embedded in the cavity, the support is configured using a part of the second semiconductor layer by thermally oxidizing the portion where the second semiconductor layer contacts the semiconductor substrate. In this case, the second semiconductor layer can be completely separated from the semiconductor substrate. For this reason, it becomes possible to arrange the second semiconductor layer on the buried insulating layer while making it possible to enlarge the area of the second semiconductor layer, and without damaging the quality of the second semiconductor layer. Insulation between the semiconductor substrate and the semiconductor substrate can be achieved. As a result, it is possible to form an SOI transistor on the second semiconductor layer without using an SOI substrate, and it is possible to reduce the cost of the SOI transistor and to restrict the size and layout of the SOI transistor. The integration degree of the SOI transistor can be improved while relaxing the above.

  In addition, according to the method for manufacturing a semiconductor device according to one embodiment of the present invention, by performing selective epitaxial growth using the oxide film as a mask, the step of forming the oxide film arranged in the form of dots on the semiconductor substrate, Forming a first semiconductor layer on a part of a surface of the semiconductor substrate; removing the oxide film from the semiconductor substrate on which the first semiconductor layer is formed; and removing the oxide film from the semiconductor substrate. Forming a second semiconductor layer on the first semiconductor layer by epitaxial growth, the second semiconductor layer being disposed so as to be in contact and having a lower etching rate than the first semiconductor layer; and a part of the first semiconductor layer being formed by the second semiconductor layer. Forming an exposed portion to be exposed from the semiconductor layer; and selectively etching the first semiconductor layer through the exposed portion, thereby removing the cavity from which the first semiconductor layer has been removed. Forming under a semiconductor layer, forming a buried insulating layer embedded in the cavity while thermally oxidizing a portion where the second semiconductor layer is in contact with the semiconductor substrate, and on the second semiconductor layer Forming a gate electrode with a gate insulating film interposed therebetween, and forming a source layer and a drain layer disposed so as to sandwich the gate electrode in the second semiconductor layer.

  Accordingly, the second semiconductor layer can be supported at a plurality of locations, and the area of the portion where the second semiconductor layer is in contact with the semiconductor substrate can be reduced. Therefore, even when the support is configured using a part of the second semiconductor layer, the second semiconductor layer can be stably supported on the semiconductor substrate, and the thickness of the second semiconductor layer can be increased. It is possible to completely separate the second semiconductor layer from the semiconductor substrate by thermal oxidation of the second semiconductor layer while ensuring the above. As a result, it is possible to form an SOI transistor on the second semiconductor layer without using an SOI substrate, and it is possible to reduce the cost of the SOI transistor and to restrict the size and layout of the SOI transistor. The integration degree of the SOI transistor can be improved while relaxing the above.

  According to the method for manufacturing a semiconductor device of one embodiment of the present invention, the step of forming an antioxidant film on the second semiconductor layer, and the oxidation on the second semiconductor layer after forming the buried insulating layer are performed. A step of depositing a film, a step of planarizing the oxide film by thinning the insulating film using the antioxidant film as a stopper, and a step of removing the antioxidant film after planarizing the oxide film It is characterized by providing.

  This makes it possible to stably expose the surface of the second semiconductor layer after embedding the buried insulating layer between the semiconductor substrate and the semiconductor layer, and to increase the thickness around the second semiconductor layer. An oxide film can be formed. For this reason, when the gate electrode is disposed on the second semiconductor layer, even when both ends of the gate electrode are covered with the oxide film, leakage current to the semiconductor substrate and the source / drain layer due to insulation failure is prevented. be able to.

According to the method for manufacturing a semiconductor device of one embodiment of the present invention, the semiconductor substrate and the second semiconductor layer are single crystal Si, and the first semiconductor layer is single crystal SiGe.
Thus, it is possible to make the lattice matching between the semiconductor substrate, the first semiconductor layer, and the second semiconductor layer, and to increase the etching selectivity of the first semiconductor layer compared to the semiconductor substrate and the second semiconductor layer. It becomes possible. Therefore, the second semiconductor layer with good crystal quality can be formed on the first semiconductor layer, and the second semiconductor layer can be formed even when the support is configured by using a part of the second semiconductor layer. It becomes possible to stably maintain the semiconductor substrate, and it is possible to achieve insulation between the second semiconductor layer and the semiconductor substrate without deteriorating the quality of the second semiconductor layer.

Hereinafter, a semiconductor device and a manufacturing method thereof according to embodiments of the present invention will be described with reference to the drawings.
FIGS. 1A to 10A are perspective views showing a method for manufacturing a semiconductor device according to an embodiment of the present invention, and FIGS. 1B to 10B are FIGS. Cross-sectional views cut along lines A10-A10 ′ to A19-A19 ′ in FIG. 10A, and FIGS. 1C to 10C are B10− in FIGS. 1A to 10A, respectively. It is sectional drawing cut | disconnected by the B10'-B19-B19 'line | wire, respectively.

In FIG. 1, an oxide film 12 is formed on the entire surface of the semiconductor substrate 11 by a method such as thermal oxidation. Then, by patterning the oxide film 12 using a photolithography technique and an etching technique, the oxide film 12 is arranged on the semiconductor substrate 11 in a scattered manner. Note that the size of the oxide film 12 arranged in the form of dots is preferably about several tens of nm.
Next, as shown in FIG. 2, by performing selective epitaxial growth using the oxide film 12 as a mask, the first semiconductor layer 13 having the opening 13 a corresponding to the oxide film 12 is formed on the semiconductor substrate 11. Here, in the selective epitaxial growth, the first semiconductor layer 13 is formed by thermal CVD while supplying a source gas for forming the first semiconductor layer 13. A single crystal semiconductor layer can be formed as the first semiconductor layer 13 on the semiconductor substrate 11 on which the oxide film 12 is disposed. Here, when the single crystal semiconductor layer is formed on the semiconductor substrate 11, the amorphous semiconductor layer is formed on the oxide film 12. However, the amorphous semiconductor layer is formed on the semiconductor substrate 11 by exposing the amorphous semiconductor layer to chlorine gas or the like. The amorphous semiconductor layer can be decomposed and removed while leaving the formed single crystal semiconductor layer. Therefore, by performing selective epitaxial growth, the first semiconductor layer 13 can be selectively formed on the semiconductor substrate 11 so that the semiconductor layer is not formed on the oxide film 12.

  Next, as shown in FIG. 3, after forming the first semiconductor layer 13, the oxide film 12 present on the semiconductor substrate 11 is removed. Then, by performing epitaxial growth, a second semiconductor layer 14 provided with a support 14a that contacts the surface of the semiconductor substrate 11 through the opening 13a is formed on the first semiconductor layer. The first semiconductor layer 13 can be made of a material having an etching rate larger than that of the semiconductor substrate 11 and the second semiconductor layer 14, and the material of the semiconductor substrate 11, the first semiconductor layer 13 and the second semiconductor layer 14 can be used. For example, a combination selected from Si, Ge, SiGe, SiC, SiSn, PbS, GaAs, InP, GaP, GaN, ZnSe, and the like can be used. In particular, when the semiconductor substrate 11 is Si, it is preferable to use SiGe as the first semiconductor layer 13 and Si as the second semiconductor layer 14. Accordingly, it is possible to secure a selection ratio between the first semiconductor layer 13 and the second semiconductor layer 14 while enabling lattice matching between the first semiconductor layer 13 and the second semiconductor layer 14. it can. Note that as the first semiconductor layer 13, a polycrystalline semiconductor layer, an amorphous semiconductor layer, or a porous semiconductor layer may be used in addition to the single crystal semiconductor layer. In place of the first semiconductor layer 13, a metal oxide film such as γ-aluminum oxide capable of forming a single crystal semiconductor layer by epitaxial growth may be used. Moreover, the film thickness of the 1st semiconductor layer 13 and the 2nd semiconductor layer 14 can be about 1-100 nm, for example.

Next, as shown in FIG. 4, a pad oxide film 15 is formed on the surface of the second semiconductor layer 14 by thermal oxidation of the second semiconductor layer 14. Then, an antioxidant film 16 is formed on the entire surface of the pad oxide film 15 by a method such as CVD. For example, a silicon nitride film can be used as the antioxidant film 16.
Next, as shown in FIG. 5, the first semiconductor layer is patterned by patterning the antioxidant film 16, the pad oxide film 15, the second semiconductor layer 14, and the first semiconductor layer 13 using a photolithography technique and an etching technique. An exposed portion 17 that exposes the 13 side surfaces is formed. When forming the exposed portion 17 that exposes the side surface of the first semiconductor layer 13, it is not always necessary to expose a part of the surface of the semiconductor substrate 11, and etching is stopped on the surface of the first semiconductor layer 13. Alternatively, the first semiconductor layer 13 may be over-etched to form a recess in the first semiconductor layer 13.

Next, as shown in FIG. 6, the first semiconductor layer 13 is etched by bringing an etching gas or an etchant into contact with the first semiconductor layer 13 through an exposed portion 17 that exposes the side surface of the first semiconductor layer 13. By removing, a cavity 19 is formed between the semiconductor substrate 11 and the second semiconductor layer 14.
Here, by forming the exposed portion 17 that exposes the side surface of the first semiconductor layer 13, even when the second semiconductor layer 14 is stacked on the first semiconductor layer 13, the etching gas is passed through the exposed portion 17. Alternatively, the etching solution can be brought into contact with the first semiconductor layer 13, and the difference in selectivity between the first semiconductor layer 13 and the second semiconductor layer 14 is utilized while leaving the second semiconductor layer 14. The first semiconductor layer 13 can be removed. Further, a part of the second semiconductor layer 14 formed on the first semiconductor layer 13 is brought into contact with the surface of the semiconductor substrate 11, so that the second semiconductor layer 14 is made into a semiconductor by using a part of the second semiconductor layer 14. It is possible to configure the support 14a that is supported on the substrate 11. For this reason, it is not necessary to ensure the area | region which arrange | positions the support body 14a around the 2nd semiconductor layer 14, and it becomes possible to expand the area of the 2nd semiconductor layer 14. FIG.

  In the case where the semiconductor substrate 11 and the second semiconductor layer 14 are Si and the first semiconductor layer 13 is SiGe, it is preferable to use hydrofluoric acid as an etchant for the first semiconductor layer 13. As a result, a Si / SiGe selection ratio of about 1: 100 to 1000 can be obtained, and the first semiconductor layer 13 can be removed while suppressing overetching of the semiconductor substrate 11 and the second semiconductor layer 14. It becomes. Further, as the etchant for the first semiconductor layer 13, hydrofluoric acid overwater, ammonia overwater, or hydrofluoric acid overwater may be used.

  Further, before the first semiconductor layer 13 is removed by etching, the first semiconductor layer 13 may be made porous by a method such as anodic oxidation, or by ion implantation into the first semiconductor layer 13, The first semiconductor layer 13 may be made amorphous. Thereby, the etching rate of the first semiconductor layer 13 can be increased, and the etching area of the first semiconductor layer 13 can be expanded.

  Next, as shown in FIG. 7, the buried oxide film 20 is formed in the cavity 19 between the semiconductor substrate 11 and the second semiconductor layer 14 by performing thermal oxidation of the semiconductor substrate 11 and the second semiconductor layer 14. To do. Here, when the buried oxide film 20 is formed in the cavity 19 between the semiconductor substrate 11 and the second semiconductor layer 14, the support 14a made of a part of the second semiconductor layer 14 is eliminated by thermal oxidation, It is preferable to completely separate the semiconductor substrate 11 and the second semiconductor layer 14 by the buried oxide film 20. As a result, even when the support 14 a is configured by using a part of the second semiconductor layer 14, the second semiconductor layer 14 is disposed on the buried oxide film 20 without deteriorating the quality of the second semiconductor layer 14. Thus, it is possible to increase the area of the second semiconductor layer 14 and to insulate between the second semiconductor layer 14 and the semiconductor substrate 11. As a result, an SOI transistor can be formed on the second semiconductor layer 14 without using an SOI substrate, so that the SOI transistor can be reduced in price and the size and layout of the SOI transistor can be reduced. The integration degree of the SOI transistor can be improved while relaxing the restrictions.

  In the case where the buried oxide film 20 is formed by thermal oxidation of the semiconductor substrate 11 and the second semiconductor layer 14, it is preferable to use low-temperature wet oxidation that is reaction-controlled in order to improve embeddability. At that time, the side wall of the second semiconductor layer 14 is also thermally oxidized. Alternatively, after the buried oxide film 20 is formed in the cavity 19, high temperature annealing at 1100 ° C. or higher may be performed. Thereby, the buried oxide film 20 can be reflowed, the stress of the buried oxide film 20 can be relieved, and the interface state at the boundary with the second semiconductor layer 14 can be reduced. Further, the buried oxide film 20 may be formed so as to fill all the cavities 19 or may be formed so that a part of the cavities 19 remains.

  Next, as shown in FIG. 8, an oxide film 21 is deposited on the entire surface of the semiconductor substrate 11 by a method such as CVD. Then, the oxide film 21 is flattened by thinning the oxide film 21 by a method such as etch back or CMP (chemical mechanical polishing). Here, when the oxide film 21 is planarized, the antioxidant film 16 can be used as an etchback or CMP stopper. Therefore, the thick oxide film 21 can be formed around the second semiconductor layer 14 without damaging the second semiconductor layer 14, and the gate electrode 32 of FIG. Even when both ends of the gate electrode 32 are covered with the oxide film 21 when the gate electrode 32 is disposed, leakage current to the semiconductor substrate 11 and the source / drain layers 35a and 35b due to defective insulation can be prevented.

Next, as shown in FIG. 9, the surface of the second semiconductor layer 14 is exposed by removing the antioxidant film 16 and the pad oxide film 15 on the second semiconductor layer 14.
Next, as shown in FIG. 10, the surface of the second semiconductor layer 14 is thermally oxidized to form a gate insulating film 31 on the surface of the second semiconductor layer 14. Then, a polycrystalline silicon layer is formed on the second semiconductor layer 14 on which the gate insulating film 31 is formed by a method such as CVD. Then, the gate electrode 32 is formed on the second semiconductor layer 14 by patterning the polycrystalline silicon layer using a photolithography technique and an etching technique.

  Next, using the gate electrode 32 as a mask, impurities such as As, P, and B are ion-implanted into the second semiconductor layer 14 to thereby form LDDs composed of low-concentration impurity introduction layers respectively disposed on both sides of the gate electrode 32. Layers 33 a and 33 b are formed on the second semiconductor layer 14. Then, an insulating layer is formed on the second semiconductor layer 14 on which the LDD layers 33a and 33b are formed by a method such as CVD, and the insulating layer is etched back using anisotropic etching such as RIE. Side walls 34 a and 34 b are formed on the side walls of the electrode 32. Then, by using the gate electrode 32 and the sidewalls 34a and 34b as a mask, impurities such as As, P, and B are ion-implanted into the second semiconductor layer 14, thereby arranging the high-concentration impurities so as to sandwich the gate electrode 32. Source / drain layers 35 a and 35 b made of introduction layers are formed in the second semiconductor layer 14.

The figure which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. The figure which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. The figure which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. The figure which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. The figure which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. The figure which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. The figure which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. The figure which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. The figure which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. The figure which shows the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 11 Semiconductor substrate, 12 Oxide film, 13 1st semiconductor layer, 13a Opening part, 14 2nd semiconductor layer, 14a Support body, 15 Pad oxide film, 16 Antioxidation film, 17 Exposed part, 19 Cavity part, 20 Embedded oxide film , 21 Oxide film, 31 Gate insulating film, 32 Gate electrode, 33a, 33b, LDD layer, 34a, 34b Side wall spacer, 35a, 35b Source / drain layer

Claims (5)

A semiconductor layer formed by epitaxial growth on a semiconductor substrate;
A buried insulating layer buried between the semiconductor substrate and the semiconductor layer;
A gate electrode formed on the semiconductor layer;
A source layer formed on the semiconductor layer and disposed on one side of the gate electrode;
A drain layer formed on the semiconductor layer and disposed on the other side of the gate electrode;
The semiconductor device according to claim 1, wherein the buried insulating layer includes an oxide film in which a part of the semiconductor layer is thermally oxidized in a state where a part of the semiconductor layer is in contact with the semiconductor substrate. Forming a first semiconductor layer on a part of the surface of the semiconductor substrate;
Forming a second semiconductor layer having an etching rate smaller than that of the first semiconductor layer on the first semiconductor layer so that a part thereof is in contact with the surface of the semiconductor substrate;
Forming an exposed portion for exposing a part of the first semiconductor layer from the second semiconductor layer;
Forming a cavity under the second semiconductor layer by selectively etching the first semiconductor layer through the exposed portion, and removing the first semiconductor layer;
Forming a buried insulating layer buried in the cavity while thermally oxidizing a portion where the second semiconductor layer is in contact with the semiconductor substrate;
Forming a gate electrode on the second semiconductor layer through a gate insulating film;
Forming a source layer and a drain layer arranged so as to sandwich the gate electrode in the second semiconductor layer. Forming an oxide film arranged in the form of scattered dots on a semiconductor substrate;
Forming a first semiconductor layer on part of the surface of the semiconductor substrate by performing selective epitaxial growth using the oxide film as a mask;
Removing the oxide film from the semiconductor substrate on which the first semiconductor layer is formed;
Forming a second semiconductor layer on the first semiconductor layer by epitaxial growth, the second semiconductor layer being disposed in contact with the semiconductor substrate from which the oxide film has been removed and having an etching rate smaller than that of the first semiconductor layer;
Forming an exposed portion for exposing a part of the first semiconductor layer from the second semiconductor layer;
Forming a cavity under the second semiconductor layer by selectively etching the first semiconductor layer through the exposed portion, and removing the first semiconductor layer;
Forming a buried insulating layer buried in the cavity while thermally oxidizing a portion where the second semiconductor layer is in contact with the semiconductor substrate;
Forming a gate electrode on the second semiconductor layer through a gate insulating film;
Forming a source layer and a drain layer arranged so as to sandwich the gate electrode in the second semiconductor layer. Forming an antioxidant film on the second semiconductor layer;
Depositing an oxide film on the second semiconductor layer after forming the buried insulating layer;
Flattening the oxide film by thinning the insulating film using the antioxidant film as a stopper;
The method for manufacturing a semiconductor device according to claim 3, further comprising a step of removing the antioxidant film after planarizing the oxide film.   5. The method of manufacturing a semiconductor substrate according to claim 2, wherein the semiconductor substrate and the second semiconductor layer are single crystal Si, and the first semiconductor layer is single crystal SiGe. 6.

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