JP2006303598A - シリアル通信用同期信号発生装置 - Google Patents
シリアル通信用同期信号発生装置 Download PDFInfo
- Publication number
- JP2006303598A JP2006303598A JP2005118438A JP2005118438A JP2006303598A JP 2006303598 A JP2006303598 A JP 2006303598A JP 2005118438 A JP2005118438 A JP 2005118438A JP 2005118438 A JP2005118438 A JP 2005118438A JP 2006303598 A JP2006303598 A JP 2006303598A
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- JP
- Japan
- Prior art keywords
- phase difference
- frequency
- signal
- circuit
- serial communication
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0079—Receiver details
- H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks
Abstract
【解決手段】同期クロック回路22(シリアル通信用同期信号発生装置)は、基準クロック回路220と、位相比較器221と、PLLフィルタ222と、VCO223と、分周回路224とから構成されている。そして、PLLフィルタ222は、位相差信号が位相差上下限値で決まる所定範囲以内のとき、前回の電圧信号を継続して出力する。これにより、所定周期毎の同期クロック(同期信号)の周波数の変化にともなって発生するノイズを抑える。
【選択図】図3
Description
Claims (3)
- 所定周波数の基準信号を発生する基準信号発生手段と、前記基準信号と帰還信号の位相を比較し、その位相差に応じた位相差信号を出力する位相比較手段と、前記位相差信号に基づいて、所定周期毎に、出力するシリアル通信用同期信号の周波数を調整する周波数調整手段と、前記シリアル通信用同期信号を帰還信号として前記位相比較手段に帰還する帰還手段とを備えたシリアル通信用同期信号発生装置において、
前記周波数調整手段は、前記位相差信号が位相差上限値以下、かつ、位相差下限値以上であるとき、前記シリアル通信用同期信号の周波数の調整を行わないことを特徴とするシリアル通信用同期信号発生装置。 - 前記周波数調整手段は、所定周期毎に、前記位相差信号に応じた制御信号を出力する制御手段と、前記制御信号に応じた周波数の前記シリアル通信用同期信号を出力する同期信号発生手段とを有し、
前記制御手段は、前記位相差信号が位相差上限値以下、かつ、位相差下限値以上であるとき、前回出力した制御信号を継続して出力することを特徴とする請求項1に記載のシリアル通信用同期信号発生装置。 - 前記位相差上限値及び前記位相差下限値の少なくともいずれかは、接続される外部装置によって設定されることを特徴とする請求項1又は2のいずれかに記載のシリアル通信用同期信号発生装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005118438A JP2006303598A (ja) | 2005-04-15 | 2005-04-15 | シリアル通信用同期信号発生装置 |
US11/402,592 US20060233292A1 (en) | 2005-04-15 | 2006-04-12 | Synchronizing signal generating device and method for serial communication |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005118438A JP2006303598A (ja) | 2005-04-15 | 2005-04-15 | シリアル通信用同期信号発生装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2006303598A true JP2006303598A (ja) | 2006-11-02 |
Family
ID=37108451
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005118438A Pending JP2006303598A (ja) | 2005-04-15 | 2005-04-15 | シリアル通信用同期信号発生装置 |
Country Status (2)
Country | Link |
---|---|
US (1) | US20060233292A1 (ja) |
JP (1) | JP2006303598A (ja) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4855129B2 (ja) * | 2006-04-26 | 2012-01-18 | ルネサスエレクトロニクス株式会社 | デジタル放送受信装置およびデジタル放送システム |
KR101219826B1 (ko) * | 2010-09-28 | 2013-01-18 | 현대자동차주식회사 | 차량의 에어백 컨트롤 유닛 평가용 신호제어장치 및 그 평가 방법, 차량의 평가용 에어백 컨트롤 유닛 및 그 신호처리방법, 차량의 에어백 컨트롤 유닛의 평가 시스템 및 그 평가 방법 |
DE102016226136A1 (de) * | 2016-12-23 | 2018-06-28 | Robert Bosch Gmbh | Verfahren zum Betreiben einer Sensoreinrichtung, Sensoreinrichtung |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06152581A (ja) * | 1992-11-10 | 1994-05-31 | Fujitsu Ltd | クロック供給装置 |
US5943382A (en) * | 1996-08-21 | 1999-08-24 | Neomagic Corp. | Dual-loop spread-spectrum clock generator with master PLL and slave voltage-modulation-locked loop |
JPH1168557A (ja) * | 1997-08-18 | 1999-03-09 | Advantest Corp | 基準周波数発生装置 |
US6337601B1 (en) * | 1999-12-08 | 2002-01-08 | Ericsson Inc. | Ring oscillator with jitter reset |
JP2002077125A (ja) * | 2000-09-01 | 2002-03-15 | Fujitsu Ltd | クロック同期方法及びクロック同期回路並びにその回路を用いた半導体装置 |
KR100856963B1 (ko) * | 2001-02-07 | 2008-09-04 | 그린라이츠 패밀리 트러스트 | 용량검출기가 달린 제어시스템 |
JP4138264B2 (ja) * | 2001-03-16 | 2008-08-27 | 富士通株式会社 | Pll周波数シンセサイザ |
JP3808343B2 (ja) * | 2001-10-03 | 2006-08-09 | 三菱電機株式会社 | Pll回路 |
JP4623546B2 (ja) * | 2003-05-30 | 2011-02-02 | 株式会社リコー | 電圧制御発振器、pll回路、パルス変調信号生成回路、半導体レーザ変調装置及び画像形成装置 |
US7430158B1 (en) * | 2004-12-13 | 2008-09-30 | Chris Tanner | Music player with adjustable pitch controller |
US7180377B1 (en) * | 2005-01-18 | 2007-02-20 | Silicon Clocks Inc. | Method and apparatus for a hybrid phase lock loop frequency synthesizer |
-
2005
- 2005-04-15 JP JP2005118438A patent/JP2006303598A/ja active Pending
-
2006
- 2006-04-12 US US11/402,592 patent/US20060233292A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
US20060233292A1 (en) | 2006-10-19 |
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