JP2006303554A - 論理レベル変換回路及びそれを用いた位相同期回路 - Google Patents

論理レベル変換回路及びそれを用いた位相同期回路 Download PDF

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Publication number
JP2006303554A
JP2006303554A JP2005117753A JP2005117753A JP2006303554A JP 2006303554 A JP2006303554 A JP 2006303554A JP 2005117753 A JP2005117753 A JP 2005117753A JP 2005117753 A JP2005117753 A JP 2005117753A JP 2006303554 A JP2006303554 A JP 2006303554A
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JP
Japan
Prior art keywords
signal
circuit
threshold
outputs
conversion circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2005117753A
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English (en)
Japanese (ja)
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JP2006303554A5 (enExample
Inventor
Takashi Kawamoto
高司 川本
Masaru Kokubo
優 小久保
Takashi Oshima
俊 大島
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Renesas Technology Corp
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Renesas Technology Corp
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Filing date
Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP2005117753A priority Critical patent/JP2006303554A/ja
Priority to TW095108888A priority patent/TW200642282A/zh
Priority to KR1020060033607A priority patent/KR20060109325A/ko
Priority to CNA2006100723472A priority patent/CN1848682A/zh
Priority to US11/403,968 priority patent/US7446614B2/en
Publication of JP2006303554A publication Critical patent/JP2006303554A/ja
Publication of JP2006303554A5 publication Critical patent/JP2006303554A5/ja
Priority to US12/243,553 priority patent/US20090096540A1/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0021Modifications of threshold
    • H03K19/0027Modifications of threshold in field effect transistor circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H03L7/23Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
JP2005117753A 2005-04-15 2005-04-15 論理レベル変換回路及びそれを用いた位相同期回路 Pending JP2006303554A (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2005117753A JP2006303554A (ja) 2005-04-15 2005-04-15 論理レベル変換回路及びそれを用いた位相同期回路
TW095108888A TW200642282A (en) 2005-04-15 2006-03-16 Logical level converter and phase locked loop using the same
KR1020060033607A KR20060109325A (ko) 2005-04-15 2006-04-13 논리 레벨 변환 회로 및 그것을 이용한 위상 동기 회로
CNA2006100723472A CN1848682A (zh) 2005-04-15 2006-04-14 逻辑电平转换电路和使用了它的相位同步电路
US11/403,968 US7446614B2 (en) 2005-04-15 2006-04-14 Logical level converter and phase locked loop using the same
US12/243,553 US20090096540A1 (en) 2005-04-15 2008-10-01 Logical level converter and phase locked loop using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005117753A JP2006303554A (ja) 2005-04-15 2005-04-15 論理レベル変換回路及びそれを用いた位相同期回路

Publications (2)

Publication Number Publication Date
JP2006303554A true JP2006303554A (ja) 2006-11-02
JP2006303554A5 JP2006303554A5 (enExample) 2008-01-17

Family

ID=37078079

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005117753A Pending JP2006303554A (ja) 2005-04-15 2005-04-15 論理レベル変換回路及びそれを用いた位相同期回路

Country Status (5)

Country Link
US (2) US7446614B2 (enExample)
JP (1) JP2006303554A (enExample)
KR (1) KR20060109325A (enExample)
CN (1) CN1848682A (enExample)
TW (1) TW200642282A (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010219882A (ja) * 2009-03-17 2010-09-30 Hitachi Ltd 信号レベル変換回路および位相同期回路
JP2010541322A (ja) * 2007-09-21 2010-12-24 クゥアルコム・インコーポレイテッド 信号追跡を行う信号生成器
US8385474B2 (en) 2007-09-21 2013-02-26 Qualcomm Incorporated Signal generator with adjustable frequency
US8446976B2 (en) 2007-09-21 2013-05-21 Qualcomm Incorporated Signal generator with adjustable phase

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7965805B2 (en) * 2007-09-21 2011-06-21 Qualcomm Incorporated Signal generator with signal tracking
CN100586022C (zh) * 2008-03-05 2010-01-27 钰创科技股份有限公司 可调整翻转点的反相器、或非门以及与非门
US9641113B2 (en) 2014-02-28 2017-05-02 General Electric Company System and method for controlling a power generation system based on PLL errors
CN119995534B (zh) * 2025-01-16 2025-10-17 中山大学 一种基于并行数字算法的高频数字锁相放大器及控制方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5778611A (en) * 1980-10-31 1982-05-17 Matsushita Electric Ind Co Ltd Digital signal reproducing method
JPS63217712A (ja) * 1987-03-05 1988-09-09 Matsushita Electric Ind Co Ltd デイジタル情報再生装置
JP2000078003A (ja) * 1998-08-28 2000-03-14 Seiko Epson Corp Pll回路
JP2001243715A (ja) * 2000-02-24 2001-09-07 Sony Corp 波形整形回路
JP2001358565A (ja) * 2000-06-13 2001-12-26 Hitachi Ltd 周波数可変発振回路およびそれを用いた位相同期回路
JP2003347936A (ja) * 2001-11-02 2003-12-05 Seiko Epson Corp クロック整形回路および電子機器

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3163484B2 (ja) 1990-09-29 2001-05-08 アンリツ株式会社 波形整形回路およびディジタル信号解析装置
US5210712A (en) 1990-09-29 1993-05-11 Anritsu Corporation Waveform shaping circuit and digital signal analyzing apparatus using the same
JP4167747B2 (ja) 1998-04-13 2008-10-22 株式会社ルネサステクノロジ 周波数可変発振回路及びそれを用いた位相同期回路

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5778611A (en) * 1980-10-31 1982-05-17 Matsushita Electric Ind Co Ltd Digital signal reproducing method
JPS63217712A (ja) * 1987-03-05 1988-09-09 Matsushita Electric Ind Co Ltd デイジタル情報再生装置
JP2000078003A (ja) * 1998-08-28 2000-03-14 Seiko Epson Corp Pll回路
JP2001243715A (ja) * 2000-02-24 2001-09-07 Sony Corp 波形整形回路
JP2001358565A (ja) * 2000-06-13 2001-12-26 Hitachi Ltd 周波数可変発振回路およびそれを用いた位相同期回路
JP2003347936A (ja) * 2001-11-02 2003-12-05 Seiko Epson Corp クロック整形回路および電子機器

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010541322A (ja) * 2007-09-21 2010-12-24 クゥアルコム・インコーポレイテッド 信号追跡を行う信号生成器
JP2010541321A (ja) * 2007-09-21 2010-12-24 クゥアルコム・インコーポレイテッド 調整可能位相を有する信号生成器
US8385474B2 (en) 2007-09-21 2013-02-26 Qualcomm Incorporated Signal generator with adjustable frequency
US8446976B2 (en) 2007-09-21 2013-05-21 Qualcomm Incorporated Signal generator with adjustable phase
JP2010219882A (ja) * 2009-03-17 2010-09-30 Hitachi Ltd 信号レベル変換回路および位相同期回路

Also Published As

Publication number Publication date
US7446614B2 (en) 2008-11-04
TW200642282A (en) 2006-12-01
US20060261873A1 (en) 2006-11-23
US20090096540A1 (en) 2009-04-16
CN1848682A (zh) 2006-10-18
KR20060109325A (ko) 2006-10-19

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