TW200642282A - Logical level converter and phase locked loop using the same - Google Patents

Logical level converter and phase locked loop using the same

Info

Publication number
TW200642282A
TW200642282A TW095108888A TW95108888A TW200642282A TW 200642282 A TW200642282 A TW 200642282A TW 095108888 A TW095108888 A TW 095108888A TW 95108888 A TW95108888 A TW 95108888A TW 200642282 A TW200642282 A TW 200642282A
Authority
TW
Taiwan
Prior art keywords
output signal
threshold
level converter
logical level
signal
Prior art date
Application number
TW095108888A
Other languages
English (en)
Chinese (zh)
Inventor
Takashi Kawamoto
Masaru Kokubo
Takashi Oshima
Original Assignee
Renesas Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Tech Corp filed Critical Renesas Tech Corp
Publication of TW200642282A publication Critical patent/TW200642282A/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0021—Modifications of threshold
    • H03K19/0027—Modifications of threshold in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
    • H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
TW095108888A 2005-04-15 2006-03-16 Logical level converter and phase locked loop using the same TW200642282A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005117753A JP2006303554A (ja) 2005-04-15 2005-04-15 論理レベル変換回路及びそれを用いた位相同期回路

Publications (1)

Publication Number Publication Date
TW200642282A true TW200642282A (en) 2006-12-01

Family

ID=37078079

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095108888A TW200642282A (en) 2005-04-15 2006-03-16 Logical level converter and phase locked loop using the same

Country Status (5)

Country Link
US (2) US7446614B2 (enExample)
JP (1) JP2006303554A (enExample)
KR (1) KR20060109325A (enExample)
CN (1) CN1848682A (enExample)
TW (1) TW200642282A (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101803195B (zh) * 2007-09-21 2013-03-27 高通股份有限公司 具有可调频率的信号发生器
US8385474B2 (en) 2007-09-21 2013-02-26 Qualcomm Incorporated Signal generator with adjustable frequency
US7965805B2 (en) * 2007-09-21 2011-06-21 Qualcomm Incorporated Signal generator with signal tracking
US8446976B2 (en) 2007-09-21 2013-05-21 Qualcomm Incorporated Signal generator with adjustable phase
CN100586022C (zh) * 2008-03-05 2010-01-27 钰创科技股份有限公司 可调整翻转点的反相器、或非门以及与非门
JP4772885B2 (ja) * 2009-03-17 2011-09-14 株式会社日立製作所 信号レベル変換回路および位相同期回路
US9641113B2 (en) 2014-02-28 2017-05-02 General Electric Company System and method for controlling a power generation system based on PLL errors
CN119995534B (zh) * 2025-01-16 2025-10-17 中山大学 一种基于并行数字算法的高频数字锁相放大器及控制方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5778611A (en) * 1980-10-31 1982-05-17 Matsushita Electric Ind Co Ltd Digital signal reproducing method
JPS63217712A (ja) * 1987-03-05 1988-09-09 Matsushita Electric Ind Co Ltd デイジタル情報再生装置
JP3163484B2 (ja) 1990-09-29 2001-05-08 アンリツ株式会社 波形整形回路およびディジタル信号解析装置
US5210712A (en) 1990-09-29 1993-05-11 Anritsu Corporation Waveform shaping circuit and digital signal analyzing apparatus using the same
JP4167747B2 (ja) 1998-04-13 2008-10-22 株式会社ルネサステクノロジ 周波数可変発振回路及びそれを用いた位相同期回路
JP2000078003A (ja) * 1998-08-28 2000-03-14 Seiko Epson Corp Ｐｌｌ回路
JP2001243715A (ja) * 2000-02-24 2001-09-07 Sony Corp 波形整形回路
JP2001358565A (ja) * 2000-06-13 2001-12-26 Hitachi Ltd 周波数可変発振回路およびそれを用いた位相同期回路
JP2003347936A (ja) * 2001-11-02 2003-12-05 Seiko Epson Corp クロック整形回路および電子機器

Also Published As

Publication number Publication date
US7446614B2 (en) 2008-11-04
US20060261873A1 (en) 2006-11-23
US20090096540A1 (en) 2009-04-16
CN1848682A (zh) 2006-10-18
KR20060109325A (ko) 2006-10-19
JP2006303554A (ja) 2006-11-02

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